| /* |
| * Copyright (C) 2016 Nest Labs, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #include "onyx-common.dtsi" |
| |
| / { |
| model = "NestLabs Onyx Form Factor Dev Board"; |
| compatible = "nestlabs,onyx-ffd", "fsl,imx6ul"; |
| |
| aliases { |
| serial-S0 = &uart1; |
| }; |
| }; |
| |
| &hu_button { |
| gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &pinctrl_hu_button { |
| fsl,pins = < |
| MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 PAD_CONFIG__GPIO /* BUTTON */ |
| >; |
| }; |
| |
| &ble_wakeup { |
| gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &sensor_mcu_wakeup { |
| gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &pinctrl_gpio_wakeup { |
| fsl,pins = < |
| MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 PAD_CONFIG__GPIO /* INT_AP_TO_MCU (Repurposed) */ |
| MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 PAD_CONFIG__GPIO /* INT_BLE_TO_AP */ |
| >; |
| }; |
| |
| &brcm_wlan { |
| interrupts-extended = <&gpio2 17 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &brcm_fmac { |
| interrupt-parent = <&gpio2>; |
| interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &pinctrl_brcm_oob { |
| fsl,pins = < |
| MX6UL_PAD_SD1_CLK__GPIO2_IO17 PAD_CONFIG__GPIO /* INT_WIFI_TO_AP*/ |
| >; |
| }; |
| |
| &wifi_gpios { |
| output-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &pinctrl_wifi_gpios { |
| fsl,pins = < |
| MX6UL_PAD_SD1_CMD__GPIO2_IO16 PAD_CONFIG__GPIO /* WIFI_RST_L */ |
| >; |
| }; |
| |
| &sensor_mcu_gpios { |
| output-names = "reset"; |
| output-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; |
| input-names = "detect#"; |
| input-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &pinctrl_sensor_mcu_gpios { |
| fsl,pins = < |
| MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 PAD_CONFIG__GPIO /* AP_TO_MCU_RST_L */ |
| MX6UL_PAD_CSI_DATA07__GPIO4_IO28 PAD_CONFIG__GPIO /* BP_DETECT_L */ |
| >; |
| }; |
| |
| &ble_gpios { |
| input-names = "int-out"; |
| input-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &backlight { |
| enable-gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &pinctrl_backlight { |
| fsl,pins = < |
| MX6UL_PAD_NAND_DQS__GPIO4_IO16 PAD_CONFIG__GPIO /* LCD_BL_EN */ |
| >; |
| }; |
| |
| &adc1 { |
| pinctrl-names="default"; |
| pinctrl-0 = <&pinctrl_adc1>; |
| #io-channel-cells = <1>; |
| num-channels= <5>; |
| vref-supply = <&adc_ref>; |
| status = "okay"; |
| }; |
| |
| /* A9 Debug UART */ |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &battery { |
| io-channels = <&adc1 4>; /* GPIO01_IO4 */ |
| io-channel-names = "vbat"; |
| vbatt-adc-input-enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; |
| divider-r1-ohm = <1180>; /* 118k */ |
| divider-r2-ohm = <402>; /* 40.2k */ |
| delay-us = <10000>; |
| }; |
| |
| &adc_ref{ |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| }; |
| |
| &lcdif{ |
| display = <&samsung>; |
| samsung: display { |
| native-mode = <&timing0>; |
| bits-per-pixel = <32>; |
| buffers = <2>; |
| bus-width = <24>; |
| display-timings { |
| timing0: 320x320{ |
| clock-frequency = <7180000>; |
| hactive = <320>; |
| vactive = <320>; |
| hback-porch = <16>; |
| hfront-porch = <16>; |
| vback-porch = <8>; |
| vfront-porch = <8>; |
| hsync-len = <2>; |
| vsync-len = <2>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <0>; |
| pixelclk-active = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| /*lcd driver spi */ |
| &ecspi2 { |
| fsl,spi-num-chipselects = <1>; |
| cs-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; |
| s6d05a1: s6d05a1@0 { |
| compatible = "samsung,s6d05a1"; |
| reg = <0>; |
| spi-max-frequency = <10000000>; |
| reset-gpios = <&gpio3 4 0>; |
| x-mirror; |
| y-mirror; |
| }; |
| }; |
| |
| &wdog1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_wdog>; |
| fsl,wdog_b_poweroff; |
| }; |
| |
| &iomuxc { |
| uart1 { |
| pinctrl_uart1: uart1-grp { |
| fsl,pins = < |
| MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX PAD_CONFIG__DEFAULT /* UART_AP_TO_DBG */ |
| MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX PAD_CONFIG__DEFAULT /* UART_DBG_TO_AP */ |
| >; |
| }; |
| }; |
| |
| adc1 { |
| pinctrl_adc1: adc1grp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 PAD_CONFIG__GPIO /* ADC_VBAT_AP */ |
| >; |
| }; |
| }; |
| |
| wdog { |
| pinctrl_wdog: wdoggrp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B PAD_CONFIG__DEFAULT /* PMIC_RSTIN */ |
| >; |
| }; |
| }; |
| }; |