|  | * ARM Vectored Interrupt Controller | 
|  |  | 
|  | One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM | 
|  | system for interrupt routing.  For multiple controllers they can either be | 
|  | nested or have the outputs wire-OR'd together. | 
|  |  | 
|  | Required properties: | 
|  |  | 
|  | - compatible : should be one of | 
|  | "arm,pl190-vic" | 
|  | "arm,pl192-vic" | 
|  | - interrupt-controller : Identifies the node as an interrupt controller | 
|  | - #interrupt-cells : The number of cells to define the interrupts.  Must be 1 as | 
|  | the VIC has no configuration options for interrupt sources.  The cell is a u32 | 
|  | and defines the interrupt number. | 
|  | - reg : The register bank for the VIC. | 
|  |  | 
|  | Optional properties: | 
|  |  | 
|  | - interrupts : Interrupt source for parent controllers if the VIC is nested. | 
|  |  | 
|  | Example: | 
|  |  | 
|  | vic0: interrupt-controller@60000 { | 
|  | compatible = "arm,pl192-vic"; | 
|  | interrupt-controller; | 
|  | #interrupt-cells = <1>; | 
|  | reg = <0x60000 0x1000>; | 
|  | }; |