| /* |
| * Copyright (C) 2014 Freescale Semiconductor, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include "imx6sx.dtsi" |
| |
| / { |
| model = "Freescale i.MX6 SoloX SDB Board"; |
| compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; |
| |
| backlight1 { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm3 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <6>; |
| fb-names = "mxs-lcdif0"; |
| status = "disabled"; |
| }; |
| |
| backlight2 { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm4 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <6>; |
| fb-names = "mxs-lcdif1"; |
| }; |
| |
| hannstar_cabc { |
| compatible = "hannstar,cabc"; |
| |
| lvds0 { |
| gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| memory { |
| reg = <0x80000000 0x40000000>; |
| }; |
| |
| pxp_v4l2_out { |
| compatible = "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; |
| status = "okay"; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| |
| reg_lcd_3v3: lcd-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "lcd-3v3"; |
| gpio = <&gpio3 27 0>; |
| enable-active-high; |
| status = "disabled"; |
| }; |
| |
| reg_sd3_vmmc: sd3_vmmc{ |
| compatible = "regulator-fixed"; |
| regulator-name = "VCC_SD3"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reg_vref_3v3: regulator@0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vref-3v3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| reg_psu_5v: psu_5v0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "PSU-5V0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-boot-on; |
| }; |
| |
| reg_usb_otg1_vbus: usb_otg1_vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio1 9 0>; |
| enable-active-high; |
| }; |
| |
| reg_usb_otg2_vbus: usb_otg2_vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg2_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio1 12 0>; |
| enable-active-high; |
| }; |
| |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| volume-up { |
| label = "Volume Up"; |
| gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; |
| linux,code = <115>; /* KEY_VOLUMEUP */ |
| }; |
| |
| volume-down { |
| label = "Volume Down"; |
| gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| linux,code = <114>; /* KEY_VOLUMEDOWN */ |
| }; |
| }; |
| |
| sound { |
| compatible = "fsl,imx6q-sabresd-wm8962", |
| "fsl,imx-audio-wm8962"; |
| model = "wm8962-audio"; |
| cpu-dai = <&ssi2>; |
| audio-codec = <&codec>; |
| audio-routing = |
| "Headphone Jack", "HPOUTL", |
| "Headphone Jack", "HPOUTR", |
| "Ext Spk", "SPKOUTL", |
| "Ext Spk", "SPKOUTR", |
| "AMIC", "MICBIAS", |
| "IN3R", "AMIC"; |
| mux-int-port = <2>; |
| mux-ext-port = <6>; |
| hp-det-gpios = <&gpio1 17 1>; |
| }; |
| |
| sound-spdif { |
| compatible = "fsl,imx-audio-spdif", |
| "fsl,imx6sx-sdb-spdif"; |
| model = "imx-spdif"; |
| spdif-controller = <&spdif>; |
| spdif-out; |
| }; |
| |
| csi1_v4l2_cap { |
| compatible = "fsl,imx6sx-csi-v4l2", "fsl,imx6sl-csi-v4l2"; |
| csi_id = <0>; |
| status = "okay"; |
| }; |
| |
| csi2_v4l2_cap { |
| compatible = "fsl,imx6sx-csi-v4l2", "fsl,imx6sl-csi-v4l2"; |
| csi_id = <1>; |
| status = "okay"; |
| }; |
| }; |
| |
| &cpu0 { |
| operating-points = < |
| /* kHz uV */ |
| 996000 1250000 |
| 792000 1175000 |
| 396000 1175000 |
| >; |
| fsl,soc-operating-points = < |
| /* ARM kHz SOC uV */ |
| 996000 1250000 |
| 792000 1175000 |
| 396000 1175000 |
| >; |
| arm-supply = <&sw1a_reg>; |
| soc-supply = <&sw1a_reg>; |
| pu-supply = <&pu_dummy>; |
| fsl,arm-soc-shared = <1>; |
| }; |
| |
| &csi1 { |
| status = "okay"; |
| }; |
| |
| &csi2 { |
| status = "okay"; |
| }; |
| |
| &adc1 { |
| vref-supply = <®_vref_3v3>; |
| status = "okay"; |
| }; |
| |
| &adc2 { |
| vref-supply = <®_vref_3v3>; |
| status = "okay"; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux_1>; |
| status = "okay"; |
| }; |
| |
| &fec1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet1_1 &pinctrl_enet1_clkout_1>; |
| pinctrl-assert-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>, <&gpio2 6 GPIO_ACTIVE_LOW>; |
| phy-mode = "rgmii"; |
| fsl,num_tx_queues=<3>; |
| fsl,num_rx_queues=<3>; |
| status = "okay"; |
| }; |
| |
| &fec2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet2_1>; |
| phy-mode = "rgmii"; |
| fsl,num_tx_queues=<3>; |
| fsl,num_rx_queues=<3>; |
| status = "okay"; |
| }; |
| |
| &gpc { |
| fsl,cpu_pupscr_sw2iso = <0x2>; |
| fsl,cpu_pupscr_sw = <0x1>; |
| fsl,cpu_pdnscr_iso2sw = <0x1>; |
| fsl,cpu_pdnscr_iso = <0x1>; |
| fsl,wdog-reset = <1>; /* watchdog select of reset source */ |
| fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1_1>; |
| status = "okay"; |
| |
| pmic: pfuze100@08 { |
| compatible = "fsl,pfuze200"; |
| reg = <0x08>; |
| |
| regulators { |
| sw1a_reg: sw1ab { |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1875000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| sw2_reg: sw2 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3a_reg: sw3a { |
| regulator-min-microvolt = <400000>; |
| regulator-max-microvolt = <1975000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3b_reg: sw3b { |
| regulator-min-microvolt = <400000>; |
| regulator-max-microvolt = <1975000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| swbst_reg: swbst { |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5150000>; |
| }; |
| |
| snvs_reg: vsnvs { |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vref_reg: vrefddr { |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vgen1_reg: vgen1 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1550000>; |
| regulator-always-on; |
| }; |
| |
| vgen2_reg: vgen2 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1550000>; |
| }; |
| |
| vgen3_reg: vgen3 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen4_reg: vgen4 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen5_reg: vgen5 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen6_reg: vgen6 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| ov564x: ov564x@3c { |
| compatible = "ovti,ov564x"; |
| reg = <0x3c>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_csi_0>; |
| clocks = <&clks IMX6SX_CLK_CSI>; |
| clock-names = "csi_mclk"; |
| AVDD-supply = <&vgen3_reg>; /* 2.8v */ |
| DVDD-supply = <&vgen2_reg>; /* 1.5v*/ |
| pwn-gpios = <&gpio3 28 1>; |
| rst-gpios = <&gpio3 27 0>; |
| csi_id = <0>; |
| mclk = <24000000>; |
| mclk_source = <0>; |
| }; |
| }; |
| |
| &flexcan1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1_1>; |
| trx-en-gpio = <&gpio4 25 GPIO_ACTIVE_LOW>; |
| trx-stby-gpio = <&gpio4 27 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &flexcan2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan2_1>; |
| trx-en-gpio = <&gpio4 25 GPIO_ACTIVE_LOW>; |
| trx-stby-gpio = <&gpio4 27 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2_1>; |
| status = "okay"; |
| |
| egalax_ts@04 { |
| compatible = "eeti,egalax_ts"; |
| reg = <0x04>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <19 2>; |
| wakeup-gpios = <&gpio4 19 0>; |
| }; |
| }; |
| |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3_2>; |
| status = "okay"; |
| |
| isl29023@44 { |
| compatible = "fsl,isl29023"; |
| reg = <0x44>; |
| rext = <499>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <5 1>; |
| shared-interrupt; |
| }; |
| |
| mag3110@0e { |
| compatible = "fsl,mag3110"; |
| reg = <0x0e>; |
| position = <2>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <5 1>; |
| shared-interrupt; |
| }; |
| |
| mma8451@1c { |
| compatible = "fsl,mma8451"; |
| reg = <0x1c>; |
| position = <1>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <2 8>; |
| interrupt-route = <2>; |
| }; |
| }; |
| |
| &i2c4 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c4_1>; |
| status = "okay"; |
| |
| codec: wm8962@1a { |
| compatible = "wlf,wm8962"; |
| reg = <0x1a>; |
| clocks = <&clks IMX6SX_CLK_AUDIO>; |
| DCVDD-supply = <&vgen4_reg>; |
| DBVDD-supply = <&vgen4_reg>; |
| AVDD-supply = <&vgen4_reg>; |
| CPVDD-supply = <&vgen4_reg>; |
| MICVDD-supply = <&vgen3_reg>; |
| PLLVDD-supply = <&vgen4_reg>; |
| SPKVDD1-supply = <®_psu_5v>; |
| SPKVDD2-supply = <®_psu_5v>; |
| amic-mono; |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog &pinctrl_can_gpios>; |
| |
| usdhc3 { |
| pinctrl_usdhc3_1_sdb: usdhc3grp-1-sdb { |
| fsl,pins = < |
| MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17069 |
| MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10071 |
| MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17069 |
| MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17069 |
| MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17069 |
| MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17069 |
| MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17069 |
| MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17069 |
| MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17069 |
| MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17069 |
| >; |
| }; |
| }; |
| |
| usdhc4 { |
| pinctrl_usdhc4_gpios: usdhc4-gpios { |
| fsl,pins = < |
| MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 |
| MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 |
| >; |
| }; |
| }; |
| |
| hog { |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000 |
| MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 |
| MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 0x80000000 |
| MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 |
| MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 |
| MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 |
| MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059 |
| MX6SX_PAD_QSPI1B_DATA2__GPIO4_IO_26 0x17059 |
| MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 0x17059 |
| MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 |
| MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059 |
| MX6SX_PAD_SD1_DATA3__GPIO6_IO_5 0xb000 |
| MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0 |
| >; |
| }; |
| |
| pinctrl_can_gpios: can-gpios { |
| fsl,pins = < |
| MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25 0x17059 |
| MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x17059 |
| >; |
| }; |
| }; |
| }; |
| |
| &pcie { |
| power-on-gpio = <&gpio2 1 0>; |
| reset-gpio = <&gpio2 0 0>; |
| status = "okay"; |
| }; |
| |
| &sai1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_sai1_2>; |
| status = "disabled"; |
| }; |
| |
| &spdif { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spdif_2>; |
| status = "okay"; |
| }; |
| |
| &ssi2 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1_1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2_1>; |
| status = "okay"; |
| }; |
| |
| &uart5 { /* for bluetooth */ |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart5_1>; |
| fsl,uart-has-rtscts; |
| status = "okay"; |
| /* for DTE mode, add below change */ |
| /* fsl,dte-mode;*/ |
| /* pinctrl-0 = <&pinctrl_uart5dte_1>; */ |
| }; |
| |
| &usbotg1 { |
| vbus-supply = <®_usb_otg1_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg1_1>; |
| imx6-usb-charger-detection; |
| status = "okay"; |
| }; |
| |
| &usbotg2 { |
| vbus-supply = <®_usb_otg2_vbus>; |
| dr_mode = "host"; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc2_1>; |
| non-removable; |
| no-1-8-v; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc3_1_sdb>; |
| pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>; |
| bus-width = <8>; |
| cd-gpios = <&gpio2 10 0>; |
| wp-gpios = <&gpio2 15 0>; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| vmmc-supply = <®_sd3_vmmc>; |
| status = "okay"; |
| }; |
| |
| &usdhc4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc4_2 &pinctrl_usdhc4_gpios>; |
| cd-gpios = <&gpio6 21 0>; |
| wp-gpios = <&gpio6 20 0>; |
| status = "okay"; |
| }; |
| |
| &lcdif1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lcdif_dat_0 |
| &pinctrl_lcdif_ctrl_0>; |
| lcd-supply = <®_lcd_3v3>; |
| display = <&display0>; |
| status = "disabled"; |
| |
| display0: display { |
| bits-per-pixel = <16>; |
| bus-width = <24>; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| timing0: timing0 { |
| clock-frequency = <33500000>; |
| hactive = <800>; |
| vactive = <480>; |
| hback-porch = <89>; |
| hfront-porch = <164>; |
| vback-porch = <23>; |
| vfront-porch = <10>; |
| hsync-len = <10>; |
| vsync-len = <10>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &lcdif2 { |
| display = <&display1>; |
| disp-dev = "ldb"; |
| status = "okay"; |
| |
| display1: display { |
| bits-per-pixel = <16>; |
| bus-width = <18>; |
| }; |
| }; |
| |
| &ldb { |
| status = "okay"; |
| |
| lvds-channel@0 { |
| fsl,data-mapping = "spwg"; |
| fsl,data-width = <18>; |
| crtc = "lcdif2"; |
| status = "okay"; |
| |
| display-timings { |
| native-mode = <&timing1>; |
| timing1: hsd100pxn1 { |
| clock-frequency = <65000000>; |
| hactive = <1024>; |
| vactive = <768>; |
| hback-porch = <220>; |
| hfront-porch = <40>; |
| vback-porch = <21>; |
| vfront-porch = <7>; |
| hsync-len = <60>; |
| vsync-len = <10>; |
| }; |
| }; |
| }; |
| }; |
| |
| &dcic1 { |
| dcic_id = <0>; |
| dcic_mux = "dcic-lcdif1"; |
| status = "okay"; |
| }; |
| |
| &dcic2 { |
| dcic_id = <1>; |
| dcic_mux = "dcic-lvds"; |
| status = "okay"; |
| }; |
| |
| &pwm3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm3_1>; |
| status = "okay"; |
| }; |
| |
| &pwm4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm4_0>; |
| status = "okay"; |
| }; |
| |
| &pxp { |
| status = "okay"; |
| }; |
| |
| &qspi2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_qspi2_1>; |
| status = "okay"; |
| |
| #ifndef SPANSIONFLASH |
| ddrsmp=<0>; |
| |
| flash0: n25q256a@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "micron,n25q256a"; |
| spi-max-frequency = <29000000>; |
| reg = <0>; |
| }; |
| |
| flash1: n25q256a@1 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "micron,n25q256a"; |
| spi-max-frequency = <29000000>; |
| reg = <1>; |
| }; |
| #endif |
| }; |
| |
| &vadc { |
| vadc_in = <0>; |
| csi_id = <1>; |
| status = "okay"; |
| }; |
