arch/mips/boot/dts/brcm/bcm6328.dtsi

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm6328";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		mips-hpt-frequency = <160000000>;

		cpu@0 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <1>;
		};
	};

	clocks {
		periph_clk: periph_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;
		};
	};

	aliases {
		uart0 = &uart0;
	};

	cpu_intc: cpu_intc {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	ubus {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "simple-bus";
		ranges;

		periph_intc: periph_intc@10000020 {
			compatible = "brcm,bcm3380-l2-intc";
			reg = <0x10000024 0x4 0x1000002c 0x4>,
			      <0x10000020 0x4 0x10000028 0x4>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>;
		};

		uart0: serial@10000100 {
			compatible = "brcm,bcm6345-uart";
			reg = <0x10000100 0x18>;
			interrupt-parent = <&periph_intc>;
			interrupts = <28>;
			clocks = <&periph_clk>;
			status = "disabled";
		};

		timer: timer@10000040 {
			compatible = "syscon";
			reg = <0x10000040 0x2c>;
			little-endian;
		};

		reboot {
			compatible = "syscon-reboot";
			regmap = <&timer>;
			offset = <0x28>;
			mask = <0x1>;
		};
	};
};