blob: c52f03b5032f8fab8616d91e7a705a06318331ca [file] [log] [blame]
Tegra SoC PWFM controller
Required properties:
- compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30,
must contain "nvidia,tegra30-pwm". Otherwise, must contain
"nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,
tegra124, tegra132, or tegra210.
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
the cells format.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
- pwm
pwm: pwm@7000a000 {
compatible = "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car 17>;
resets = <&tegra_car 17>;
reset-names = "pwm";