| #include <config.h> |
| #include <linux/linkage.h> |
| #include <asm/assembler.h> |
| #include <asm-offsets.h> |
| #include <asm/arch/imx-regs.h> |
| #include <asm/arch/crm_regs.h> |
| #include <asm/arch/mx6-ddr.h> |
| |
| .text |
| |
| .global suspend |
| .global _suspend_start |
| .global _suspend_end |
| |
| .align 3 |
| |
| _suspend_start: |
| |
| ENTRY(suspend) |
| |
| /* Disable RAM Power */ |
| ldr r11, .gpio_base_addr_list + (IMX_GPIO_PORT(GPIO_RAM_PWR_EN) - 1) * 4 |
| ldr r6, [r11, #0] |
| orr r6, r6, #(1 << IMX_GPIO_INDEX(GPIO_RAM_PWR_EN)) |
| str r6, [r11, #0] |
| |
| /* Disable RAM IO's */ |
| ldr r11, .iomuxc_base_addr |
| ldr r6, =0x0 |
| str r6, [r11, #MX6_IOM_DRAM_DQM0_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_DQM1_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_RAS_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_CAS_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDODT0_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDODT1_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDCLK_0_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDQS0_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDQS1_OFFSET] |
| str r6, [r11, #MX6_IOM_GRP_ADDDS_OFFSET] |
| str r6, [r11, #MX6_IOM_DDRMODE_CTL_OFFSET] |
| str r6, [r11, #MX6_IOM_GRP_DDRMODE_OFFSET] |
| str r6, [r11, #MX6_IOM_GRP_B0DS_OFFSET] |
| str r6, [r11, #MX6_IOM_GRP_B1DS_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDCKE0_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_SDCKE1_OFFSET] |
| str r6, [r11, #MX6_IOM_DRAM_RESET_OFFSET] |
| |
| /* Disable RAM Controller */ |
| ldr r11, .mmdc_mapsr_addr |
| ldr r6, =0x0 |
| str r6, [r11] |
| |
| /* Sleep */ |
| wfi |
| |
| ret lr |
| |
| ENDPROC(suspend) |
| |
| .gpio_base_addr_list: |
| .word GPIO1_BASE_ADDR |
| .word GPIO2_BASE_ADDR |
| .word GPIO3_BASE_ADDR |
| .word GPIO4_BASE_ADDR |
| .word GPIO5_BASE_ADDR |
| |
| .iomuxc_base_addr: |
| .word IOMUXC_BASE_ADDR |
| |
| .mmdc_mapsr_addr: |
| .word MX6_MMDC_P0_MAPSR |
| |
| _suspend_end: |
