| /* |
| ... |
| * Copyright (C) 2014 Nest Labs, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include "imx6sx.dtsi" |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| |
| / { |
| memory { |
| reg = <0x80000000 0x20000000>; /* 512 MB */ |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| HU-button { |
| label = "HU Button"; |
| gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; |
| linux,code = <28>; /* KEY_ENTER */ |
| gpio-key,wakeup; |
| }; |
| }; |
| |
| gpio-poweroff { |
| compatible = "gpio-poweroff"; |
| gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| brcm_wifi { |
| reg = <0x0 0>; |
| compatible = "nestlabs,gpio-exporter"; |
| output-names = "reset"; |
| output-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| brcm-wlan { |
| compatible = "brcm,bcmdhd_wlan"; |
| interrupts-extended = <&gpio5 15 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| pwm-beeper { |
| compatible = "pwm-beeper"; |
| pwms = <&pwm1>; |
| enable-gpio = <&gpio1 5 GPIO_ACTIVE_LOW>; |
| }; |
| |
| |
| em35x-gpios { |
| compatible = "nestlabs,gpio-exporter"; |
| reg = <0x0 0>; |
| output-names = "reset", "wake"; |
| output-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH |
| &gpio2 5 GPIO_ACTIVE_HIGH>; |
| |
| input-names = "irq"; |
| input-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| aliases { |
| serial-ble0 = &uart5; |
| serial-sensormcu0 = &uart6; |
| }; |
| |
| ble0-da14580-gpios { |
| reg = <0x0 0>; |
| compatible = "nestlabs,gpio-exporter"; |
| output-names = "reset"; |
| output-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| sensor-mcu-gpios { |
| compatible = "nestlabs,gpio-exporter"; |
| reg = <0x0 0>; |
| output-names = "reset"; |
| output-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; |
| |
| input-names = "detect#"; |
| input-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; |
| }; |
| |
| battery: battery@0 { |
| compatible = "adc-div-battery"; |
| io-channels = <&adc2 0>; |
| divider-r1-ohm = <100000>; |
| divider-r2-ohm = <301000>; |
| vbatt-adc-input-enable-gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; |
| delay-us = <8000>; |
| status = "okay"; |
| }; |
| |
| soc { |
| aips-bus@02200000 { |
| magwheel: adc@02280000 { |
| compatible = "nestlabs,vf610-adc-magwheel"; |
| vref-supply = <&vgen5_reg>; |
| reg = <0x02280000 0x4000>; |
| interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; |
| nestlabs,adc-channels-used = <1 2>; |
| nestlabs,adc-channel-midpoints = <1965 2038>; |
| hall-sensor-enable-gpio = <&gpio7 2 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| }; |
| |
| low_system_bus { |
| compatible = "fsl,imx6sx-low_system_bus"; |
| clocks = <&clks IMX6SX_CLK_AHB>, <&clks IMX6SX_CLK_IPG>, |
| <&clks IMX6SX_CLK_PERIPH>, <&clks IMX6SX_CLK_PERIPH_PRE>, |
| <&clks IMX6SX_CLK_PERIPH_CLK2>, <&clks IMX6SX_CLK_PERIPH_CLK2_SEL>, |
| <&clks IMX6SX_CLK_OSC>, <&clks IMX6SX_CLK_OCRAM_SEL>, |
| <&clks IMX6SX_CLK_OCRAM>, <&clks IMX6SX_CLK_DISPLAY_PODF>, |
| <&clks IMX6SX_CLK_ECSPI_SEL>, <&clks IMX6SX_CLK_UART_SEL>, |
| <&clks IMX6SX_CLK_GPU_CORE_SEL>, <&clks IMX6SX_CLK_GPU_AXI_SEL>, |
| <&clks IMX6SX_CLK_PLL2_BUS>; |
| clock-names = "ahb", "ipg", "periph", "periph_pre", "periph_clk2", |
| "periph_clk2_sel", "osc", "ocram_sel", "ocram", "display_podf", |
| "ecspi_sel", "uart_sel", "gpu_core_sel", "gpu_axi_sel", "pll2"; |
| }; |
| |
| busfreq { |
| status = "disabled"; |
| }; |
| }; |
| |
| /delete-node/ reserved-memory; |
| }; |
| |
| /* ADC2 for VBAT */ |
| &adc2 { |
| #io-channel-cells = <1>; |
| vref-supply = <&vgen5_reg>; |
| status = "okay"; |
| }; |
| |
| /*lcd driver spi*/ |
| &ecspi1 { |
| fsl,spi-num-chipselects = <1>; |
| cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1_1>; |
| /delete-property/ dmas; |
| status = "okay"; |
| |
| hx8369@0{ |
| compatible = "himax,hx8369"; |
| spi-max-frequency= <2000000>; |
| gpios-reset = <&gpio3 27 GPIO_ACTIVE_LOW>; |
| reg = <0>; |
| spi-cpol; |
| spi-cpha; |
| }; |
| }; |
| /* Zigbee SPI */ |
| &ecspi3 { |
| fsl,spi-num-chipselects = <1>; |
| cs-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi3_1>; |
| /delete-property/ dmas; |
| status = "okay"; |
| |
| spidev_em35x@0 { |
| compatible = "spidev"; |
| spi-max-frequency = <20000000>; |
| reg = <0>; |
| }; |
| }; |
| |
| /* Power Controller */ |
| &gpc { |
| fsl,cpu_pupscr_sw2iso = <0xf>; |
| fsl,cpu_pupscr_sw = <0xf>; |
| fsl,cpu_pdnscr_iso2sw = <0x1>; |
| fsl,cpu_pdnscr_iso = <0x1>; |
| fsl,wdog-reset = <1>; /* watchdog select of reset source */ |
| }; |
| |
| /* PWM1 for Piezo */ |
| &pwm1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm1_0>; |
| status = "okay"; |
| }; |
| |
| /* I2C2 */ |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2_1>; |
| status = "okay"; |
| /* LM3530 (LED Driver) @ 0x63 */ |
| lm3695@63{ |
| compatible= "national,lm3695"; |
| reg = <0x63>; |
| max-brightness = <2047>; |
| default-brightness = <1800>; |
| single-string; |
| boost-freq; |
| ramp-rise-time = <2000>; |
| ramp-fall-time = <2000>; |
| enable-gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>; |
| fb-device = "mxsfb"; |
| }; |
| }; |
| |
| &i2c4 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c4_3>; |
| status = "okay"; |
| |
| |
| /* MMPF0200 (PMIC) @ 0x08 */ |
| pmic: pfuze200@08 { |
| compatible = "fsl,pfuze200"; |
| reg = <0x08>; |
| |
| regulators { |
| /* VDDCORE: VDD_ARM_IN */ |
| sw1a_reg: sw1ab { |
| regulator-min-microvolt = <975000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| /* STANDBY VDDCORE: VDD_ARM_IN */ |
| sw1astby_reg: sw1abstby { |
| regulator-min-microvolt = <975000>; |
| regulator-max-microvolt = <975000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* VDDSOC: VDD_SOC_IN */ |
| sw2_reg: sw2 { |
| regulator-min-microvolt = <975000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| /* STANDBY VDDSOC: VDD_SOC_IN */ |
| sw2stby_reg: sw2stby { |
| regulator-min-microvolt = <1125000>; |
| regulator-max-microvolt = <1125000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* PP2V2_DDR: DDR */ |
| sw3a_reg: sw3a { |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* STANDBY PP2V2_DDR: DDR */ |
| sw3astby_reg: sw3astby { |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* PP1V8: NAND, Several Digital I/O Supplies (NVCC_KEY, NVCC_GPIO, etc) */ |
| sw3b_reg: sw3b { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* STANDBY PP1V8: NAND, Several Digital I/O Supplies (NVCC_KEY, NVCC_GPIO, etc) */ |
| sw3bstby_reg: sw3bstby { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* VSNVS_3V0: Pullups for reset buttons and boot straps */ |
| snvs_reg: vsnvs { |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* DDR_VREF: DDR */ |
| vref_reg: vrefddr { |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* DISPLAY */ |
| vgen4_reg: vgen4 { |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-always-on; |
| }; |
| |
| vgen5_reg: vgen5 { |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen6_reg: vgen6 { |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| }; |
| |
| /*lcd interface*/ |
| &lcdif1 { |
| pinctrl-names = "default","sleep"; |
| pinctrl-0 = <&pinctrl_lcdif_dat_0 &pinctrl_lcdif_ctrl_0>; |
| pinctrl-1 = <&pinctrl_lcdif_dat_1 &pinctrl_lcdif_ctrl_1>; /*note: defined later per board */ |
| display = <&display>; |
| status = "okay"; |
| disp-dev = "hx8357"; |
| |
| display: display { |
| native-mode = <&timing0>; |
| bits-per-pixel = <32>; |
| buffers = <2>; |
| bus-width = <24>; |
| display-timings { |
| timing0: 480x640{ |
| clock-frequency = <19698480>; /*(480+6+6+10 pixels) * (480+9+2+163 lines) * 60 frames*/ |
| hactive = <480>; |
| vactive = <640>; |
| hback-porch = <6>; |
| hfront-porch = <6>; |
| vback-porch = <6>; |
| vfront-porch = <6>; |
| hsync-len = <10>; |
| vsync-len = <2>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <1>; |
| }; |
| }; |
| }; |
| }; |
| |
| /* Pinmux Controller */ |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog>; |
| |
| pwm1 { |
| pinctrl_pwm1_0: pwm1grp-0 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO10__PWM1_OUT 0x110b0 |
| >; |
| }; |
| }; |
| |
| i2c2 { |
| pinctrl_i2c2_1: i2c2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1 |
| MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1 |
| >; |
| }; |
| }; |
| |
| i2c4 { |
| pinctrl_i2c4_3: i2c4grp-3 { |
| fsl,pins = < |
| MX6SX_PAD_USB_H_DATA__I2C4_SDA 0x4001b8b1 |
| MX6SX_PAD_USB_H_STROBE__I2C4_SCL 0x4001b8b1 |
| >; |
| }; |
| }; |
| |
| lcdif1 { |
| pinctrl_lcdif_dat_0: lcdifdatgrp-0 { |
| fsl,pins = < |
| MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0 |
| >; |
| }; |
| |
| pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 { |
| fsl,pins = < |
| MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0 |
| MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0 |
| MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0 |
| MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0 |
| MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x1b0b0 |
| >; |
| }; |
| }; |
| |
| uart1 { |
| pinctrl_uart1_2: uart1grp-2 { |
| fsl,pins = < |
| MX6SX_PAD_ENET2_COL__UART1_RX 0x1b0b1 |
| MX6SX_PAD_ENET2_CRS__UART1_TX 0x1b0b1 |
| >; |
| }; |
| }; |
| |
| uart2 { |
| pinctrl_uart2_1: uart2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1 |
| MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1 |
| >; |
| }; |
| }; |
| |
| uart5 { |
| pinctrl_uart5_2: uart5grp-2 { |
| fsl,pins = < |
| MX6SX_PAD_SD4_DATA4__UART5_RX 0x1b0b1 |
| MX6SX_PAD_SD4_DATA5__UART5_TX 0x1b0b1 |
| MX6SX_PAD_SD4_DATA7__UART5_CTS_B 0x1a0b1 |
| MX6SX_PAD_SD4_DATA6__UART5_RTS_B 0x1a0b1 |
| >; |
| }; |
| }; |
| |
| uart6 { |
| pinctrl_uart6_1: uart6grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_KEY_ROW1__UART6_RX 0x1b0b1 |
| MX6SX_PAD_KEY_COL1__UART6_TX 0x1b0b1 |
| MX6SX_PAD_KEY_ROW0__UART6_CTS_B 0x1b0b1 |
| MX6SX_PAD_KEY_COL0__UART6_RTS_B 0x1b0b1 |
| >; |
| }; |
| pinctrl_uart6_1_sleep: uart6grp-1-sleep { |
| fsl,pins = < |
| MX6SX_PAD_KEY_ROW1__UART6_RX 0x1b0b1 |
| MX6SX_PAD_KEY_COL1__UART6_TX 0x1b0b1 |
| MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x130b1 |
| MX6SX_PAD_KEY_COL0__UART6_RTS_B 0x1b0b1 |
| >; |
| |
| }; |
| }; |
| |
| usdhc2 { |
| pinctrl_usdhc2_1: usdhc2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059 |
| MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059 |
| MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059 |
| MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059 |
| MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059 |
| MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059 |
| >; |
| }; |
| }; |
| |
| hog { |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| MX6SX_PAD_RGMII2_RD3__GPIO5_IO_15 0xc0000000 /* wifi OOB: interrupt to cpu */ |
| MX6SX_PAD_GPIO1_IO04__GPIO1_IO_4 0xc0000000 /* wifi OOB: reset from cpu */ |
| MX6SX_PAD_QSPI1B_SS0_B__GPIO4_IO_30 0xc0000000 /* ecspi3 SS0 cs GPIO */ |
| MX6SX_PAD_ENET1_RX_CLK__GPIO2_IO_4 0xc0000000 /* zb OOB: IRQ from zb */ |
| MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0xc0000000 /* zb OOB: Reset from cpu */ |
| MX6SX_PAD_ENET1_TX_CLK__GPIO2_IO_5 0xc0000000 /* zb OOB: Wake from cpu */ |
| MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x000000b0 /* zb OOB: PWR_EN, leave floating */ |
| MX6SX_PAD_RGMII2_RX_CTL__GPIO5_IO_16 0xc0000000 /* BLE Reset_L */ |
| MX6SX_PAD_RGMII2_RXC__GPIO5_IO_17 0xc0000000 /* BLE INT */ |
| |
| MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0xc0000000 /* LCD backlight_EN */ |
| MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22 0xc0000000 /* LCD CS */ |
| |
| MX6SX_PAD_RGMII2_RD1__GPIO5_IO_13 0xc0000000 /* Backplate_detect */ |
| MX6SX_PAD_RGMII2_RD2__GPIO5_IO_14 0xc0000000 /* Backplate_reset_L */ |
| |
| MX6SX_PAD_GPIO1_IO11__GPIO1_IO_11 0xc0000000 /* BATT_DISCONNECT */ |
| |
| MX6SX_PAD_SD4_DATA2__GPIO6_IO_16 0xc0000000 /* ADC_VBATT_ENABLE */ |
| MX6SX_PAD_SD3_DATA0__GPIO7_IO_2 0xc0000000 /* SOC_HE_EN_L, this gpio is only connected in DVT and later HW*/ |
| MX6SX_PAD_GPIO1_IO05__GPIO1_IO_5 0xc0000000 /* Piezo EN */ |
| |
| MX6SX_PAD_ENET1_MDIO__OSC32K_32K_OUT 0x10b0 /* CPU_32K_CLK_OUT */ |
| |
| MX6SX_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x80000000 /*Watchdog COLD_RST_REQ */ |
| MX6SX_PAD_SD3_DATA7__GPIO7_IO_9 0xc0000000 /* WARM_RST_REQ */ |
| >; |
| }; |
| }; |
| |
| ecspi1 { |
| pinctrl_ecspi1_1: ecspi1grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_QSPI1A_DATA1__ECSPI1_MISO 0x100b1 |
| MX6SX_PAD_QSPI1A_DATA0__ECSPI1_MOSI 0x100b1 |
| MX6SX_PAD_QSPI1A_SCLK__ECSPI1_SCLK 0x100b1 |
| >; |
| }; |
| }; |
| ecspi3 { |
| pinctrl_ecspi3_1: ecspi3grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_QSPI1B_DATA1__ECSPI3_MISO 0x100b1 |
| MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI 0x100b1 |
| MX6SX_PAD_QSPI1B_SCLK__ECSPI3_SCLK 0x100b1 |
| >; |
| }; |
| }; |
| }; |
| |
| /* A9 Debug UART */ |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1_2>; |
| status = "okay"; |
| }; |
| |
| /* M4 Debug UART */ |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2_1>; |
| status = "okay"; |
| }; |
| |
| /* Bluetooth UART */ |
| &uart5 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart5_2>; |
| fsl,uart-has-rtscts; |
| fsl,uart-can-wake; |
| fsl,uart-cpu-mode; |
| status = "okay"; |
| }; |
| |
| /* BP UART */ |
| &uart6 { |
| pinctrl-names = "default","sleep"; |
| pinctrl-0 = <&pinctrl_uart6_1>; |
| pinctrl-1 = <&pinctrl_uart6_1_sleep>; |
| fsl,uart-has-rtscts; |
| fsl,uart-can-wake; |
| fsl,uart-cpu-mode; |
| status = "okay"; |
| }; |
| |
| /* Debug USB (Device) */ |
| &usbotg1 { |
| pinctrl-names = "default"; |
| dr_mode = "peripheral"; |
| imx-usb-charger-detection; |
| status = "okay"; |
| }; |
| |
| /* WIFI SDIO */ |
| &usdhc2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc2_1>; |
| non-removable; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| status = "okay"; |
| }; |
| |
| /* GPMI NAND */ |
| &gpmi { |
| status = "okay"; |
| fsl,legacy-bch-geometry; |
| nand-on-flash-bbt; /* Need to reserve NAND_BBT_SCAN_MAXBLOCKS at end of NAND */ |
| |
| partition@0-a { |
| label = "nand0"; |
| reg = <0x0 0x20000000>; |
| }; |
| |
| partition@0-b { |
| label = "u-boot"; |
| reg = <0x0 0x00400000>; |
| }; |
| partition@00400000 { |
| label = "ubipart"; |
| reg = <0x00400000 0x1F400000>; |
| }; |
| |
| partition@1F800000 { |
| label = "oopsdata"; |
| reg = <0x1F800000 0x780000>; |
| }; |
| }; |
| |
| &cpu0 { |
| operating-points = < |
| /* kHz uV */ |
| 792000 1175000 |
| /* kHz uV */ |
| 396000 1075000 |
| >; |
| fsl,soc-operating-points = < |
| /* ARM kHz SOC uV */ |
| 792000 1225000 |
| /* ARM kHz SOC uV */ |
| 396000 1225000 |
| >; |
| |
| arm-supply = <&sw1a_reg>; |
| soc-supply = <&sw2_reg>; |
| }; |
| |
| &gpc { |
| fsl,ldo-bypass = <1>; |
| }; |
| |