| BCM2835 Top-Level ("ARMCTRL") Interrupt Controller |
| The BCM2835 contains a custom top-level interrupt controller, which supports |
| 72 interrupt sources using a 2-level register scheme. The interrupt |
| controller, or the HW block containing it, is referred to occasionally |
| as "armctrl" in the SoC documentation, hence naming of this binding. |
| - compatible : should be "brcm,bcm2835-armctrl-ic" |
| - reg : Specifies base physical address and size of the registers. |
| - interrupt-controller : Identifies the node as an interrupt controller |
| - #interrupt-cells : Specifies the number of cells needed to encode an |
| interrupt source. The value shall be 2. |
| The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic |
| pending" register, or 1/2 respectively for interrupts in the "IRQ pending |
| The 2nd cell contains the interrupt number within the bank. Valid values |
| are 0..7 for bank 0, and 0..31 for bank 1. |
| The interrupt sources are as follows: |
| intc: interrupt-controller { |
| compatible = "brcm,bcm2835-armctrl-ic"; |
| reg = <0x7e00b200 0x200>; |
