|  | Samsung S3C24XX Interrupt Controllers | 
|  |  | 
|  | The S3C24XX SoCs contain a custom set of interrupt controllers providing a | 
|  | varying number of interrupt sources. The set consists of a main- and sub- | 
|  | controller and on newer SoCs even a second main controller. | 
|  |  | 
|  | Required properties: | 
|  | - compatible: Compatible property value should be "samsung,s3c2410-irq" | 
|  | for machines before s3c2416 and "samsung,s3c2416-irq" for s3c2416 and later. | 
|  |  | 
|  | - reg: Physical base address of the controller and length of memory mapped | 
|  | region. | 
|  |  | 
|  | - interrupt-controller : Identifies the node as an interrupt controller | 
|  |  | 
|  | - #interrupt-cells : Specifies the number of cells needed to encode an | 
|  | interrupt source. The value shall be 4 and interrupt descriptor shall | 
|  | have the following format: | 
|  | <ctrl_num parent_irq ctrl_irq type> | 
|  |  | 
|  | ctrl_num contains the controller to use: | 
|  | - 0 ... main controller | 
|  | - 1 ... sub controller | 
|  | - 2 ... second main controller on s3c2416 and s3c2450 | 
|  | parent_irq contains the parent bit in the main controller and will be | 
|  | ignored in main controllers | 
|  | ctrl_irq contains the interrupt bit of the controller | 
|  | type contains the trigger type to use | 
|  |  | 
|  | Example: | 
|  |  | 
|  | interrupt-controller@4a000000 { | 
|  | compatible = "samsung,s3c2410-irq"; | 
|  | reg = <0x4a000000 0x100>; | 
|  | interrupt-controller; | 
|  | #interrupt-cells=<4>; | 
|  | }; | 
|  |  | 
|  | [...] | 
|  |  | 
|  | serial@50000000 { | 
|  | compatible = "samsung,s3c2410-uart"; | 
|  | reg = <0x50000000 0x4000>; | 
|  | interrupt-parent = <&subintc>; | 
|  | interrupts = <1 28 0 4>, <1 28 1 4>; | 
|  | }; | 
|  |  | 
|  | rtc@57000000 { | 
|  | compatible = "samsung,s3c2410-rtc"; | 
|  | reg = <0x57000000 0x100>; | 
|  | interrupt-parent = <&intc>; | 
|  | interrupts = <0 30 0 3>, <0 8 0 3>; | 
|  | }; |