| /* |
| * Copyright (C) 2014 Freescale Semiconductor, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include "flintstone-common.dtsi" |
| |
| / { |
| model = "Freescale i.MX6 SoloX SDB Board"; |
| compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; |
| |
| backlight1 { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm3 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <6>; |
| fb-names = "mxs-lcdif0"; |
| }; |
| |
| backlight2 { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm4 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <6>; |
| fb-names = "mxs-lcdif1"; |
| }; |
| |
| hannstar_cabc { |
| compatible = "hannstar,cabc"; |
| |
| lvds0 { |
| gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| memory { |
| reg = <0x80000000 0x40000000>; |
| }; |
| |
| pxp_v4l2_out { |
| compatible = "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; |
| status = "okay"; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| |
| reg_lcd_3v3: lcd-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "lcd-3v3"; |
| gpio = <&gpio3 27 0>; |
| enable-active-high; |
| status = "disabled"; |
| }; |
| |
| reg_sd3_vmmc: sd3_vmmc{ |
| compatible = "regulator-fixed"; |
| regulator-name = "VCC_SD3"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-boot-on; |
| }; |
| |
| reg_vref_3v3: regulator@0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vref-3v3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| reg_psu_5v: psu_5v0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "PSU-5V0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-boot-on; |
| }; |
| |
| reg_usb_otg1_vbus: usb_otg1_vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio1 9 0>; |
| enable-active-high; |
| }; |
| |
| reg_usb_otg2_vbus: usb_otg2_vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg2_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio1 12 0>; |
| enable-active-high; |
| }; |
| |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| volume-up { |
| label = "Volume Up"; |
| gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; |
| linux,code = <115>; /* KEY_VOLUMEUP */ |
| }; |
| |
| volume-down { |
| label = "Volume Down"; |
| gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| linux,code = <114>; /* KEY_VOLUMEDOWN */ |
| }; |
| }; |
| |
| #if 0 |
| sound { |
| compatible = "fsl,imx6q-sabresd-wm8962", |
| "fsl,imx-audio-wm8962"; |
| model = "wm8962-audio"; |
| cpu-dai = <&ssi2>; |
| audio-codec = <&codec>; |
| audio-routing = |
| "Headphone Jack", "HPOUTL", |
| "Headphone Jack", "HPOUTR", |
| "Ext Spk", "SPKOUTL", |
| "Ext Spk", "SPKOUTR", |
| "AMIC", "MICBIAS", |
| "IN3R", "AMIC"; |
| mux-int-port = <2>; |
| mux-ext-port = <6>; |
| hp-det-gpios = <&gpio1 17 1>; |
| }; |
| #endif |
| |
| csi1_v4l2_cap { |
| compatible = "fsl,imx6sx-csi-v4l2", "fsl,imx6sl-csi-v4l2"; |
| status = "okay"; |
| }; |
| |
| brcm-wlan { |
| compatible = "brcm,bcmdhd_wlan"; |
| interrupts-extended = <&gpio4 22 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| }; |
| |
| &csi1 { |
| status = "okay"; |
| }; |
| |
| &adc1 { |
| vref-supply = <®_vref_3v3>; |
| status = "okay"; |
| }; |
| |
| &adc2 { |
| vref-supply = <®_vref_3v3>; |
| status = "okay"; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux_1>; |
| status = "okay"; |
| }; |
| |
| &fec1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet1_1 &pinctrl_enet1_clkout_1>; |
| pinctrl-assert-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>, <&gpio2 6 GPIO_ACTIVE_LOW>; |
| phy-mode = "rgmii"; |
| fsl,num_tx_queues=<3>; |
| fsl,num_rx_queues=<3>; |
| status = "okay"; |
| }; |
| |
| &fec2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet2_1>; |
| phy-mode = "rgmii"; |
| fsl,num_tx_queues=<3>; |
| fsl,num_rx_queues=<3>; |
| status = "okay"; |
| }; |
| |
| &gpc { |
| fsl,cpu_pupscr_sw2iso = <0xf>; |
| fsl,cpu_pupscr_sw = <0xf>; |
| fsl,cpu_pdnscr_iso2sw = <0x1>; |
| fsl,cpu_pdnscr_iso = <0x1>; |
| fsl,wdog-reset = <1>; /* watchdog select of reset source */ |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1_1>; |
| status = "okay"; |
| |
| pmic: pfuze100@08 { |
| compatible = "fsl,pfuze100"; |
| reg = <0x08>; |
| |
| regulators { |
| sw1a_reg: sw1ab { |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1875000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| sw1c_reg: sw1c { |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1875000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| sw2_reg: sw2 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3a_reg: sw3a { |
| regulator-min-microvolt = <400000>; |
| regulator-max-microvolt = <1975000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3b_reg: sw3b { |
| regulator-min-microvolt = <400000>; |
| regulator-max-microvolt = <1975000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw4_reg: sw4 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| swbst_reg: swbst { |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5150000>; |
| }; |
| |
| snvs_reg: vsnvs { |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vref_reg: vrefddr { |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vgen1_reg: vgen1 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1550000>; |
| regulator-always-on; |
| }; |
| |
| vgen2_reg: vgen2 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1550000>; |
| }; |
| |
| vgen3_reg: vgen3 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen4_reg: vgen4 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen5_reg: vgen5 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| vgen6_reg: vgen6 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| ov564x: ov564x@3c { |
| compatible = "ovti,ov564x"; |
| reg = <0x3c>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_csi_0>; |
| clocks = <&clks IMX6SX_CLK_CSI>; |
| clock-names = "csi_mclk"; |
| AVDD-supply = <&vgen3_reg>; /* 2.8v */ |
| DVDD-supply = <&vgen2_reg>; /* 1.5v*/ |
| pwn-gpios = <&gpio3 28 1>; |
| rst-gpios = <&gpio3 27 0>; |
| csi_id = <0>; |
| mclk = <24000000>; |
| mclk_source = <0>; |
| }; |
| }; |
| |
| &flexcan1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1_1>; |
| trx-en-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; |
| trx-stby-gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| }; |
| |
| &flexcan2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan2_1>; |
| trx-en-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; |
| trx-stby-gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2_1>; |
| status = "okay"; |
| |
| egalax_ts@04 { |
| compatible = "eeti,egalax_ts"; |
| reg = <0x04>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <19 2>; |
| wakeup-gpios = <&gpio4 19 0>; |
| }; |
| }; |
| |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3_2>; |
| status = "okay"; |
| |
| isl29023@44 { |
| compatible = "fsl,isl29023"; |
| reg = <0x44>; |
| rext = <499>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <5 1>; |
| shared-interrupt; |
| }; |
| |
| mag3110@0e { |
| compatible = "fsl,mag3110"; |
| reg = <0x0e>; |
| position = <2>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <5 1>; |
| shared-interrupt; |
| }; |
| |
| mma8451@1c { |
| compatible = "fsl,mma8451"; |
| reg = <0x1c>; |
| position = <1>; |
| }; |
| }; |
| |
| &i2c4 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c4_2>; |
| status = "okay"; |
| #if 0 |
| codec: wm8962@1a { |
| compatible = "wlf,wm8962"; |
| reg = <0x1a>; |
| clocks = <&clks IMX6SX_CLK_AUDIO>; |
| DCVDD-supply = <&vgen4_reg>; |
| DBVDD-supply = <&vgen4_reg>; |
| AVDD-supply = <&vgen4_reg>; |
| CPVDD-supply = <&vgen4_reg>; |
| MICVDD-supply = <&vgen3_reg>; |
| PLLVDD-supply = <&vgen4_reg>; |
| SPKVDD1-supply = <®_psu_5v>; |
| SPKVDD2-supply = <®_psu_5v>; |
| amic-mono; |
| }; |
| #endif |
| |
| /* OFN */ |
| adbs_a330@57 { |
| compatible = "avago,adbs-a330"; |
| reg = <0x57>; |
| shutdown-gpio = <&gpio7 8 0>; |
| reset-gpio = <&gpio7 6 0>; |
| motion-gpio = <&gpio7 9 0>; |
| direction = <1>; /*ADBS_A330_DIRECTION_POS*/ |
| mode = <1>; /*ADBS_A330_DELTA_Y*/ |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog>; |
| |
| enet1 { |
| pinctrl_enet1_1: enet1grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1 |
| MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1 |
| MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1 |
| MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1 |
| MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1 |
| MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1 |
| MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1 |
| MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1 |
| MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081 |
| MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081 |
| MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081 |
| MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081 |
| MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081 |
| MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081 |
| >; |
| }; |
| |
| pinctrl_enet1_clkout_1: enet1_clkoutgrp-1 { |
| fsl,pins = < |
| MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91 |
| >; |
| }; |
| }; |
| |
| enet2 { |
| pinctrl_enet2_1: enet2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b1 |
| MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1 |
| MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b0 |
| MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b0 |
| MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b0 |
| MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b0 |
| MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081 |
| MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081 |
| MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081 |
| MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081 |
| MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081 |
| MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081 |
| >; |
| }; |
| }; |
| |
| audmux { |
| pinctrl_audmux_1: audmuxgrp-1 { |
| fsl,pins = < |
| MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130B0 |
| MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130B0 |
| MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120B0 |
| MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130B0 |
| MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130B0 |
| >; |
| }; |
| }; |
| |
| sai1 { |
| pinctrl_sai1_2: sai1grp_2 { |
| fsl,pins = < |
| MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130B0 |
| MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130B0 |
| MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120B0 |
| MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130B0 |
| MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130B0 |
| >; |
| }; |
| }; |
| |
| pwm3 { |
| pinctrl_pwm3_1: pwm3grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0 |
| >; |
| }; |
| }; |
| |
| pwm4 { |
| pinctrl_pwm4_0: pwm4grp-0 { |
| fsl,pins = < |
| MX6SX_PAD_SD1_DATA1__PWM4_OUT 0x110b0 |
| >; |
| }; |
| }; |
| |
| flexcan1 { |
| pinctrl_flexcan1_1: flexcan1grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020 |
| MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020 |
| >; |
| }; |
| }; |
| |
| flexcan2 { |
| pinctrl_flexcan2_1: flexcan2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020 |
| MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020 |
| >; |
| }; |
| }; |
| |
| i2c1 { |
| pinctrl_i2c1_1: i2c1grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1 |
| MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1 |
| >; |
| }; |
| }; |
| |
| i2c2 { |
| pinctrl_i2c2_1: i2c2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1 |
| MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1 |
| >; |
| }; |
| }; |
| |
| i2c3 { |
| pinctrl_i2c3_2: i2c3grp-2 { |
| fsl,pins = < |
| MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 |
| MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1 |
| >; |
| }; |
| }; |
| |
| i2c4 { |
| pinctrl_i2c4_2: i2c4grp-2 { |
| fsl,pins = < |
| MX6SX_PAD_SD3_DATA1__I2C4_SDA 0x4001b8b1 |
| MX6SX_PAD_SD3_DATA0__I2C4_SCL 0x4001b8b1 |
| >; |
| }; |
| }; |
| |
| usbotg1 { |
| pinctrl_usbotg1_1: usbotg1grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059 |
| >; |
| }; |
| }; |
| |
| uart1 { |
| pinctrl_uart1_1: uart1grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 |
| MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 |
| >; |
| }; |
| }; |
| |
| uart2 { |
| pinctrl_uart2_1: uart2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1 |
| MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1 |
| >; |
| }; |
| }; |
| |
| uart5 { |
| pinctrl_uart5_1: uart5grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1 |
| MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1 |
| MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1 |
| MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1 |
| >; |
| }; |
| }; |
| |
| usdhc2 { |
| pinctrl_usdhc2_1: usdhc2grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059 |
| MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059 |
| MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059 |
| MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059 |
| MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059 |
| MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059 |
| >; |
| }; |
| }; |
| |
| usdhc4 { |
| pinctrl_usdhc4_2: usdhc4grp-2 { |
| fsl,pins = < |
| MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 |
| MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 |
| MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 |
| MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 |
| MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 |
| MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc4_gpios: usdhc4-gpios { |
| fsl,pins = < |
| MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 |
| MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 |
| >; |
| }; |
| }; |
| |
| csi { |
| pinctrl_csi_0: csigrp-0 { |
| fsl,pins = < |
| MX6SX_PAD_LCD1_DATA07__CSI1_MCLK 0x110b0 |
| MX6SX_PAD_LCD1_DATA06__CSI1_PIXCLK 0x110b0 |
| MX6SX_PAD_LCD1_DATA04__CSI1_VSYNC 0x110b0 |
| MX6SX_PAD_LCD1_DATA05__CSI1_HSYNC 0x110b0 |
| MX6SX_PAD_LCD1_DATA17__CSI1_DATA_0 0x110b0 |
| MX6SX_PAD_LCD1_DATA16__CSI1_DATA_1 0x110b0 |
| MX6SX_PAD_LCD1_DATA15__CSI1_DATA_2 0x110b0 |
| MX6SX_PAD_LCD1_DATA14__CSI1_DATA_3 0x110b0 |
| MX6SX_PAD_LCD1_DATA13__CSI1_DATA_4 0x110b0 |
| MX6SX_PAD_LCD1_DATA12__CSI1_DATA_5 0x110b0 |
| MX6SX_PAD_LCD1_DATA11__CSI1_DATA_6 0x110b0 |
| MX6SX_PAD_LCD1_DATA10__CSI1_DATA_7 0x110b0 |
| MX6SX_PAD_LCD1_DATA09__CSI1_DATA_8 0x110b0 |
| MX6SX_PAD_LCD1_DATA08__CSI1_DATA_9 0x110b0 |
| MX6SX_PAD_LCD1_ENABLE__GPIO3_IO_25 0x80000000 |
| MX6SX_PAD_LCD1_HSYNC__GPIO3_IO_26 0x80000000 |
| >; |
| }; |
| }; |
| |
| qspi2 { |
| pinctrl_qspi2_1: qspi2grp_1 { |
| fsl,pins = < |
| MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70a1 |
| MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70a1 |
| MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70a1 |
| MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70a1 |
| MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70a1 |
| MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70a1 |
| MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70a1 |
| MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70a1 |
| MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70a1 |
| MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70a1 |
| MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70a1 |
| MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70a1 |
| >; |
| }; |
| }; |
| |
| lcdif1 { |
| pinctrl_lcdif_dat_0: lcdifdatgrp-0 { |
| fsl,pins = < |
| MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0 |
| MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0 |
| >; |
| }; |
| |
| pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 { |
| fsl,pins = < |
| MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0 |
| MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0 |
| MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0 |
| MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0 |
| MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 |
| >; |
| }; |
| }; |
| |
| hog { |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000 |
| MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 |
| MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 0x80000000 |
| MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 |
| MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 |
| MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 |
| MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059 |
| MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25 0x17059 |
| MX6SX_PAD_QSPI1B_DATA2__GPIO4_IO_26 0x17059 |
| MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x17059 |
| MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 |
| MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059 |
| MX6SX_PAD_SD1_DATA3__GPIO6_IO_5 0xb000 |
| |
| MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22 0xc0000000 /* wifi OOB: interrupt to cpu */ |
| MX6SX_PAD_SD3_DATA2__GPIO7_IO_4 0xc0000000 /* ecspi3 SS0 cs GPIO */ |
| MX6SX_PAD_SD3_DATA5__GPIO7_IO_7 0xc0000000 /* zb OOB: IRQ from zb */ |
| MX6SX_PAD_KEY_ROW4__GPIO2_IO_19 0xc0000000 /* zb OOB: Reset from cpu */ |
| MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0xc0000000 /* zb OOB: Wake from cpu */ |
| |
| MX6SX_PAD_SD3_DATA6__GPIO7_IO_8 0xc0000000 /* OFN shutdown */ |
| MX6SX_PAD_SD3_DATA4__GPIO7_IO_6 0xc0000000 /* OFN reset */ |
| MX6SX_PAD_SD3_DATA7__GPIO7_IO_9 0xc0000000 /* OFN input motion */ |
| >; |
| }; |
| }; |
| |
| ecspi4 { |
| pinctrl_ecspi4_1: ecspi4grp-1 { |
| fsl,pins = < |
| MX6SX_PAD_SD3_DATA3__ECSPI4_MISO 0x100b1 |
| MX6SX_PAD_SD3_CMD__ECSPI4_MOSI 0x100b1 |
| MX6SX_PAD_SD3_CLK__ECSPI4_SCLK 0x100b1 |
| >; |
| }; |
| }; |
| }; |
| |
| &pcie { |
| power-on-gpio = <&gpio2 0 0>; |
| reset-gpio = <&gpio2 1 0>; |
| status = "okay"; |
| }; |
| |
| &sai1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_sai1_2>; |
| status = "disabled"; |
| }; |
| |
| &ssi2 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1_1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2_1>; |
| status = "okay"; |
| }; |
| |
| &uart5 { /* for bluetooth */ |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart5_1>; |
| fsl,uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| vbus-supply = <®_usb_otg1_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg1_1>; |
| imx-usb-charger-detection; |
| status = "okay"; |
| }; |
| |
| &usbotg2 { |
| vbus-supply = <®_usb_otg2_vbus>; |
| dr_mode = "host"; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc2_1>; |
| non-removable; |
| no-1-8-v; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| status = "okay"; |
| brcm-fmac { |
| reg = <1>; |
| compatible = "brcm,bcm4329-fmac"; |
| interrupt-names = "host-wake"; |
| interrupt-parent = <&gpio4>; |
| interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| }; |
| |
| &usdhc4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc4_2 &pinctrl_usdhc4_gpios>; |
| cd-gpios = <&gpio6 21 0>; |
| wp-gpios = <&gpio6 20 0>; |
| status = "okay"; |
| }; |
| |
| &lcdif1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lcdif_dat_0 |
| &pinctrl_lcdif_ctrl_0>; |
| lcd-supply = <®_lcd_3v3>; |
| display = <&display0>; |
| status = "disabled"; |
| |
| display0: display { |
| bits-per-pixel = <16>; |
| bus-width = <24>; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| timing0: timing0 { |
| clock-frequency = <33500000>; |
| hactive = <800>; |
| vactive = <480>; |
| hback-porch = <89>; |
| hfront-porch = <164>; |
| vback-porch = <23>; |
| vfront-porch = <10>; |
| hsync-len = <10>; |
| vsync-len = <10>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &lcdif2 { |
| display = <&display1>; |
| disp-dev = "ldb"; |
| status = "okay"; |
| |
| display1: display { |
| bits-per-pixel = <16>; |
| bus-width = <18>; |
| }; |
| }; |
| |
| &ldb { |
| status = "okay"; |
| |
| lvds-channel@0 { |
| fsl,data-mapping = "spwg"; |
| fsl,data-width = <18>; |
| crtc = "lcdif2"; |
| status = "okay"; |
| |
| display-timings { |
| native-mode = <&timing1>; |
| timing1: hsd100pxn1 { |
| clock-frequency = <65000000>; |
| hactive = <1024>; |
| vactive = <768>; |
| hback-porch = <220>; |
| hfront-porch = <40>; |
| vback-porch = <21>; |
| vfront-porch = <7>; |
| hsync-len = <60>; |
| vsync-len = <10>; |
| }; |
| }; |
| }; |
| }; |
| |
| &pwm3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm3_1>; |
| clocks = <&clks IMX6SX_CLK_PWM3>, <&clks IMX6SX_CLK_CKIL>; |
| status = "okay"; |
| }; |
| |
| &pwm4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm4_0>; |
| clocks = <&clks IMX6SX_CLK_PWM4>, <&clks IMX6SX_CLK_CKIL>; |
| status = "okay"; |
| }; |
| |
| &pxp { |
| status = "okay"; |
| }; |
| |
| &qspi2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_qspi2_1>; |
| status = "okay"; |
| |
| flash0: s25fl128s@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "spansion,s25fl128s"; |
| spi-max-frequency = <66000000>; |
| reg = <0>; |
| }; |
| |
| flash1: s25fl128s@1 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "spansion,s25fl128s"; |
| spi-max-frequency = <66000000>; |
| reg = <1>; |
| }; |
| }; |
| |
| &vadc { |
| vadc_in = <0>; |
| csi_id = <0>; |
| status = "okay"; |
| }; |
| |
| &ecspi4 { |
| fsl,spi-num-chipselects = <1>; |
| cs-gpios = <&gpio7 4 1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi4_1>; |
| status = "okay"; |
| |
| spidev_em35x@0 { |
| compatible = "spidev"; |
| spi-max-frequency = <20000000>; |
| reg = <0>; |
| }; |
| }; |
| |
