| * Hisilicon K3 DMA controller |
| |
| See dma.txt first |
| |
| Required properties: |
| - compatible: Should be "hisilicon,k3-dma-1.0" |
| - reg: Should contain DMA registers location and length. |
| - interrupts: Should contain one interrupt shared by all channel |
| - #dma-cells: see dma.txt, should be 1, para number |
| - dma-channels: physical channels supported |
| - dma-requests: virtual channels supported, each virtual channel |
| have specific request line |
| - clocks: clock required |
| |
| Example: |
| |
| Controller: |
| dma0: dma@fcd02000 { |
| compatible = "hisilicon,k3-dma-1.0"; |
| reg = <0xfcd02000 0x1000>; |
| #dma-cells = <1>; |
| dma-channels = <16>; |
| dma-requests = <27>; |
| interrupts = <0 12 4>; |
| clocks = <&pclk>; |
| status = "disable"; |
| }; |
| |
| Client: |
| Use specific request line passing from dmax |
| For example, i2c0 read channel request line is 18, while write channel use 19 |
| |
| i2c0: i2c@fcb08000 { |
| compatible = "snps,designware-i2c"; |
| dmas = <&dma0 18 /* read channel */ |
| &dma0 19>; /* write channel */ |
| dma-names = "rx", "tx"; |
| }; |
| |
| i2c1: i2c@fcb09000 { |
| compatible = "snps,designware-i2c"; |
| dmas = <&dma0 20 /* read channel */ |
| &dma0 21>; /* write channel */ |
| dma-names = "rx", "tx"; |
| }; |
| |
