| # ############################################################################## | |
| # Created by Base System Builder Wizard for Xilinx EDK 7.1.2 Build EDK_H.12.5.1 | |
| # Sun Nov 13 16:46:19 2005 | |
| # Target Board: Xilinx Virtex 4 ML403 Evaluation Platform Rev 1 | |
| # Family: virtex4 | |
| # Device: xc4vfx12 | |
| # Package: ff668 | |
| # Speed Grade: -10 | |
| # Processor: Microblaze | |
| # System clock frequency: 100.000000 MHz | |
| # Debug interface: On-Chip HW Debug Module | |
| # On Chip Memory : 64 KB | |
| # ############################################################################## | |
| PARAMETER VERSION = 2.1.0 | |
| PORT fpga_0_RS232_Uart_RX_pin = fpga_0_RS232_Uart_RX, DIR = INPUT | |
| PORT fpga_0_RS232_Uart_TX_pin = fpga_0_RS232_Uart_TX, DIR = OUTPUT | |
| PORT fpga_0_LEDs_4Bit_GPIO_IO_pin = fpga_0_LEDs_4Bit_GPIO_IO, DIR = INOUT, VEC = [0:3] | |
| PORT fpga_0_LEDs_Positions_GPIO_IO_pin = fpga_0_LEDs_Positions_GPIO_IO, DIR = INOUT, VEC = [0:4] | |
| PORT sys_clk_pin = dcm_clk_s, DIR = INPUT, SIGIS = DCMCLK | |
| PORT sys_rst_pin = sys_rst_s, DIR = INPUT | |
| BEGIN microblaze | |
| PARAMETER INSTANCE = microblaze_0 | |
| PARAMETER HW_VER = 4.00.a | |
| PARAMETER C_DEBUG_ENABLED = 1 | |
| PARAMETER C_NUMBER_OF_PC_BRK = 2 | |
| PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 1 | |
| PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 1 | |
| BUS_INTERFACE DLMB = dlmb | |
| BUS_INTERFACE ILMB = ilmb | |
| BUS_INTERFACE DOPB = mb_opb | |
| BUS_INTERFACE IOPB = mb_opb | |
| PORT CLK = sys_clk_s | |
| PORT DBG_CAPTURE = DBG_CAPTURE_s | |
| PORT DBG_CLK = DBG_CLK_s | |
| PORT DBG_REG_EN = DBG_REG_EN_s | |
| PORT DBG_TDI = DBG_TDI_s | |
| PORT DBG_TDO = DBG_TDO_s | |
| PORT DBG_UPDATE = DBG_UPDATE_s | |
| PORT Interrupt = Interrupt | |
| END | |
| BEGIN opb_v20 | |
| PARAMETER INSTANCE = mb_opb | |
| PARAMETER HW_VER = 1.10.c | |
| PARAMETER C_EXT_RESET_HIGH = 0 | |
| PORT SYS_Rst = sys_rst_s | |
| PORT OPB_Clk = sys_clk_s | |
| END | |
| BEGIN opb_mdm | |
| PARAMETER INSTANCE = debug_module | |
| PARAMETER HW_VER = 2.00.a | |
| PARAMETER C_MB_DBG_PORTS = 1 | |
| PARAMETER C_USE_UART = 1 | |
| PARAMETER C_UART_WIDTH = 8 | |
| PARAMETER C_BASEADDR = 0x41400000 | |
| PARAMETER C_HIGHADDR = 0x4140ffff | |
| BUS_INTERFACE SOPB = mb_opb | |
| PORT OPB_Clk = sys_clk_s | |
| PORT DBG_CAPTURE_0 = DBG_CAPTURE_s | |
| PORT DBG_CLK_0 = DBG_CLK_s | |
| PORT DBG_REG_EN_0 = DBG_REG_EN_s | |
| PORT DBG_TDI_0 = DBG_TDI_s | |
| PORT DBG_TDO_0 = DBG_TDO_s | |
| PORT DBG_UPDATE_0 = DBG_UPDATE_s | |
| END | |
| BEGIN lmb_v10 | |
| PARAMETER INSTANCE = ilmb | |
| PARAMETER HW_VER = 1.00.a | |
| PARAMETER C_EXT_RESET_HIGH = 0 | |
| PORT SYS_Rst = sys_rst_s | |
| PORT LMB_Clk = sys_clk_s | |
| END | |
| BEGIN lmb_v10 | |
| PARAMETER INSTANCE = dlmb | |
| PARAMETER HW_VER = 1.00.a | |
| PARAMETER C_EXT_RESET_HIGH = 0 | |
| PORT SYS_Rst = sys_rst_s | |
| PORT LMB_Clk = sys_clk_s | |
| END | |
| BEGIN lmb_bram_if_cntlr | |
| PARAMETER INSTANCE = dlmb_cntlr | |
| PARAMETER HW_VER = 1.00.b | |
| PARAMETER C_BASEADDR = 0x00000000 | |
| PARAMETER C_HIGHADDR = 0x0000ffff | |
| BUS_INTERFACE SLMB = dlmb | |
| BUS_INTERFACE BRAM_PORT = dlmb_port | |
| END | |
| BEGIN lmb_bram_if_cntlr | |
| PARAMETER INSTANCE = ilmb_cntlr | |
| PARAMETER HW_VER = 1.00.b | |
| PARAMETER C_BASEADDR = 0x00000000 | |
| PARAMETER C_HIGHADDR = 0x0000ffff | |
| BUS_INTERFACE SLMB = ilmb | |
| BUS_INTERFACE BRAM_PORT = ilmb_port | |
| END | |
| BEGIN bram_block | |
| PARAMETER INSTANCE = lmb_bram | |
| PARAMETER HW_VER = 1.00.a | |
| BUS_INTERFACE PORTA = ilmb_port | |
| BUS_INTERFACE PORTB = dlmb_port | |
| END | |
| BEGIN opb_uartlite | |
| PARAMETER INSTANCE = RS232_Uart | |
| PARAMETER HW_VER = 1.00.b | |
| PARAMETER C_BAUDRATE = 9600 | |
| PARAMETER C_DATA_BITS = 8 | |
| PARAMETER C_ODD_PARITY = 0 | |
| PARAMETER C_USE_PARITY = 0 | |
| PARAMETER C_CLK_FREQ = 100000000 | |
| PARAMETER C_BASEADDR = 0x40600000 | |
| PARAMETER C_HIGHADDR = 0x4060ffff | |
| BUS_INTERFACE SOPB = mb_opb | |
| PORT OPB_Clk = sys_clk_s | |
| PORT Interrupt = RS232_Uart_Interrupt | |
| PORT RX = fpga_0_RS232_Uart_RX | |
| PORT TX = fpga_0_RS232_Uart_TX | |
| END | |
| BEGIN opb_gpio | |
| PARAMETER INSTANCE = LEDs_4Bit | |
| PARAMETER HW_VER = 3.01.b | |
| PARAMETER C_GPIO_WIDTH = 4 | |
| PARAMETER C_IS_DUAL = 0 | |
| PARAMETER C_IS_BIDIR = 1 | |
| PARAMETER C_ALL_INPUTS = 0 | |
| PARAMETER C_BASEADDR = 0x40020000 | |
| PARAMETER C_HIGHADDR = 0x4002ffff | |
| BUS_INTERFACE SOPB = mb_opb | |
| PORT OPB_Clk = sys_clk_s | |
| PORT GPIO_IO = fpga_0_LEDs_4Bit_GPIO_IO | |
| END | |
| BEGIN opb_gpio | |
| PARAMETER INSTANCE = LEDs_Positions | |
| PARAMETER HW_VER = 3.01.b | |
| PARAMETER C_GPIO_WIDTH = 5 | |
| PARAMETER C_IS_DUAL = 0 | |
| PARAMETER C_IS_BIDIR = 1 | |
| PARAMETER C_ALL_INPUTS = 0 | |
| PARAMETER C_BASEADDR = 0x40000000 | |
| PARAMETER C_HIGHADDR = 0x4000ffff | |
| BUS_INTERFACE SOPB = mb_opb | |
| PORT OPB_Clk = sys_clk_s | |
| PORT GPIO_IO = fpga_0_LEDs_Positions_GPIO_IO | |
| END | |
| BEGIN opb_timer | |
| PARAMETER INSTANCE = opb_timer_1 | |
| PARAMETER HW_VER = 1.00.b | |
| PARAMETER C_COUNT_WIDTH = 32 | |
| PARAMETER C_ONE_TIMER_ONLY = 1 | |
| PARAMETER C_BASEADDR = 0x41c00000 | |
| PARAMETER C_HIGHADDR = 0x41c0ffff | |
| BUS_INTERFACE SOPB = mb_opb | |
| PORT OPB_Clk = sys_clk_s | |
| PORT Interrupt = opb_timer_1_Interrupt | |
| END | |
| BEGIN opb_intc | |
| PARAMETER INSTANCE = opb_intc_0 | |
| PARAMETER HW_VER = 1.00.c | |
| PARAMETER C_BASEADDR = 0x41200000 | |
| PARAMETER C_HIGHADDR = 0x4120ffff | |
| PARAMETER C_HAS_IPR = 0 | |
| BUS_INTERFACE SOPB = mb_opb | |
| PORT Irq = Interrupt | |
| PORT Intr = RS232_Uart_Interrupt & opb_timer_1_Interrupt | |
| END | |
| BEGIN dcm_module | |
| PARAMETER INSTANCE = dcm_0 | |
| PARAMETER HW_VER = 1.00.a | |
| PARAMETER C_CLK0_BUF = TRUE | |
| PARAMETER C_CLKIN_PERIOD = 10.000000 | |
| PARAMETER C_CLK_FEEDBACK = 1X | |
| PARAMETER C_EXT_RESET_HIGH = 1 | |
| PORT CLKIN = dcm_clk_s | |
| PORT CLK0 = sys_clk_s | |
| PORT CLKFB = sys_clk_s | |
| PORT RST = net_gnd | |
| PORT LOCKED = dcm_0_lock | |
| END | |