| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| */ |
| |
| /dts-v1/; |
| |
| #include "mesont5m.dtsi" |
| #include "mesont5m_drm.dtsi" |
| #include "mesont5m_pxp-panel.dtsi" |
| |
| / { |
| amlogic-dt-id = "t5m_pxp"; |
| compatible = "t5m_pxp"; |
| interrupt-parent = <&gic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| aliases { |
| serial0 = &uart_B; |
| tsensor0 = &cpu_tsensor; |
| tsensor1 = &top_tsensor; |
| spi0 = &spifc; |
| spi1 = &spicc0; |
| spi2 = &spicc1; |
| spi3 = &spicc2; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| i2c4 = &i2c4; |
| }; |
| |
| memory@00000000 { |
| device_type = "memory"; |
| linux,usable-memory = <0x0 0x000000 0x0 0x40000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| dmc_reserved:linux,dmc_monitor { |
| compatible = "amlogic,dmc_monitor-reserved"; |
| reg = <0x0 0x0 0x0 0x80000>; |
| }; |
| |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| no-map; |
| reg = <0x0 0x05000000 0x0 0x400000>; |
| }; |
| |
| dsp_fw_reserved:linux,dsp_fw { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x00800000>; |
| alignment = <0x0 0x00400000>; |
| alloc-ranges = <0x0 0x30000000 0x0 0x00800000>; |
| }; |
| |
| logo_reserved:linux,meson-fb { |
| compatible = "amlogic, meson-fb"; |
| size = <0x0 0x800000>; |
| alignment = <0x0 0x400000>; |
| reg = <0x0 0x3f800000 0x0 0x800000>; |
| }; |
| |
| ion_cma_reserved:linux,ion-dev { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x0>; |
| alignment = <0x0 0x400000>; |
| }; |
| /* secure ion for gpu, advice size is 80M */ |
| ion_secure_reserved:linux,ion-secure { |
| compatible = "amlogic, ion-secure-mem"; |
| no-map; |
| size = <0x0 0x0000000>; |
| alignment = <0x0 0x400000>; |
| }; |
| ion_fb_reserved:linux,ion-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 1920x1080x4x3 round up 4M align */ |
| size = <0x0 0x0>; |
| alignment = <0x0 0x400000>; |
| }; |
| dmaheap_cma_reserved:heap-gfx { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 1080p TV androidT size 88M */ |
| size = <0x0 0x5800000>; |
| alignment = <0x0 0x400000>; |
| }; |
| dmaheap_fb_reserved:heap-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 1080p TV androidT size 36M */ |
| size = <0x0 0x2400000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| /* vdin0 CMA pool */ |
| /*vdin0_cma_reserved:linux,vdin0_cma {*/ |
| /* compatible = "shared-dma-pool";*/ |
| /* reusable;*/ |
| /* up to 1920x1080 yuv422 8bit and 5 buffers |
| * 1920x1080x2x5 = 20 M |
| */ |
| /* size = <0x0 0x01400000>;*/ |
| /* alignment = <0x0 0x400000>;*/ |
| /*};*/ |
| /* vdin1 CMA pool */ |
| vdin1_cma_reserved:linux,vdin1_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* up to 1920x1080 yuv422 8bit and 5 buffers |
| * 1920x1080x2x5 = 20 M |
| */ |
| size = <0x0 0x01400000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| codec_mm_cma:linux,codec_mm_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* ion_codec_mm max can alloc size 80M*/ |
| size = <0x0 0x10000000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x00000000 0x0 0x40000000>; |
| linux,contiguous-region; |
| }; |
| |
| /*di CMA pool */ |
| di_cma_reserved:linux,di_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* buffer_size = 3621952(yuv422 8bit) |
| * | 4736064(yuv422 10bit) |
| * | 4074560(yuv422 10bit full pack mode) |
| * 10x3621952=34.6M(0x23) support 8bit |
| * 10x4736064=45.2M(0x2e) support 12bit |
| * 10x4074560=40M(0x28) support 10bit |
| */ |
| //size = <0x0 0x01000000>; |
| //size = <0x0 0x0>; |
| alignment = <0x0 0x400000>; |
| }; |
| /* codec shared reserved */ |
| codec_mm_reserved:linux,codec_mm_reserved { |
| compatible = "amlogic, codec-mm-reserved"; |
| size = <0x0 0x0>; |
| alignment = <0x0 0x100000>; |
| //no-map; |
| }; |
| |
| frc_cma_reserved:linux,frc_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* frc:size need 4M alignment |
| * 1080P 16 buffer:88Mhz (0x5800000) |
| * 4k 16 buffer:348Mhz (0x15c00000) |
| * 400Mhz (0x19000000) |
| * 384Mhz (0x18000000) |
| * 368Mhz (0x17000000) |
| */ |
| size = <0x0 0xa400000>; |
| alignment = <0x0 0x400000>; |
| linux,contiguous-region; |
| /*alloc-ranges = <0x0 0x0 0x0 0x3f800000>;*/ |
| }; |
| |
| /* POST PROCESS MANAGER */ |
| ppmgr_reserved:linux,ppmgr { |
| compatible = "amlogic, ppmgr_memory"; |
| size = <0x0 0x100000>; |
| alignment = <0x0 0x100000>; |
| linux,contiguous-region; |
| }; |
| |
| picdec_cma_reserved:linux,picdec { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x100000>; |
| alignment = <0x0 0x100000>; |
| linux,contiguous-region; |
| }; |
| |
| }; |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| dev_name = "codec_mm"; |
| status = "okay"; |
| }; |
| |
| picdec { |
| compatible = "amlogic, picdec"; |
| memory-region = <&picdec_cma_reserved>; |
| dev_name = "picdec"; |
| status = "okay"; |
| }; |
| ppmgr { |
| compatible = "amlogic, ppmgr"; |
| memory-region = <&ppmgr_reserved>; |
| status = "disabled"; |
| }; |
| vdetect { |
| compatible = "amlogic, vdetect"; |
| dev_name = "vdetect"; |
| status = "disabled"; |
| }; |
| |
| amlvideo2_0 { |
| compatible = "amlogic, amlvideo2"; |
| dev_name = "amlvideo2"; |
| status = "disabled"; |
| amlvideo2_id = <0>; |
| cma_mode = <1>; |
| }; |
| |
| amlvideo2_1 { |
| compatible = "amlogic, amlvideo2"; |
| dev_name = "amlvideo2"; |
| status = "disabled"; |
| amlvideo2_id = <1>; |
| cma_mode = <1>; |
| }; |
| tvafe_avin_detect { |
| compatible = "amlogic, t5m_tvafe_avin_detect"; |
| status = "okay"; |
| device_mask = <1>;/*bit0:ch1;bit1:ch2*/ |
| reg = <0x0 0xfe00a000 0x0 0x400>; /* cvbs irq base */ |
| interrupts = <0 173 1>, |
| <0 172 1>; |
| }; |
| |
| tvafe { |
| compatible = "amlogic, tvafe-t5m"; |
| /*memory-region = <&tvafe_cma_reserved>;*/ |
| status = "okay"; |
| flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ |
| cma_size = <5>;/*MByte*/ |
| reg = <0x0 0xfe072000 0x0 0x2000/*tvafe reg base*/ |
| 0x0 0xfe008000 0x0 0x2000>; /*ana reg base*/ |
| reserve-iomap = "true"; |
| tvafe_id = <0>; |
| //pinctrl-names = "default"; |
| /*!!particular sequence, no more and no less!!!*/ |
| tvafe_pin_mux = < |
| 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ |
| 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ |
| 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ |
| 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ |
| >; |
| clocks = <&clkc CLKID_CDAC_CLK>; |
| clock-names = "vdac_clk_gate"; |
| cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */ |
| cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */ |
| }; |
| |
| vbi { |
| compatible = "amlogic, vbi"; |
| status = "okay"; |
| interrupts = <0 210 1>; |
| }; |
| |
| tvafe_avin_detect { |
| compatible = "amlogic, t5m_tvafe_avin_detect"; |
| status = "okay"; |
| device_mask = <1>;/*bit0:ch1;bit1:ch2*/ |
| reg = <0x0 0xfe00a000 0x0 0x400>; /* cvbs irq base */ |
| interrupts = <0 173 1>, |
| <0 172 1>; |
| }; |
| |
| tvafe { |
| compatible = "amlogic, tvafe-t5m"; |
| /*memory-region = <&tvafe_cma_reserved>;*/ |
| status = "okay"; |
| flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ |
| cma_size = <5>;/*MByte*/ |
| reg = <0x0 0xfe072000 0x0 0x2000/*tvafe reg base*/ |
| 0x0 0xfe008000 0x0 0x2000>; /*ana reg base*/ |
| reserve-iomap = "true"; |
| tvafe_id = <0>; |
| //pinctrl-names = "default"; |
| /*!!particular sequence, no more and no less!!!*/ |
| tvafe_pin_mux = < |
| 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ |
| 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ |
| 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ |
| 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ |
| >; |
| clocks = <&clkc CLKID_CDAC_CLK>; |
| clock-names = "vdac_clk_gate"; |
| cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */ |
| cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */ |
| }; |
| |
| vbi { |
| compatible = "amlogic, vbi"; |
| status = "okay"; |
| interrupts = <0 210 1>; |
| }; |
| |
| multi-di { |
| //status = "okay"; |
| /*************************************************** |
| * memory: default is 4 |
| * 0:use reserved; |
| * 1:use cma; |
| * 2:use cma as reserved |
| * 4:use codec mem |
| ***************************************************/ |
| flag_cma = <4>;// |
| //memory-region = <&di_cma_reserved>; |
| /*************************************************** |
| * clock-range: <min max> |
| * default: <334 667> |
| ***************************************************/ |
| //clock-range = <334 667>; |
| /*************************************************** |
| * en_4k: t5w support 4k |
| ***************************************************/ |
| en_4k = <0>; |
| keep_dec_vf = <2>; |
| po_fmt = <0>; |
| /*************************************************** |
| * post_nub: default is 11 (T7/T3/SC2/S4 new path) |
| * local 7*4075520 = 28 |
| * post 11*5222400 = 56 //?? |
| ***************************************************/ |
| post_nub = <11>; |
| /*************************************************** |
| * 0:not support |
| * bit 0: for 4k |
| * bit 1: for 1080p |
| ***************************************************/ |
| alloc_sct = <0>; |
| /*************************************************** |
| * hf: default is 0 (T7/T3/SC2/S4 new path) |
| * 0:not enable; |
| * 1: enable |
| ***************************************************/ |
| hf = <0>; |
| afbce_loss_en = <1>; |
| /*************************************************** |
| * loss mode for di out (T5w) |
| * 0:not set loss mode for di out; |
| * 1:1:check the loss flag in vf and set for di |
| ***************************************************/ |
| };/* end of multi-di */ |
| |
| provisionkey { |
| compatible = "amlogic, provisionkey"; |
| status = "disabled"; |
| key-permit-default = "write"; |
| //new key not need add dts if started with KEY_PROVISION_ |
| KEY_PROVISION_XXX { }; |
| //test_my_added_keyname { }; |
| };//End provisionkey |
| |
| unifykey { |
| compatible = "amlogic,unifykey"; |
| status = "okay"; |
| |
| unifykey-num = <24>; |
| unifykey-index-0 = <&keysn_0>; |
| unifykey-index-1 = <&keysn_1>; |
| unifykey-index-2 = <&keysn_2>; |
| unifykey-index-3 = <&keysn_3>; |
| unifykey-index-4 = <&keysn_4>; |
| unifykey-index-5 = <&keysn_5>; |
| unifykey-index-6 = <&keysn_6>; |
| unifykey-index-7 = <&keysn_7>; |
| unifykey-index-8 = <&keysn_8>; |
| unifykey-index-9 = <&keysn_9>; |
| unifykey-index-10= <&keysn_10>; |
| unifykey-index-11 = <&keysn_11>; |
| unifykey-index-12 = <&keysn_12>; |
| unifykey-index-13 = <&keysn_13>; |
| unifykey-index-14 = <&keysn_14>; |
| unifykey-index-15 = <&keysn_15>; |
| unifykey-index-16 = <&keysn_16>; |
| unifykey-index-17 = <&keysn_17>; |
| unifykey-index-18 = <&keysn_18>; |
| unifykey-index-19 = <&keysn_19>; |
| unifykey-index-20 = <&keysn_20>; |
| unifykey-index-21 = <&keysn_21>; |
| unifykey-index-22 = <&keysn_22>; |
| unifykey-index-23 = <&keysn_23>; |
| |
| keysn_0: key_0{ |
| key-name = "usid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_1:key_1{ |
| key-name = "mac"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_2:key_2{ |
| key-name = "hdcp"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_3:key_3{ |
| key-name = "secure_boot_set"; |
| key-device = "efuse"; |
| key-permit = "write"; |
| }; |
| keysn_4:key_4{ |
| key-name = "mac_bt"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_5:key_5{ |
| key-name = "mac_wifi"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_6:key_6{ |
| key-name = "hdcp2_tx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_7:key_7{ |
| key-name = "hdcp2_rx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_8:key_8{ |
| key-name = "widevinekeybox"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_9:key_9{ |
| key-name = "deviceid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_10:key_10{ |
| key-name = "hdcp22_fw_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_11:key_11{ |
| key-name = "hdcp22_rx_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_12:key_12{ |
| key-name = "hdcp22_rx_fw"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_13:key_13{ |
| key-name = "hdcp14_rx"; |
| key-device = "normal"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_14:key_14{ |
| key-name = "prpubkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_15:key_15{ |
| key-name = "prprivkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_16:key_16{ |
| key-name = "lcd"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_17:key_17{ |
| key-name = "lcd_extern"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_18:key_18{ |
| key-name = "backlight"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_19:key_19{ |
| key-name = "lcd_tcon"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_20:key_20{ |
| key-name = "attestationkeybox";// attestation key |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_21:key_21{ |
| key-name = "lcd_tcon_spi"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_22:key_22{ |
| key-name = "attestationdevidbox";// attest dev id box |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_23:key_23{ |
| key-name = "oemkey"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| }; /* End unifykey */ |
| |
| hdmirx { |
| compatible = "amlogic, hdmirx_t5m"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| /*memory-region = <&hdmirx_emp_cma_reserved>;*/ |
| status = "okay"; |
| pinctrl-names = "hdmirx_pins"; |
| pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux |
| &hdmirx_c_mux &hdmirx_d_mux>; |
| repeat = <0>; |
| /*power-domains = <&pwrdm PDID_T5M_HDMIRX>;*/ |
| interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
| clocks =<&clkc CLKID_HDMIRX_CFG>, |
| <&clkc CLKID_HDMIRX_ACR>, |
| <&clkc CLKID_HDMIRX_METER>, |
| <&clkc CLKID_HDMIRX_2M>, |
| <&clkc CLKID_HDMIRX_5M>, |
| <&clkc CLKID_HDMIRX_HDCP>, |
| <&xtal>, |
| <&clkc CLKID_FCLK_DIV4>, |
| <&clkc CLKID_FCLK_DIV5>; |
| clock-names = "hdmirx_cfg_clk", |
| "cts_hdmirx_acr_ref_clk", |
| "cts_hdmirx_meter_clk", |
| "cts_hdmirx_2m_clk", |
| "cts_hdmirx_5m_clk", |
| "cts_hdmirx_hdcp2x_eclk", |
| "xtal", |
| "fclk_div4", |
| "fclk_div5"; |
| hdmirx_id = <0>; |
| en_4k_2_2k = <0>; |
| hpd_low_cec_off = <1>; |
| arc_port = <1>; |
| vrr_range_dynamic_update_en = <1>; |
| /* bit4: enable feature, bit3~0: port number */ |
| disable_port = <0x0>; |
| /* MAP_ADDR_MODULE_CBUS */ |
| /* MAP_ADDR_MODULE_HIU */ |
| /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */ |
| /* MAP_ADDR_MODULE_SEC_AHB */ |
| /* MAP_ADDR_MODULE_SEC_AHB2 */ |
| /* MAP_ADDR_MODULE_APB4 */ |
| /* MAP_ADDR_MODULE_TOP */ |
| /* MAP_ADDR_MODULE_CLK_CTRL */ |
| /* MAP_ADDR_MODULE_ANA_CTRL */ |
| reg = < 0x0 0x0 0x0 0x0 |
| 0x0 0xff63C000 0x0 0x2000 |
| 0x0 0xffe0d000 0x0 0x2000 |
| 0x0 0x0 0x0 0x0 |
| 0x0 0x0 0x0 0x0 |
| 0x0 0x0 0x0 0x0 |
| 0x0 0xfe398000 0x0 0x18000 |
| 0x0 0xfe000000 0x0 0x1fff |
| 0x0 0xfe008000 0x280 0x334>; |
| }; |
| |
| /* Audio Related start */ |
| auge_sound { |
| compatible = "amlogic, auge-sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| |
| /*avout mute gpio*/ |
| //avout_mute-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; |
| //spk_mute-gpios = <&gpio GPIOD_2 GPIO_ACTIVE_LOW>; |
| |
| interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "audio_exception64"; |
| |
| status = "disabled"; |
| |
| aml-audio-card,dai-link@0 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdma>; |
| frame-master = <&tdma>; |
| /* slave mode */ |
| /* |
| * bitclock-master = <&tdmacodec>; |
| * frame-master = <&tdmacodec>; |
| */ |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&tdma>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmacodec: codec { |
| sound-dai = <&dummy_codec>; |
| //prefix-names = "AMP", "AMP1"; |
| //sound-dai = <&ad82584f &ad82584f1 &tl1_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@1 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmb>; |
| frame-master = <&tdmb>; |
| /* slave mode */ |
| //bitclock-master = <&tdmbcodec>; |
| //frame-master = <&tdmbcodec>; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-pcm"; |
| cpu { |
| sound-dai = <&tdmb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| /* |
| * dai-tdm-slot-tx-mask = |
| * <1 1 1 1 1 1 1 1>; |
| * dai-tdm-slot-rx-mask = |
| * <1 1 1 1 1 1 1 1>; |
| * dai-tdm-slot-num = <8>; |
| */ |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmbcodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@2 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmc>; |
| frame-master = <&tdmc>; |
| /* slave mode */ |
| //bitclock-master = <&tdmccodec>; |
| //frame-master = <&tdmccodec>; |
| /* suffix-name, sync with android audio hal used for */ |
| //suffix-name = "alsaPORT-tdm"; |
| cpu { |
| sound-dai = <&tdmc>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmccodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@3 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-pdm"; |
| cpu { |
| sound-dai = <&pdm>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@4 { |
| mclk-fs = <128>; |
| continuous-clock; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-spdif"; |
| cpu { |
| sound-dai = <&spdifa>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@5 { |
| mclk-fs = <128>; |
| suffix-name = "alsaPORT-spdifb"; |
| cpu { |
| sound-dai = <&spdifb>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@6 { |
| mclk-fs = <256>; |
| suffix-name = "alsaPORT-tv"; |
| cpu { |
| sound-dai = <&extn>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| #if 0 |
| aml-audio-card,dai-link@7 { |
| mclk-fs = <256>; |
| suffix-name = "alsaPORT-earc"; |
| cpu { |
| sound-dai = <&earc>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| #endif |
| aml-audio-card,dai-link@8 { |
| mclk-fs = <256>; |
| continuous-clock; |
| suffix-name = "alsaPORT-loopback"; |
| cpu { |
| sound-dai = <&loopbacka>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| }; |
| /* Audio Related end */ |
| |
| aml_frc { |
| compatible = "amlogic, t5m_frc"; |
| dev_name = "aml_frc"; |
| status = "okay"; |
| frc_en = <1>;/*1:enable ;0:disable*/ |
| frc_hw_pos = <0>;/*0:before postblend; 1:after postblend*/ |
| interrupts = <GIC_SPI 221 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 222 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_frc_in", "irq_frc_out", "irq_frc_rdma"; |
| memory-region = <&frc_cma_reserved>; |
| clocks = <&clkc CLKID_FRC>, <&clkc CLKID_ME>; |
| clock-names = "clk_frc", "clk_me"; |
| //power-domains = <&pwrdm PDID_T3_FRCTOP>, <&pwrdm PDID_T3_FRCME>, |
| //<&pwrdm PDID_T3_FRCMC>; |
| power-domain-names = "frc-top","frc-me","frc-mc"; |
| reg = <0x0 0xFF850000 0x0 0x30000 /*frc reg*/ |
| 0x0 0xFE000000 0x0 0x300 |
| 0x0 0xFF000000 0x0 0x10000>; /*frc clk reg*/ |
| reg-names = "frc_reg","frc_clk_reg","vpu_reg"; |
| }; |
| }; /* end of / */ |
| |
| &fb { |
| status = "disabled"; |
| display_size_default = <1920 1080 1920 2160 32>; |
| mem_size = <0x00800000 0x1980000 0x100000 0x100000>; |
| logo_addr = "0x3f800000"; |
| mem_alloc = <0>; |
| pxp_mode = <1>; /** 0:normal mode 1:pxp mode */ |
| }; |
| |
| &drm_vpu { |
| status = "okay"; |
| logo_addr = "0x3f800000"; |
| |
| connectors_dev: port@1 { |
| drm_to_lcd0: endpoint@2 { |
| reg = <2>; |
| remote-endpoint = <&lcd0_to_drm>; |
| }; |
| }; |
| }; |
| |
| &lcd { |
| ports { |
| port { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| lcd0_to_drm: endpoint@0 { |
| reg = <0>; |
| remote-endpoint = <&drm_to_lcd0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &audiobus { |
| tdma:tdm@0 { |
| compatible = "amlogic, t5-snd-tdma"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-slot-mask-in = <1 0>; |
| dai-tdm-lane-slot-mask-out = <0 1>; |
| dai-tdm-clk-sel = <0>; |
| |
| //clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
| // &clkaudio CLKID_AUDIO_MCLK_PAD0 |
| // &clkc CLKID_MPLL0 |
| // &clkc CLKID_MPLL1 |
| // &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
| //clock-names = "mclk", "mclk_pad", "clk_srcpll", |
| // "samesource_srcpll", "samesource_clk"; |
| |
| //pinctrl-names = "tdm_pins"; |
| //pinctrl-0 = <&tdm_a>; |
| |
| /* |
| * 0: tdmout_a; |
| * 1: tdmout_b; |
| * 2: tdmout_c; |
| * 3: spdifout; |
| * 4: spdifout_b; |
| */ |
| samesource_sel = <3>; |
| |
| /* In for ACODEC_ADC */ |
| tdmin-src-name = "acodec_adc"; |
| /*enable default mclk(12.288M), before extern codec start*/ |
| start_clk_enable = <1>; |
| |
| /*tdm clk tuning enable*/ |
| clk_tuning_enable = <1>; |
| status = "disabled"; |
| |
| /* !!!For --TV platform-- ONLY */ |
| Channel_Mask { |
| /*i2s has 4 pins, 8channel, mux output*/ |
| Spdif_samesource_Channel_Mask = "i2s_2/3"; |
| }; |
| }; |
| |
| tdmb:tdm@1 { |
| compatible = "amlogic, t5-snd-tdmb"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| dai-tdm-lane-slot-mask-out = <0 1 0 0>; |
| dai-tdm-clk-sel = <1>; |
| |
| //clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| // &clkc CLKID_MPLL1>; |
| //clock-names = "mclk", "clk_srcpll"; |
| |
| status = "disabled"; |
| }; |
| |
| tdmc:tdm@2 { |
| compatible = "amlogic, t5-snd-tdmc"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
| dai-tdm-clk-sel = <2>; |
| |
| //clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
| // &clkc CLKID_MPLL2>; |
| //clock-names = "mclk", "clk_srcpll"; |
| status = "disabled"; |
| }; |
| |
| pdm:pdm { |
| compatible = "amlogic, tm2-revb-snd-pdm"; |
| #sound-dai-cells = <0>; |
| |
| //clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
| // &clkc CLKID_FCLK_DIV3 |
| // &clkc CLKID_MPLL3 |
| // &clkaudio CLKID_AUDIO_PDMIN0 |
| // &clkaudio CLKID_AUDIO_PDMIN1>; |
| //clock-names = "gate", |
| // "sysclk_srcpll", |
| // "dclk_srcpll", |
| // "pdm_dclk", |
| // "pdm_sysclk"; |
| |
| //pinctrl-names = "pdm_pins"; |
| //pinctrl-0 = <&pdmin>; |
| |
| /* mode 0~4, defalut:1 */ |
| filter_mode = <1>; |
| |
| status = "disabled"; |
| }; |
| |
| spdifa:spdif@0 { |
| compatible = "amlogic, tm2-revb-snd-spdif-a"; |
| #sound-dai-cells = <0>; |
| |
| //clocks = <&clkc CLKID_MPLL0 |
| // &clkc CLKID_FCLK_DIV4 |
| // &clkaudio CLKID_AUDIO_GATE_SPDIFIN |
| // &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A |
| // &clkaudio CLKID_AUDIO_SPDIFIN |
| // &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
| //clock-names = "sysclk", "fixed_clk", "gate_spdifin", |
| // "gate_spdifout", "clk_spdifin", "clk_spdifout"; |
| interrupts = |
| <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>; |
| |
| interrupt-names = "irq_spdifin"; |
| //pinctrl-names = "spdif_pins", "spdif_pins_mute"; |
| //pinctrl-0 = <&spdifout>; |
| //pinctrl-1 = <&spdifout_a_mute>; |
| |
| samesource_sel = <4>; |
| |
| /*spdif clk tuning enable*/ |
| clk_tuning_enable = <1>; |
| status = "disabled"; |
| }; |
| |
| spdifb:spdif@1 { |
| compatible = "amlogic, tm2-revb-snd-spdif-b"; |
| #sound-dai-cells = <0>; |
| |
| //clocks = <&clkc CLKID_MPLL2 /*CLKID_HIFI_PLL*/ |
| // &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B |
| // &clkaudio CLKID_AUDIO_SPDIFOUT_B>; |
| //clock-names = "sysclk", |
| // "gate_spdifout", "clk_spdifout"; |
| |
| status = "disabled"; |
| }; |
| |
| extn:extn { |
| compatible = "amlogic, tm2-snd-extn"; |
| #sound-dai-cells = <0>; |
| |
| interrupts = |
| <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_frhdmirx"; |
| |
| status = "disabled"; |
| }; |
| |
| aed:effect { |
| compatible = "amlogic, snd-effect-v4"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC |
| &clkc CLKID_FCLK_DIV5 |
| &clkaudio CLKID_AUDIO_EQDRC>; |
| clock-names = "gate", "srcpll", "eqdrc"; |
| |
| /* |
| * 0:tdmout_a |
| * 1:tdmout_b |
| * 2:tdmout_c |
| * 3:spdifout |
| * 4:spdifout_b |
| */ |
| eqdrc_module = <0>; |
| /* max 0xf, each bit for one lane, usually one lane */ |
| lane_mask = <0x1>; |
| /* max 0xff, each bit for one channel */ |
| channel_mask = <0xff>; |
| |
| status = "disabled"; |
| }; |
| #if 0 |
| asrca:resample@0 { |
| compatible = "amlogic, t5-resample-a"; |
| //clocks = <&clkc CLKID_MPLL1 |
| // &clkaudio CLKID_AUDIO_MCLK_B |
| // &clkaudio CLKID_AUDIO_RESAMPLE_A>; |
| //clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*same with toddr_src |
| * TDMIN_A, 0 |
| * TDMIN_B, 1 |
| * TDMIN_C, 2 |
| * SPDIFIN, 3 |
| * PDMIN, 4 |
| * FRATV, 5 |
| * TDMIN_LB, 6 |
| * LOOPBACK_A, 7 |
| * FRHDMIRX, 8 |
| * LOOPBACK_B, 9 |
| * SPDIFIN_LB, 10 |
| * EARC_RX, 11 |
| */ |
| resample_module = <8>; |
| |
| status = "disabled"; |
| }; |
| |
| asrcb:resample@1 { |
| compatible = "amlogic, t5-resample-b"; |
| //clocks = <&clkc CLKID_MPLL3 |
| // &clkaudio CLKID_AUDIO_MCLK_F |
| // &clkaudio CLKID_AUDIO_RESAMPLE_B>; |
| //clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*this resample is only used for loopback_A.*/ |
| |
| status = "disabled"; |
| }; |
| #endif |
| vad:vad { |
| compatible = "amlogic, snd-vad"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD |
| &clkc CLKID_FCLK_DIV5 |
| &clkaudio CLKID_AUDIO_VAD>; |
| clock-names = "gate", "pll", "clk"; |
| |
| interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 44 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_wakeup", "irq_frame_sync"; |
| |
| /* |
| * Data src sel: |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| * 5: loopback_b; |
| * 6: tdmin_lb; |
| * 7: loopback_a; |
| */ |
| src = <4>; |
| |
| /* |
| * deal with hot word in user space or kernel space |
| * 0: in user space |
| * 1: in kernel space |
| */ |
| level = <1>; |
| |
| status = "disabled"; |
| }; |
| |
| loopbacka:loopback@0 { |
| compatible = "amlogic, t5-loopbacka"; |
| #sound-dai-cells = <0>; |
| |
| //clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
| // &clkc CLKID_FCLK_DIV3 |
| // &clkc CLKID_MPLL3 |
| // &clkaudio CLKID_AUDIO_PDMIN0 |
| // &clkaudio CLKID_AUDIO_PDMIN1 |
| // &clkc CLKID_MPLL0 |
| // &clkaudio CLKID_AUDIO_MCLK_A>; |
| //clock-names = "pdm_gate", |
| // "pdm_sysclk_srcpll", |
| // "pdm_dclk_srcpll", |
| // "pdm_dclk", |
| // "pdm_sysclk", |
| // "tdminlb_mpll", |
| // "tdminlb_mclk"; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <0>; |
| datain_chmask = <0xf>; |
| /* config which data pin for loopback */ |
| datain-lane-mask-in = <1 0 1 0>; |
| |
| /* calc mclk for datalb */ |
| mclk-fs = <256>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_TDMINA_DIN*, refer to core pinmux |
| * 4: PAD_TDMINB_DIN*, refer to core pinmux |
| * 5: PAD_TDMINC_DIN*, refer to core pinmux |
| * 6: PAD_TDMINA_D*, oe, refer to core pinmux |
| * 7: PAD_TDMINB_D*, oe, refer to core pinmux |
| */ |
| /* if tdmin_lb >= 3, use external loopback */ |
| datalb_src = <0>; |
| datalb_chnum = <2>; |
| datalb_chmask = <0x3>; |
| /* config which data pin as loopback */ |
| datalb-lane-mask-in = <1 0 0 0>; |
| |
| status = "disabled"; |
| }; |
| |
| loopbackb:loopback@1 { |
| compatible = "amlogic, t5-loopbackb"; |
| #sound-dai-cells = <0>; |
| |
| //clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
| // &clkc CLKID_FCLK_DIV3 |
| // &clkc CLKID_MPLL3 |
| // &clkaudio CLKID_AUDIO_PDMIN0 |
| // &clkaudio CLKID_AUDIO_PDMIN1 |
| // &clkc CLKID_MPLL0 |
| // &clkaudio CLKID_AUDIO_MCLK_A>; |
| //clock-names = "pdm_gate", |
| // "pdm_sysclk_srcpll", |
| // "pdm_dclk_srcpll", |
| // "pdm_dclk", |
| // "pdm_sysclk", |
| // "tdminlb_mpll", |
| // "tdminlb_mclk"; |
| |
| /* calc mclk for datain_lb */ |
| mclk-fs = <256>; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <4>; |
| datain_chmask = <0xf>; |
| /* config which data pin for loopback */ |
| datain-lane-mask-in = <1 0 1 0>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_TDMINA_DIN*, refer to core pinmux |
| * 4: PAD_TDMINB_DIN*, refer to core pinmux |
| * 5: PAD_TDMINC_DIN*, refer to core pinmux |
| * 6: PAD_TDMINA_D*, oe, refer to core pinmux |
| * 7: PAD_TDMINB_D*, oe, refer to core pinmux |
| */ |
| /* if tdmin_lb >= 3, use external loopback */ |
| datalb_src = <1>; |
| datalb_chnum = <2>; |
| datalb_chmask = <0x3>; |
| /* config which data pin as loopback */ |
| datalb-lane-mask-in = <1 0 0 0>; |
| |
| status = "disabled"; |
| }; |
| }; /* end of audiobus */ |
| |
| &earc { |
| status = "disabled"; |
| }; |
| |
| &audio_data { |
| status = "disabled"; |
| }; |
| |
| &uart_B { |
| status = "okay"; |
| }; |
| |
| /*if you want to use vdin just modify status to "ok"*/ |
| &vdin0 { |
| /*memory-region = <&vdin0_cma_reserved>;*/ |
| status = "okay"; |
| /*MByte, if 10bit disable: 64M(YUV422), |
| *if 10bit enable: 64*1.5 = 96M(YUV422) |
| *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M |
| *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M |
| *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M |
| *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M |
| * onebuffer: |
| * worst case:(4096*2160*3 + 2M(afbce issue)) = 27.5M |
| * dw:960x540x3 = 1.5M |
| * total size:(27.5+1.5)x buffernumber |
| */ |
| cma_size = <330>; |
| frame_buff_num = <11>; |
| }; |
| |
| &vdin1 { |
| memory-region = <&vdin1_cma_reserved>; |
| status = "okay"; |
| }; |
| |
| /* SDIO */ |
| //&sd_emmc_a { |
| // status = "disabled"; |
| // pinctrl-0 = <&sdio_pins>; |
| // pinctrl-1 = <&sdio_clk_gate_pins>; |
| // pinctrl-names = "default", "clk-gate"; |
| // #address-cells = <1>; |
| // #size-cells = <0>; |
| // |
| // bus-width = <4>; |
| // cap-sd-highspeed; |
| // sd-uhs-sdr50; |
| // sd_uhs-sdr104; |
| // max-frequency = <200000000>; |
| // |
| // non-removable; |
| // disable-wp; |
| // |
| // //vmmc-supply = <&vddao_3v3>; |
| // //vqmmc-supply = <&vddio_ao1v8>; |
| // |
| // brcmf: wifi@1 { |
| // reg = <1>; |
| // compatible = "brcm,bcm4329-fmac"; |
| // }; |
| //}; |
| |
| /* SD card */ |
| &sd_emmc_b { |
| status = "okay"; |
| pinctrl-0 = <&sd_all_pins>; |
| pinctrl-1 = <&sd_1bit_pins>; |
| pinctrl-2 = <&sd_clk_gate_pins>; |
| pinctrl-names = "sd_default", |
| "sd_1bit_pins", |
| "clk-gate"; |
| bus-width = <4>; |
| cap-sd-highspeed; |
| // sd-uhs-sdr12; |
| // sd-uhs-sdr25; |
| // sd-uhs-sdr50; |
| // sd_uhs-sdr104; |
| max-frequency = <200000000>; |
| |
| //non-removable; |
| disable-wp; |
| amlogic,dram-access-quirk; |
| |
| cd-gpios = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>; |
| //dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; |
| //vmmc-supply = <&vddao_3v3>; |
| //vqmmc-supply = <&emmc_1v8>; |
| }; |
| |
| &sd_emmc_c { |
| status = "okay"; |
| pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; |
| pinctrl-1 = <&emmc_clk_gate_pins>; |
| pinctrl-names = "default", "clk-gate"; |
| |
| bus-width = <8>; |
| cap-mmc-highspeed; |
| //mmc-ddr-1_8v; |
| //mmc-hs200-1_8v; |
| //mmc-hs400-1_8v; |
| max-frequency = <200000000>; |
| non-removable; |
| disable-wp; |
| amlogic,dram-access-quirk; |
| |
| // mmc-pwrseq = <&emmc_pwrseq>; |
| // vmmc-supply = <&vddao_3v3>; |
| // vqmmc-supply = <&vddao_1v8>; |
| }; |
| |
| &crg30_otg { |
| status = "disabled"; |
| controller-type = <1>; |
| //gpio-vbus-power = "GPIOM_8"; |
| //gpios = <&gpio GPIOM_8 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &crg20 { |
| compatible = "amlogic, crg-host-drd"; |
| status = "disabled"; |
| }; |
| |
| &crg21 { |
| compatible = "amlogic, crg-host-drd"; |
| status = "disabled"; |
| }; |
| |
| &crg30_drd { |
| compatible = "amlogic, crg-drd"; |
| status = "disabled"; |
| }; |
| |
| &usb2_m31_0_phy { |
| status = "disabled"; |
| }; |
| |
| &usb3_m31_0_phy { |
| status = "disabled"; |
| portnum = <1>; |
| }; |
| |
| &crg_phy_20 { |
| status = "okay"; |
| portnum = <1>; |
| }; |
| |
| &crg3_phy_20 { |
| status = "okay"; |
| portnum = <0>; |
| }; |
| |
| &crg_phy_21 { |
| status = "okay"; |
| portnum = <1>; |
| }; |
| |
| &crg3_phy_21 { |
| status = "okay"; |
| portnum = <0>; |
| }; |
| |
| &crg_udc_3 { |
| status = "disabled"; |
| controller-type = <4>; |
| }; |
| |
| &spicc0 { //for TCON |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc0_pins_h>; |
| cs-gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>; |
| latency = <4>; |
| }; |
| |
| &spicc1 { //for UWB/LocalDimm |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc1_pins &spicc1_cs_pins>; |
| //cs-gpios = <&gpio GPIOH_22 GPIO_ACTIVE_HIGH>; |
| cs2clk-us = <2>; |
| clk2cs-us = <12>; |
| //latency = <2>; |
| //slave; |
| }; |
| |
| &spicc2 { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc2_pins_c>; |
| cs-gpios = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &amlvecm { |
| status = "disabled"; |
| gamma_en = <1>;/*1:enable ;0:disable*/ |
| wb_en = <1>;/*1:enable ;0:disable*/ |
| cm_en = <1>;/*1:enable ;0:disable*/ |
| wb_sel = <0>;/*1:mtx ;0:gainoff*/ |
| vlock_en = <1>;/*1:enable;0:disable*/ |
| vlock_mode = <0x8>; |
| /*vlock work mode: |
| *bit0:auto ENC |
| *bit1:auto PLL |
| *bit2:manual PLL |
| *bit3:manual ENC |
| *bit4:manual soft ENC |
| *bit5:manual MIX PLL ENC |
| */ |
| vlock_pll_m_limit = <1>; |
| vlock_line_limit = <2>; |
| interrupts = <0 207 1>; |
| interrupt-names = "lc_curve"; |
| }; |
