| /******************************************************************************** |
| * Marvell GPL License Option |
| * |
| * If you received this File from Marvell, you may opt to use, redistribute and/or |
| * modify this File in accordance with the terms and conditions of the General |
| * Public License Version 2, June 1991 (the "GPL License"), a copy of which is |
| * available along with the File in the license.txt file or by writing to the Free |
| * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or |
| * on the worldwide web at http://www.gnu.org/licenses/gpl.txt. |
| * |
| * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY |
| * DISCLAIMED. The GPL License provides additional details about this warranty |
| * disclaimer. |
| ******************************************************************************/ |
| |
| ////// |
| /// don't edit! auto-generated by docc: bcm.h |
| //////////////////////////////////////////////////////////// |
| #ifndef bcm_h |
| #define bcm_h (){} |
| |
| |
| #include "ctypes.h" |
| |
| #pragma pack(1) |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| #ifndef _DOCC_H_BITOPS_ |
| #define _DOCC_H_BITOPS_ (){} |
| |
| #define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0) |
| #define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb)) |
| #define _bCLRMASK_(b) (~_bSETMASK_(b)) |
| #define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb)) |
| #define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb))) |
| #define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0) |
| |
| #endif |
| |
| |
| |
| ////// |
| /// |
| /// $INTERFACE BCMINSFMT (4,4) |
| /// ### |
| /// * Pbridge instruction format |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 4 hdr |
| /// : CFGW 0x0 |
| /// : LDFN 0x1 |
| /// : RCMD 0x2 |
| /// : WCMD 0x3 |
| /// : RDAT 0x4 |
| /// : WDAT 0x5 |
| /// : SEMA 0x6 |
| /// : NULL 0xF |
| /// %% 28 # Stuffing bits... |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 4B, bits: 4b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMINSFMT |
| #define h_BCMINSFMT (){} |
| |
| #define BA_BCMINSFMT_hdr 0x0000 |
| #define B16BCMINSFMT_hdr 0x0000 |
| #define LSb32BCMINSFMT_hdr 0 |
| #define LSb16BCMINSFMT_hdr 0 |
| #define bBCMINSFMT_hdr 4 |
| #define MSK32BCMINSFMT_hdr 0x0000000F |
| #define BCMINSFMT_hdr_CFGW 0x0 |
| #define BCMINSFMT_hdr_LDFN 0x1 |
| #define BCMINSFMT_hdr_RCMD 0x2 |
| #define BCMINSFMT_hdr_WCMD 0x3 |
| #define BCMINSFMT_hdr_RDAT 0x4 |
| #define BCMINSFMT_hdr_WDAT 0x5 |
| #define BCMINSFMT_hdr_SEMA 0x6 |
| #define BCMINSFMT_hdr_NULL 0xF |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMINSFMT { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMINSFMT_hdr(r32) _BFGET_(r32, 3, 0) |
| #define SET32BCMINSFMT_hdr(r32,v) _BFSET_(r32, 3, 0,v) |
| #define GET16BCMINSFMT_hdr(r16) _BFGET_(r16, 3, 0) |
| #define SET16BCMINSFMT_hdr(r16,v) _BFSET_(r16, 3, 0,v) |
| |
| UNSG32 u_hdr : 4; |
| UNSG32 RSVDx0_b4 : 28; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMINSFMT; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMINSFMT_drvrd(SIE_BCMINSFMT *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMINSFMT_drvwr(SIE_BCMINSFMT *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMINSFMT_reset(SIE_BCMINSFMT *p); |
| SIGN32 BCMINSFMT_cmp (SIE_BCMINSFMT *p, SIE_BCMINSFMT *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMINSFMT_check(p,pie,pfx,hLOG) BCMINSFMT_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMINSFMT_print(p, pfx,hLOG) BCMINSFMT_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMINSFMT |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMCFGW biu (4,4) |
| /// ### |
| /// * BCM configure the register with the 32-bit data to the specified address (28-bit) |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 32 dat |
| /// ### |
| /// * The 32-bit data will be written to the specified address. |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 28 devAdr |
| /// ### |
| /// * The target register or memory address. |
| /// ### |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMCFGW |
| #define h_BCMCFGW (){} |
| |
| #define BA_BCMCFGW_dat 0x0000 |
| #define B16BCMCFGW_dat 0x0000 |
| #define LSb32BCMCFGW_dat 0 |
| #define LSb16BCMCFGW_dat 0 |
| #define bBCMCFGW_dat 32 |
| #define MSK32BCMCFGW_dat 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMCFGW_devAdr 0x0004 |
| #define B16BCMCFGW_devAdr 0x0004 |
| #define LSb32BCMCFGW_devAdr 0 |
| #define LSb16BCMCFGW_devAdr 0 |
| #define bBCMCFGW_devAdr 28 |
| #define MSK32BCMCFGW_devAdr 0x0FFFFFFF |
| |
| #define BA_BCMCFGW_hdr 0x0007 |
| #define B16BCMCFGW_hdr 0x0006 |
| #define LSb32BCMCFGW_hdr 28 |
| #define LSb16BCMCFGW_hdr 12 |
| #define bBCMCFGW_hdr 4 |
| #define MSK32BCMCFGW_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMCFGW { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMCFGW_dat(r32) _BFGET_(r32,31, 0) |
| #define SET32BCMCFGW_dat(r32,v) _BFSET_(r32,31, 0,v) |
| |
| UNSG32 u_dat : 32; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMCFGW_devAdr(r32) _BFGET_(r32,27, 0) |
| #define SET32BCMCFGW_devAdr(r32,v) _BFSET_(r32,27, 0,v) |
| |
| #define GET32BCMCFGW_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMCFGW_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMCFGW_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMCFGW_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_devAdr : 28; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMCFGW; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMCFGW_drvrd(SIE_BCMCFGW *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMCFGW_drvwr(SIE_BCMCFGW *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMCFGW_reset(SIE_BCMCFGW *p); |
| SIGN32 BCMCFGW_cmp (SIE_BCMCFGW *p, SIE_BCMCFGW *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMCFGW_check(p,pie,pfx,hLOG) BCMCFGW_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMCFGW_print(p, pfx,hLOG) BCMCFGW_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMCFGW |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMLDFN biu (4,4) |
| /// ### |
| /// * One instruction from descriptor channel, it is used to generate a dHub command for one of the function channel. |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 32 ddrAdr |
| /// ### |
| /// * Start address of the function located inside DDR. |
| /// * Byte address, should be always 64-bit Qword aligned. |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 16 size |
| /// ### |
| /// * Byte size. Should be always 64-bit Qword aligned. |
| /// ### |
| /// %unsigned 4 chId |
| /// ### |
| /// * Channel ID, indicate which device controller channel, only 0-13 are valid. |
| /// * The mapping between device controller channel and dHub channel is transparent to SW. |
| /// * HW will treat descriptor channel and device controller channel equally. |
| /// * 0 -> device controller channel #0 (descriptor channel) |
| /// * 1 -> device controller channel #1 |
| /// * 2 -> device controller channel #2 |
| /// * ...... |
| /// * 13 -> device controller channel #13 |
| /// * 14/15 are not valid. |
| /// ### |
| /// %unsigned 1 intr |
| /// ### |
| /// * 1: generate interrupt after dHub finished loading the function to dHub local buffer. |
| /// ### |
| /// %unsigned 7 rsvd |
| /// ### |
| /// * Reserved. |
| /// ### |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMLDFN |
| #define h_BCMLDFN (){} |
| |
| #define BA_BCMLDFN_ddrAdr 0x0000 |
| #define B16BCMLDFN_ddrAdr 0x0000 |
| #define LSb32BCMLDFN_ddrAdr 0 |
| #define LSb16BCMLDFN_ddrAdr 0 |
| #define bBCMLDFN_ddrAdr 32 |
| #define MSK32BCMLDFN_ddrAdr 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMLDFN_size 0x0004 |
| #define B16BCMLDFN_size 0x0004 |
| #define LSb32BCMLDFN_size 0 |
| #define LSb16BCMLDFN_size 0 |
| #define bBCMLDFN_size 16 |
| #define MSK32BCMLDFN_size 0x0000FFFF |
| |
| #define BA_BCMLDFN_chId 0x0006 |
| #define B16BCMLDFN_chId 0x0006 |
| #define LSb32BCMLDFN_chId 16 |
| #define LSb16BCMLDFN_chId 0 |
| #define bBCMLDFN_chId 4 |
| #define MSK32BCMLDFN_chId 0x000F0000 |
| |
| #define BA_BCMLDFN_intr 0x0006 |
| #define B16BCMLDFN_intr 0x0006 |
| #define LSb32BCMLDFN_intr 20 |
| #define LSb16BCMLDFN_intr 4 |
| #define bBCMLDFN_intr 1 |
| #define MSK32BCMLDFN_intr 0x00100000 |
| |
| #define BA_BCMLDFN_rsvd 0x0006 |
| #define B16BCMLDFN_rsvd 0x0006 |
| #define LSb32BCMLDFN_rsvd 21 |
| #define LSb16BCMLDFN_rsvd 5 |
| #define bBCMLDFN_rsvd 7 |
| #define MSK32BCMLDFN_rsvd 0x0FE00000 |
| |
| #define BA_BCMLDFN_hdr 0x0007 |
| #define B16BCMLDFN_hdr 0x0006 |
| #define LSb32BCMLDFN_hdr 28 |
| #define LSb16BCMLDFN_hdr 12 |
| #define bBCMLDFN_hdr 4 |
| #define MSK32BCMLDFN_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMLDFN { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMLDFN_ddrAdr(r32) _BFGET_(r32,31, 0) |
| #define SET32BCMLDFN_ddrAdr(r32,v) _BFSET_(r32,31, 0,v) |
| |
| UNSG32 u_ddrAdr : 32; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMLDFN_size(r32) _BFGET_(r32,15, 0) |
| #define SET32BCMLDFN_size(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16BCMLDFN_size(r16) _BFGET_(r16,15, 0) |
| #define SET16BCMLDFN_size(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define GET32BCMLDFN_chId(r32) _BFGET_(r32,19,16) |
| #define SET32BCMLDFN_chId(r32,v) _BFSET_(r32,19,16,v) |
| #define GET16BCMLDFN_chId(r16) _BFGET_(r16, 3, 0) |
| #define SET16BCMLDFN_chId(r16,v) _BFSET_(r16, 3, 0,v) |
| |
| #define GET32BCMLDFN_intr(r32) _BFGET_(r32,20,20) |
| #define SET32BCMLDFN_intr(r32,v) _BFSET_(r32,20,20,v) |
| #define GET16BCMLDFN_intr(r16) _BFGET_(r16, 4, 4) |
| #define SET16BCMLDFN_intr(r16,v) _BFSET_(r16, 4, 4,v) |
| |
| #define GET32BCMLDFN_rsvd(r32) _BFGET_(r32,27,21) |
| #define SET32BCMLDFN_rsvd(r32,v) _BFSET_(r32,27,21,v) |
| #define GET16BCMLDFN_rsvd(r16) _BFGET_(r16,11, 5) |
| #define SET16BCMLDFN_rsvd(r16,v) _BFSET_(r16,11, 5,v) |
| |
| #define GET32BCMLDFN_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMLDFN_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMLDFN_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMLDFN_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_size : 16; |
| UNSG32 u_chId : 4; |
| UNSG32 u_intr : 1; |
| UNSG32 u_rsvd : 7; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMLDFN; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMLDFN_drvrd(SIE_BCMLDFN *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMLDFN_drvwr(SIE_BCMLDFN *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMLDFN_reset(SIE_BCMLDFN *p); |
| SIGN32 BCMLDFN_cmp (SIE_BCMLDFN *p, SIE_BCMLDFN *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMLDFN_check(p,pie,pfx,hLOG) BCMLDFN_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMLDFN_print(p, pfx,hLOG) BCMLDFN_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMLDFN |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMRDAT biu (4,4) |
| /// ### |
| /// * BCM forward the dHub 64-bit read data to the HW device. |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 16 size |
| /// ### |
| /// * Number of byte from DDR. |
| /// ### |
| /// %unsigned 2 mode |
| /// : byte 0x0 |
| /// : word 0x1 |
| /// : dword 0x2 |
| /// ### |
| /// * Mode defines the bus transaction size. |
| /// ### |
| /// %unsigned 1 endian |
| /// : little_endian 0x0 |
| /// : bit_endian 0x1 |
| /// ### |
| /// * Defines the endianess of the byte inside one bus transaction. |
| /// ### |
| /// %unsigned 1 last |
| /// ### |
| /// * Every `RCMD could possibly associate with several `RDAT instructions, this bit will be used to notify the arbiter to release the bus. For most of the cases, there is only one `RDAT instruction following the `RCMD instruction. |
| /// ### |
| /// %unsigned 5 cUpdId |
| /// ### |
| /// * Consumer update ID. A non-zero value will trigger the semaphore consumer update after the command finish. |
| /// * Will be used to generate the dma_ack signal for apb devices. |
| /// ### |
| /// %unsigned 5 pUpdId |
| /// ### |
| /// * Producer update ID, A non-zero value will trigger the semaphore producer update after the command finish. |
| /// * It can be used to trigger an interrupt after finish of the data copy from dHub to devCtl. |
| /// ### |
| /// %unsigned 2 rsvd0 |
| /// ### |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 28 devAdr |
| /// ### |
| /// * The target register or memory address. --> dHub.RDat[31:0] |
| /// ### |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMRDAT |
| #define h_BCMRDAT (){} |
| |
| #define BA_BCMRDAT_size 0x0000 |
| #define B16BCMRDAT_size 0x0000 |
| #define LSb32BCMRDAT_size 0 |
| #define LSb16BCMRDAT_size 0 |
| #define bBCMRDAT_size 16 |
| #define MSK32BCMRDAT_size 0x0000FFFF |
| |
| #define BA_BCMRDAT_mode 0x0002 |
| #define B16BCMRDAT_mode 0x0002 |
| #define LSb32BCMRDAT_mode 16 |
| #define LSb16BCMRDAT_mode 0 |
| #define bBCMRDAT_mode 2 |
| #define MSK32BCMRDAT_mode 0x00030000 |
| #define BCMRDAT_mode_byte 0x0 |
| #define BCMRDAT_mode_word 0x1 |
| #define BCMRDAT_mode_dword 0x2 |
| |
| #define BA_BCMRDAT_endian 0x0002 |
| #define B16BCMRDAT_endian 0x0002 |
| #define LSb32BCMRDAT_endian 18 |
| #define LSb16BCMRDAT_endian 2 |
| #define bBCMRDAT_endian 1 |
| #define MSK32BCMRDAT_endian 0x00040000 |
| #define BCMRDAT_endian_little_endian 0x0 |
| #define BCMRDAT_endian_bit_endian 0x1 |
| |
| #define BA_BCMRDAT_last 0x0002 |
| #define B16BCMRDAT_last 0x0002 |
| #define LSb32BCMRDAT_last 19 |
| #define LSb16BCMRDAT_last 3 |
| #define bBCMRDAT_last 1 |
| #define MSK32BCMRDAT_last 0x00080000 |
| |
| #define BA_BCMRDAT_cUpdId 0x0002 |
| #define B16BCMRDAT_cUpdId 0x0002 |
| #define LSb32BCMRDAT_cUpdId 20 |
| #define LSb16BCMRDAT_cUpdId 4 |
| #define bBCMRDAT_cUpdId 5 |
| #define MSK32BCMRDAT_cUpdId 0x01F00000 |
| |
| #define BA_BCMRDAT_pUpdId 0x0003 |
| #define B16BCMRDAT_pUpdId 0x0002 |
| #define LSb32BCMRDAT_pUpdId 25 |
| #define LSb16BCMRDAT_pUpdId 9 |
| #define bBCMRDAT_pUpdId 5 |
| #define MSK32BCMRDAT_pUpdId 0x3E000000 |
| |
| #define BA_BCMRDAT_rsvd0 0x0003 |
| #define B16BCMRDAT_rsvd0 0x0002 |
| #define LSb32BCMRDAT_rsvd0 30 |
| #define LSb16BCMRDAT_rsvd0 14 |
| #define bBCMRDAT_rsvd0 2 |
| #define MSK32BCMRDAT_rsvd0 0xC0000000 |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMRDAT_devAdr 0x0004 |
| #define B16BCMRDAT_devAdr 0x0004 |
| #define LSb32BCMRDAT_devAdr 0 |
| #define LSb16BCMRDAT_devAdr 0 |
| #define bBCMRDAT_devAdr 28 |
| #define MSK32BCMRDAT_devAdr 0x0FFFFFFF |
| |
| #define BA_BCMRDAT_hdr 0x0007 |
| #define B16BCMRDAT_hdr 0x0006 |
| #define LSb32BCMRDAT_hdr 28 |
| #define LSb16BCMRDAT_hdr 12 |
| #define bBCMRDAT_hdr 4 |
| #define MSK32BCMRDAT_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMRDAT { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMRDAT_size(r32) _BFGET_(r32,15, 0) |
| #define SET32BCMRDAT_size(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16BCMRDAT_size(r16) _BFGET_(r16,15, 0) |
| #define SET16BCMRDAT_size(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define GET32BCMRDAT_mode(r32) _BFGET_(r32,17,16) |
| #define SET32BCMRDAT_mode(r32,v) _BFSET_(r32,17,16,v) |
| #define GET16BCMRDAT_mode(r16) _BFGET_(r16, 1, 0) |
| #define SET16BCMRDAT_mode(r16,v) _BFSET_(r16, 1, 0,v) |
| |
| #define GET32BCMRDAT_endian(r32) _BFGET_(r32,18,18) |
| #define SET32BCMRDAT_endian(r32,v) _BFSET_(r32,18,18,v) |
| #define GET16BCMRDAT_endian(r16) _BFGET_(r16, 2, 2) |
| #define SET16BCMRDAT_endian(r16,v) _BFSET_(r16, 2, 2,v) |
| |
| #define GET32BCMRDAT_last(r32) _BFGET_(r32,19,19) |
| #define SET32BCMRDAT_last(r32,v) _BFSET_(r32,19,19,v) |
| #define GET16BCMRDAT_last(r16) _BFGET_(r16, 3, 3) |
| #define SET16BCMRDAT_last(r16,v) _BFSET_(r16, 3, 3,v) |
| |
| #define GET32BCMRDAT_cUpdId(r32) _BFGET_(r32,24,20) |
| #define SET32BCMRDAT_cUpdId(r32,v) _BFSET_(r32,24,20,v) |
| #define GET16BCMRDAT_cUpdId(r16) _BFGET_(r16, 8, 4) |
| #define SET16BCMRDAT_cUpdId(r16,v) _BFSET_(r16, 8, 4,v) |
| |
| #define GET32BCMRDAT_pUpdId(r32) _BFGET_(r32,29,25) |
| #define SET32BCMRDAT_pUpdId(r32,v) _BFSET_(r32,29,25,v) |
| #define GET16BCMRDAT_pUpdId(r16) _BFGET_(r16,13, 9) |
| #define SET16BCMRDAT_pUpdId(r16,v) _BFSET_(r16,13, 9,v) |
| |
| #define GET32BCMRDAT_rsvd0(r32) _BFGET_(r32,31,30) |
| #define SET32BCMRDAT_rsvd0(r32,v) _BFSET_(r32,31,30,v) |
| #define GET16BCMRDAT_rsvd0(r16) _BFGET_(r16,15,14) |
| #define SET16BCMRDAT_rsvd0(r16,v) _BFSET_(r16,15,14,v) |
| |
| UNSG32 u_size : 16; |
| UNSG32 u_mode : 2; |
| UNSG32 u_endian : 1; |
| UNSG32 u_last : 1; |
| UNSG32 u_cUpdId : 5; |
| UNSG32 u_pUpdId : 5; |
| UNSG32 u_rsvd0 : 2; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMRDAT_devAdr(r32) _BFGET_(r32,27, 0) |
| #define SET32BCMRDAT_devAdr(r32,v) _BFSET_(r32,27, 0,v) |
| |
| #define GET32BCMRDAT_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMRDAT_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMRDAT_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMRDAT_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_devAdr : 28; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMRDAT; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMRDAT_drvrd(SIE_BCMRDAT *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMRDAT_drvwr(SIE_BCMRDAT *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMRDAT_reset(SIE_BCMRDAT *p); |
| SIGN32 BCMRDAT_cmp (SIE_BCMRDAT *p, SIE_BCMRDAT *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMRDAT_check(p,pie,pfx,hLOG) BCMRDAT_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMRDAT_print(p, pfx,hLOG) BCMRDAT_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMRDAT |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMWDAT biu (4,4) |
| /// ### |
| /// * BCM read 64-bit data from HW device, and forward it to dHub write data queue. |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 16 size |
| /// ### |
| /// * Number of byte from DDR. Should be bus transaction aligned |
| /// ### |
| /// %unsigned 2 mode |
| /// : byte 0x0 |
| /// : word 0x1 |
| /// : dword 0x2 |
| /// ### |
| /// * Mode defines the bus transaction size. |
| /// ### |
| /// %unsigned 1 endian |
| /// : little_endian 0x0 |
| /// : big_endian 0x1 |
| /// ### |
| /// * Defines the endianess of the byte inside one bus transaction. |
| /// ### |
| /// %unsigned 1 last |
| /// ### |
| /// * 1: it will notify arbiter to release the bus after the completion of this instruction. |
| /// ### |
| /// %unsigned 5 cUpdId |
| /// ### |
| /// * Consumer update ID. A non-zero value will trigger the semaphore consumer update after the command finish. |
| /// * Will be used to generate the dma_ack signal for apb devices. |
| /// ### |
| /// %unsigned 7 rsvd0 |
| /// ### |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 28 devAdr |
| /// ### |
| /// * The target register or memory address. --> dHub.WDat[31:0] |
| /// ### |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMWDAT |
| #define h_BCMWDAT (){} |
| |
| #define BA_BCMWDAT_size 0x0000 |
| #define B16BCMWDAT_size 0x0000 |
| #define LSb32BCMWDAT_size 0 |
| #define LSb16BCMWDAT_size 0 |
| #define bBCMWDAT_size 16 |
| #define MSK32BCMWDAT_size 0x0000FFFF |
| |
| #define BA_BCMWDAT_mode 0x0002 |
| #define B16BCMWDAT_mode 0x0002 |
| #define LSb32BCMWDAT_mode 16 |
| #define LSb16BCMWDAT_mode 0 |
| #define bBCMWDAT_mode 2 |
| #define MSK32BCMWDAT_mode 0x00030000 |
| #define BCMWDAT_mode_byte 0x0 |
| #define BCMWDAT_mode_word 0x1 |
| #define BCMWDAT_mode_dword 0x2 |
| |
| #define BA_BCMWDAT_endian 0x0002 |
| #define B16BCMWDAT_endian 0x0002 |
| #define LSb32BCMWDAT_endian 18 |
| #define LSb16BCMWDAT_endian 2 |
| #define bBCMWDAT_endian 1 |
| #define MSK32BCMWDAT_endian 0x00040000 |
| #define BCMWDAT_endian_little_endian 0x0 |
| #define BCMWDAT_endian_big_endian 0x1 |
| |
| #define BA_BCMWDAT_last 0x0002 |
| #define B16BCMWDAT_last 0x0002 |
| #define LSb32BCMWDAT_last 19 |
| #define LSb16BCMWDAT_last 3 |
| #define bBCMWDAT_last 1 |
| #define MSK32BCMWDAT_last 0x00080000 |
| |
| #define BA_BCMWDAT_cUpdId 0x0002 |
| #define B16BCMWDAT_cUpdId 0x0002 |
| #define LSb32BCMWDAT_cUpdId 20 |
| #define LSb16BCMWDAT_cUpdId 4 |
| #define bBCMWDAT_cUpdId 5 |
| #define MSK32BCMWDAT_cUpdId 0x01F00000 |
| |
| #define BA_BCMWDAT_rsvd0 0x0003 |
| #define B16BCMWDAT_rsvd0 0x0002 |
| #define LSb32BCMWDAT_rsvd0 25 |
| #define LSb16BCMWDAT_rsvd0 9 |
| #define bBCMWDAT_rsvd0 7 |
| #define MSK32BCMWDAT_rsvd0 0xFE000000 |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMWDAT_devAdr 0x0004 |
| #define B16BCMWDAT_devAdr 0x0004 |
| #define LSb32BCMWDAT_devAdr 0 |
| #define LSb16BCMWDAT_devAdr 0 |
| #define bBCMWDAT_devAdr 28 |
| #define MSK32BCMWDAT_devAdr 0x0FFFFFFF |
| |
| #define BA_BCMWDAT_hdr 0x0007 |
| #define B16BCMWDAT_hdr 0x0006 |
| #define LSb32BCMWDAT_hdr 28 |
| #define LSb16BCMWDAT_hdr 12 |
| #define bBCMWDAT_hdr 4 |
| #define MSK32BCMWDAT_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMWDAT { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMWDAT_size(r32) _BFGET_(r32,15, 0) |
| #define SET32BCMWDAT_size(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16BCMWDAT_size(r16) _BFGET_(r16,15, 0) |
| #define SET16BCMWDAT_size(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define GET32BCMWDAT_mode(r32) _BFGET_(r32,17,16) |
| #define SET32BCMWDAT_mode(r32,v) _BFSET_(r32,17,16,v) |
| #define GET16BCMWDAT_mode(r16) _BFGET_(r16, 1, 0) |
| #define SET16BCMWDAT_mode(r16,v) _BFSET_(r16, 1, 0,v) |
| |
| #define GET32BCMWDAT_endian(r32) _BFGET_(r32,18,18) |
| #define SET32BCMWDAT_endian(r32,v) _BFSET_(r32,18,18,v) |
| #define GET16BCMWDAT_endian(r16) _BFGET_(r16, 2, 2) |
| #define SET16BCMWDAT_endian(r16,v) _BFSET_(r16, 2, 2,v) |
| |
| #define GET32BCMWDAT_last(r32) _BFGET_(r32,19,19) |
| #define SET32BCMWDAT_last(r32,v) _BFSET_(r32,19,19,v) |
| #define GET16BCMWDAT_last(r16) _BFGET_(r16, 3, 3) |
| #define SET16BCMWDAT_last(r16,v) _BFSET_(r16, 3, 3,v) |
| |
| #define GET32BCMWDAT_cUpdId(r32) _BFGET_(r32,24,20) |
| #define SET32BCMWDAT_cUpdId(r32,v) _BFSET_(r32,24,20,v) |
| #define GET16BCMWDAT_cUpdId(r16) _BFGET_(r16, 8, 4) |
| #define SET16BCMWDAT_cUpdId(r16,v) _BFSET_(r16, 8, 4,v) |
| |
| #define GET32BCMWDAT_rsvd0(r32) _BFGET_(r32,31,25) |
| #define SET32BCMWDAT_rsvd0(r32,v) _BFSET_(r32,31,25,v) |
| #define GET16BCMWDAT_rsvd0(r16) _BFGET_(r16,15, 9) |
| #define SET16BCMWDAT_rsvd0(r16,v) _BFSET_(r16,15, 9,v) |
| |
| UNSG32 u_size : 16; |
| UNSG32 u_mode : 2; |
| UNSG32 u_endian : 1; |
| UNSG32 u_last : 1; |
| UNSG32 u_cUpdId : 5; |
| UNSG32 u_rsvd0 : 7; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMWDAT_devAdr(r32) _BFGET_(r32,27, 0) |
| #define SET32BCMWDAT_devAdr(r32,v) _BFSET_(r32,27, 0,v) |
| |
| #define GET32BCMWDAT_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMWDAT_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMWDAT_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMWDAT_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_devAdr : 28; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMWDAT; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMWDAT_drvrd(SIE_BCMWDAT *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMWDAT_drvwr(SIE_BCMWDAT *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMWDAT_reset(SIE_BCMWDAT *p); |
| SIGN32 BCMWDAT_cmp (SIE_BCMWDAT *p, SIE_BCMWDAT *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMWDAT_check(p,pie,pfx,hLOG) BCMWDAT_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMWDAT_print(p, pfx,hLOG) BCMWDAT_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMWDAT |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMRCMD biu (4,4) |
| /// ### |
| /// * One instruction used to generate the dHub command for read data channel. |
| /// * The semID in this instruction is used to access the semaphore block inside dHub |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 32 ddrAdr |
| /// ### |
| /// * Start address of the read data buffer. |
| /// * 64-bit qword aligned byte address. |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 16 size |
| /// ### |
| /// * Number of bytes that will be transferred from DDR to dHub. |
| /// ### |
| /// %unsigned 5 chkSemId |
| /// ### |
| /// * ID of semaphore to check before command execution. |
| /// * Only the first 32 semaphore can be used. |
| /// * Consumer check. |
| /// ### |
| /// %unsigned 5 updSemId |
| /// ### |
| /// * ID of semaphore to update after command finish |
| /// * Only the first 32 semaphore can be used. |
| /// * Consumer update. |
| /// ### |
| /// %unsigned 2 rsvd |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMRCMD |
| #define h_BCMRCMD (){} |
| |
| #define BA_BCMRCMD_ddrAdr 0x0000 |
| #define B16BCMRCMD_ddrAdr 0x0000 |
| #define LSb32BCMRCMD_ddrAdr 0 |
| #define LSb16BCMRCMD_ddrAdr 0 |
| #define bBCMRCMD_ddrAdr 32 |
| #define MSK32BCMRCMD_ddrAdr 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMRCMD_size 0x0004 |
| #define B16BCMRCMD_size 0x0004 |
| #define LSb32BCMRCMD_size 0 |
| #define LSb16BCMRCMD_size 0 |
| #define bBCMRCMD_size 16 |
| #define MSK32BCMRCMD_size 0x0000FFFF |
| |
| #define BA_BCMRCMD_chkSemId 0x0006 |
| #define B16BCMRCMD_chkSemId 0x0006 |
| #define LSb32BCMRCMD_chkSemId 16 |
| #define LSb16BCMRCMD_chkSemId 0 |
| #define bBCMRCMD_chkSemId 5 |
| #define MSK32BCMRCMD_chkSemId 0x001F0000 |
| |
| #define BA_BCMRCMD_updSemId 0x0006 |
| #define B16BCMRCMD_updSemId 0x0006 |
| #define LSb32BCMRCMD_updSemId 21 |
| #define LSb16BCMRCMD_updSemId 5 |
| #define bBCMRCMD_updSemId 5 |
| #define MSK32BCMRCMD_updSemId 0x03E00000 |
| |
| #define BA_BCMRCMD_rsvd 0x0007 |
| #define B16BCMRCMD_rsvd 0x0006 |
| #define LSb32BCMRCMD_rsvd 26 |
| #define LSb16BCMRCMD_rsvd 10 |
| #define bBCMRCMD_rsvd 2 |
| #define MSK32BCMRCMD_rsvd 0x0C000000 |
| |
| #define BA_BCMRCMD_hdr 0x0007 |
| #define B16BCMRCMD_hdr 0x0006 |
| #define LSb32BCMRCMD_hdr 28 |
| #define LSb16BCMRCMD_hdr 12 |
| #define bBCMRCMD_hdr 4 |
| #define MSK32BCMRCMD_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMRCMD { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMRCMD_ddrAdr(r32) _BFGET_(r32,31, 0) |
| #define SET32BCMRCMD_ddrAdr(r32,v) _BFSET_(r32,31, 0,v) |
| |
| UNSG32 u_ddrAdr : 32; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMRCMD_size(r32) _BFGET_(r32,15, 0) |
| #define SET32BCMRCMD_size(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16BCMRCMD_size(r16) _BFGET_(r16,15, 0) |
| #define SET16BCMRCMD_size(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define GET32BCMRCMD_chkSemId(r32) _BFGET_(r32,20,16) |
| #define SET32BCMRCMD_chkSemId(r32,v) _BFSET_(r32,20,16,v) |
| #define GET16BCMRCMD_chkSemId(r16) _BFGET_(r16, 4, 0) |
| #define SET16BCMRCMD_chkSemId(r16,v) _BFSET_(r16, 4, 0,v) |
| |
| #define GET32BCMRCMD_updSemId(r32) _BFGET_(r32,25,21) |
| #define SET32BCMRCMD_updSemId(r32,v) _BFSET_(r32,25,21,v) |
| #define GET16BCMRCMD_updSemId(r16) _BFGET_(r16, 9, 5) |
| #define SET16BCMRCMD_updSemId(r16,v) _BFSET_(r16, 9, 5,v) |
| |
| #define GET32BCMRCMD_rsvd(r32) _BFGET_(r32,27,26) |
| #define SET32BCMRCMD_rsvd(r32,v) _BFSET_(r32,27,26,v) |
| #define GET16BCMRCMD_rsvd(r16) _BFGET_(r16,11,10) |
| #define SET16BCMRCMD_rsvd(r16,v) _BFSET_(r16,11,10,v) |
| |
| #define GET32BCMRCMD_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMRCMD_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMRCMD_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMRCMD_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_size : 16; |
| UNSG32 u_chkSemId : 5; |
| UNSG32 u_updSemId : 5; |
| UNSG32 u_rsvd : 2; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMRCMD; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMRCMD_drvrd(SIE_BCMRCMD *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMRCMD_drvwr(SIE_BCMRCMD *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMRCMD_reset(SIE_BCMRCMD *p); |
| SIGN32 BCMRCMD_cmp (SIE_BCMRCMD *p, SIE_BCMRCMD *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMRCMD_check(p,pie,pfx,hLOG) BCMRCMD_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMRCMD_print(p, pfx,hLOG) BCMRCMD_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMRCMD |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMWCMD biu (4,4) |
| /// ### |
| /// * One instruction used to generate the dHub command for write data channel. |
| /// * The semID in this instruction is used to access the semaphore block inside dHub |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 32 ddrAdr |
| /// ### |
| /// * Start address of the read data buffer. |
| /// * 64-bit qword aligned byte address. |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 16 size |
| /// ### |
| /// * Number of bytes that will be transferred from DDR to dHub. |
| /// ### |
| /// %unsigned 5 chkSemId |
| /// ### |
| /// * ID of semaphore to check before command execution. |
| /// * Only the first 32 semaphores inside dHub can be used. |
| /// ### |
| /// %unsigned 5 updSemId |
| /// ### |
| /// * ID of semaphore to update after command finish |
| /// * Only the first 32 semaphores inside can be used. |
| /// ### |
| /// %unsigned 2 rsvd |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMWCMD |
| #define h_BCMWCMD (){} |
| |
| #define BA_BCMWCMD_ddrAdr 0x0000 |
| #define B16BCMWCMD_ddrAdr 0x0000 |
| #define LSb32BCMWCMD_ddrAdr 0 |
| #define LSb16BCMWCMD_ddrAdr 0 |
| #define bBCMWCMD_ddrAdr 32 |
| #define MSK32BCMWCMD_ddrAdr 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMWCMD_size 0x0004 |
| #define B16BCMWCMD_size 0x0004 |
| #define LSb32BCMWCMD_size 0 |
| #define LSb16BCMWCMD_size 0 |
| #define bBCMWCMD_size 16 |
| #define MSK32BCMWCMD_size 0x0000FFFF |
| |
| #define BA_BCMWCMD_chkSemId 0x0006 |
| #define B16BCMWCMD_chkSemId 0x0006 |
| #define LSb32BCMWCMD_chkSemId 16 |
| #define LSb16BCMWCMD_chkSemId 0 |
| #define bBCMWCMD_chkSemId 5 |
| #define MSK32BCMWCMD_chkSemId 0x001F0000 |
| |
| #define BA_BCMWCMD_updSemId 0x0006 |
| #define B16BCMWCMD_updSemId 0x0006 |
| #define LSb32BCMWCMD_updSemId 21 |
| #define LSb16BCMWCMD_updSemId 5 |
| #define bBCMWCMD_updSemId 5 |
| #define MSK32BCMWCMD_updSemId 0x03E00000 |
| |
| #define BA_BCMWCMD_rsvd 0x0007 |
| #define B16BCMWCMD_rsvd 0x0006 |
| #define LSb32BCMWCMD_rsvd 26 |
| #define LSb16BCMWCMD_rsvd 10 |
| #define bBCMWCMD_rsvd 2 |
| #define MSK32BCMWCMD_rsvd 0x0C000000 |
| |
| #define BA_BCMWCMD_hdr 0x0007 |
| #define B16BCMWCMD_hdr 0x0006 |
| #define LSb32BCMWCMD_hdr 28 |
| #define LSb16BCMWCMD_hdr 12 |
| #define bBCMWCMD_hdr 4 |
| #define MSK32BCMWCMD_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMWCMD { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMWCMD_ddrAdr(r32) _BFGET_(r32,31, 0) |
| #define SET32BCMWCMD_ddrAdr(r32,v) _BFSET_(r32,31, 0,v) |
| |
| UNSG32 u_ddrAdr : 32; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMWCMD_size(r32) _BFGET_(r32,15, 0) |
| #define SET32BCMWCMD_size(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16BCMWCMD_size(r16) _BFGET_(r16,15, 0) |
| #define SET16BCMWCMD_size(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define GET32BCMWCMD_chkSemId(r32) _BFGET_(r32,20,16) |
| #define SET32BCMWCMD_chkSemId(r32,v) _BFSET_(r32,20,16,v) |
| #define GET16BCMWCMD_chkSemId(r16) _BFGET_(r16, 4, 0) |
| #define SET16BCMWCMD_chkSemId(r16,v) _BFSET_(r16, 4, 0,v) |
| |
| #define GET32BCMWCMD_updSemId(r32) _BFGET_(r32,25,21) |
| #define SET32BCMWCMD_updSemId(r32,v) _BFSET_(r32,25,21,v) |
| #define GET16BCMWCMD_updSemId(r16) _BFGET_(r16, 9, 5) |
| #define SET16BCMWCMD_updSemId(r16,v) _BFSET_(r16, 9, 5,v) |
| |
| #define GET32BCMWCMD_rsvd(r32) _BFGET_(r32,27,26) |
| #define SET32BCMWCMD_rsvd(r32,v) _BFSET_(r32,27,26,v) |
| #define GET16BCMWCMD_rsvd(r16) _BFGET_(r16,11,10) |
| #define SET16BCMWCMD_rsvd(r16,v) _BFSET_(r16,11,10,v) |
| |
| #define GET32BCMWCMD_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMWCMD_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMWCMD_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMWCMD_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_size : 16; |
| UNSG32 u_chkSemId : 5; |
| UNSG32 u_updSemId : 5; |
| UNSG32 u_rsvd : 2; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMWCMD; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMWCMD_drvrd(SIE_BCMWCMD *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMWCMD_drvwr(SIE_BCMWCMD *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMWCMD_reset(SIE_BCMWCMD *p); |
| SIGN32 BCMWCMD_cmp (SIE_BCMWCMD *p, SIE_BCMWCMD *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMWCMD_check(p,pie,pfx,hLOG) BCMWCMD_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMWCMD_print(p, pfx,hLOG) BCMWCMD_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMWCMD |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMSEMA biu (4,4) |
| /// ### |
| /// * Pbridge semaphore operation, used for synchronization between dHub and HW devices. |
| /// * [00:31] |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// %unsigned 5 pUpdId |
| /// ### |
| /// * Producer update ID, 0 indicate no operation |
| /// ### |
| /// %unsigned 5 pChkId |
| /// ### |
| /// * Producer check ID, 0 indicate no operation |
| /// ### |
| /// %unsigned 5 cUpdId |
| /// ### |
| /// * Consumer update ID, 0 indicate no operation |
| /// ### |
| /// %unsigned 5 cChkId |
| /// ### |
| /// * Consumer check ID, 0 indicate no operation |
| /// ### |
| /// %unsigned 12 rsvd0 |
| /// ### |
| /// * [32:63] |
| /// ### |
| /// @ 0x00004 (P) |
| /// %unsigned 28 rsvd1 |
| /// %unsigned 4 hdr |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 64b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMSEMA |
| #define h_BCMSEMA (){} |
| |
| #define BA_BCMSEMA_pUpdId 0x0000 |
| #define B16BCMSEMA_pUpdId 0x0000 |
| #define LSb32BCMSEMA_pUpdId 0 |
| #define LSb16BCMSEMA_pUpdId 0 |
| #define bBCMSEMA_pUpdId 5 |
| #define MSK32BCMSEMA_pUpdId 0x0000001F |
| |
| #define BA_BCMSEMA_pChkId 0x0000 |
| #define B16BCMSEMA_pChkId 0x0000 |
| #define LSb32BCMSEMA_pChkId 5 |
| #define LSb16BCMSEMA_pChkId 5 |
| #define bBCMSEMA_pChkId 5 |
| #define MSK32BCMSEMA_pChkId 0x000003E0 |
| |
| #define BA_BCMSEMA_cUpdId 0x0001 |
| #define B16BCMSEMA_cUpdId 0x0000 |
| #define LSb32BCMSEMA_cUpdId 10 |
| #define LSb16BCMSEMA_cUpdId 10 |
| #define bBCMSEMA_cUpdId 5 |
| #define MSK32BCMSEMA_cUpdId 0x00007C00 |
| |
| #define BA_BCMSEMA_cChkId 0x0001 |
| #define B16BCMSEMA_cChkId 0x0000 |
| #define LSb32BCMSEMA_cChkId 15 |
| #define LSb16BCMSEMA_cChkId 15 |
| #define bBCMSEMA_cChkId 5 |
| #define MSK32BCMSEMA_cChkId 0x000F8000 |
| |
| #define BA_BCMSEMA_rsvd0 0x0002 |
| #define B16BCMSEMA_rsvd0 0x0002 |
| #define LSb32BCMSEMA_rsvd0 20 |
| #define LSb16BCMSEMA_rsvd0 4 |
| #define bBCMSEMA_rsvd0 12 |
| #define MSK32BCMSEMA_rsvd0 0xFFF00000 |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMSEMA_rsvd1 0x0004 |
| #define B16BCMSEMA_rsvd1 0x0004 |
| #define LSb32BCMSEMA_rsvd1 0 |
| #define LSb16BCMSEMA_rsvd1 0 |
| #define bBCMSEMA_rsvd1 28 |
| #define MSK32BCMSEMA_rsvd1 0x0FFFFFFF |
| |
| #define BA_BCMSEMA_hdr 0x0007 |
| #define B16BCMSEMA_hdr 0x0006 |
| #define LSb32BCMSEMA_hdr 28 |
| #define LSb16BCMSEMA_hdr 12 |
| #define bBCMSEMA_hdr 4 |
| #define MSK32BCMSEMA_hdr 0xF0000000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMSEMA { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMSEMA_pUpdId(r32) _BFGET_(r32, 4, 0) |
| #define SET32BCMSEMA_pUpdId(r32,v) _BFSET_(r32, 4, 0,v) |
| #define GET16BCMSEMA_pUpdId(r16) _BFGET_(r16, 4, 0) |
| #define SET16BCMSEMA_pUpdId(r16,v) _BFSET_(r16, 4, 0,v) |
| |
| #define GET32BCMSEMA_pChkId(r32) _BFGET_(r32, 9, 5) |
| #define SET32BCMSEMA_pChkId(r32,v) _BFSET_(r32, 9, 5,v) |
| #define GET16BCMSEMA_pChkId(r16) _BFGET_(r16, 9, 5) |
| #define SET16BCMSEMA_pChkId(r16,v) _BFSET_(r16, 9, 5,v) |
| |
| #define GET32BCMSEMA_cUpdId(r32) _BFGET_(r32,14,10) |
| #define SET32BCMSEMA_cUpdId(r32,v) _BFSET_(r32,14,10,v) |
| #define GET16BCMSEMA_cUpdId(r16) _BFGET_(r16,14,10) |
| #define SET16BCMSEMA_cUpdId(r16,v) _BFSET_(r16,14,10,v) |
| |
| #define GET32BCMSEMA_cChkId(r32) _BFGET_(r32,19,15) |
| #define SET32BCMSEMA_cChkId(r32,v) _BFSET_(r32,19,15,v) |
| |
| #define GET32BCMSEMA_rsvd0(r32) _BFGET_(r32,31,20) |
| #define SET32BCMSEMA_rsvd0(r32,v) _BFSET_(r32,31,20,v) |
| #define GET16BCMSEMA_rsvd0(r16) _BFGET_(r16,15, 4) |
| #define SET16BCMSEMA_rsvd0(r16,v) _BFSET_(r16,15, 4,v) |
| |
| UNSG32 u_pUpdId : 5; |
| UNSG32 u_pChkId : 5; |
| UNSG32 u_cUpdId : 5; |
| UNSG32 u_cChkId : 5; |
| UNSG32 u_rsvd0 : 12; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMSEMA_rsvd1(r32) _BFGET_(r32,27, 0) |
| #define SET32BCMSEMA_rsvd1(r32,v) _BFSET_(r32,27, 0,v) |
| |
| #define GET32BCMSEMA_hdr(r32) _BFGET_(r32,31,28) |
| #define SET32BCMSEMA_hdr(r32,v) _BFSET_(r32,31,28,v) |
| #define GET16BCMSEMA_hdr(r16) _BFGET_(r16,15,12) |
| #define SET16BCMSEMA_hdr(r16,v) _BFSET_(r16,15,12,v) |
| |
| UNSG32 u_rsvd1 : 28; |
| UNSG32 u_hdr : 4; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMSEMA; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMSEMA_drvrd(SIE_BCMSEMA *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMSEMA_drvwr(SIE_BCMSEMA *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMSEMA_reset(SIE_BCMSEMA *p); |
| SIGN32 BCMSEMA_cmp (SIE_BCMSEMA *p, SIE_BCMSEMA *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMSEMA_check(p,pie,pfx,hLOG) BCMSEMA_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMSEMA_print(p, pfx,hLOG) BCMSEMA_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMSEMA |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCMErrSt biu (4,4) |
| /// ### |
| /// * BCM Error status information |
| /// * Timeout or error response will trigger the register update and also generate a one clock cycle interrupt pulse. This will happen only when the interrupt status is “0”. |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (R-) |
| /// %unsigned 32 addr |
| /// ### |
| /// * When AHB master can not get the correct response or can not get response in a certain # of clock cycles. It will set this register to indicate CPU the |
| /// ### |
| /// @ 0x00004 (R-) |
| /// %unsigned 1 op |
| /// ### |
| /// * 0 : read |
| /// * 1 : write |
| /// * Indicate CPU whether it is a read error or write error. |
| /// ### |
| /// %unsigned 1 mode |
| /// : Timeout 0x0 |
| /// ### |
| /// * No response in 256 cycles |
| /// ### |
| /// : Err 0x1 |
| /// ### |
| /// * Error response |
| /// ### |
| /// %% 30 # Stuffing bits... |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 8B, bits: 34b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCMErrSt |
| #define h_BCMErrSt (){} |
| |
| #define BA_BCMErrSt_addr 0x0000 |
| #define B16BCMErrSt_addr 0x0000 |
| #define LSb32BCMErrSt_addr 0 |
| #define LSb16BCMErrSt_addr 0 |
| #define bBCMErrSt_addr 32 |
| #define MSK32BCMErrSt_addr 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| #define BA_BCMErrSt_op 0x0004 |
| #define B16BCMErrSt_op 0x0004 |
| #define LSb32BCMErrSt_op 0 |
| #define LSb16BCMErrSt_op 0 |
| #define bBCMErrSt_op 1 |
| #define MSK32BCMErrSt_op 0x00000001 |
| |
| #define BA_BCMErrSt_mode 0x0004 |
| #define B16BCMErrSt_mode 0x0004 |
| #define LSb32BCMErrSt_mode 1 |
| #define LSb16BCMErrSt_mode 1 |
| #define bBCMErrSt_mode 1 |
| #define MSK32BCMErrSt_mode 0x00000002 |
| #define BCMErrSt_mode_Timeout 0x0 |
| #define BCMErrSt_mode_Err 0x1 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCMErrSt { |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMErrSt_addr(r32) _BFGET_(r32,31, 0) |
| #define SET32BCMErrSt_addr(r32,v) _BFSET_(r32,31, 0,v) |
| |
| UNSG32 u_addr : 32; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCMErrSt_op(r32) _BFGET_(r32, 0, 0) |
| #define SET32BCMErrSt_op(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16BCMErrSt_op(r16) _BFGET_(r16, 0, 0) |
| #define SET16BCMErrSt_op(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define GET32BCMErrSt_mode(r32) _BFGET_(r32, 1, 1) |
| #define SET32BCMErrSt_mode(r32,v) _BFSET_(r32, 1, 1,v) |
| #define GET16BCMErrSt_mode(r16) _BFGET_(r16, 1, 1) |
| #define SET16BCMErrSt_mode(r16,v) _BFSET_(r16, 1, 1,v) |
| |
| UNSG32 u_op : 1; |
| UNSG32 u_mode : 1; |
| UNSG32 RSVDx4_b2 : 30; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCMErrSt; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCMErrSt_drvrd(SIE_BCMErrSt *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCMErrSt_drvwr(SIE_BCMErrSt *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCMErrSt_reset(SIE_BCMErrSt *p); |
| SIGN32 BCMErrSt_cmp (SIE_BCMErrSt *p, SIE_BCMErrSt *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCMErrSt_check(p,pie,pfx,hLOG) BCMErrSt_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCMErrSt_print(p, pfx,hLOG) BCMErrSt_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCMErrSt |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE BCM biu (4,4) |
| /// ### |
| /// * BCM Error status information |
| /// * Timeout or error response will trigger the register update and also generate a one clock cycle interrupt pulse. This will happen only when the interrupt status is “0”. |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// # 0x00000 BCMErrSt |
| /// $BCMErrSt BCMErrSt REG |
| /// @ 0x00008 base (P) |
| /// %unsigned 32 adr 0xF0000000 |
| /// ### |
| /// * BCM base address, it will be used for the base address for the CFGW,RDAT,WDAT instructions to generate the AHB transaction address. |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 12B, bits: 66b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_BCM |
| #define h_BCM (){} |
| |
| #define RA_BCM_BCMErrSt 0x0000 |
| /////////////////////////////////////////////////////////// |
| #define RA_BCM_base 0x0008 |
| |
| #define BA_BCM_base_adr 0x0008 |
| #define B16BCM_base_adr 0x0008 |
| #define LSb32BCM_base_adr 0 |
| #define LSb16BCM_base_adr 0 |
| #define bBCM_base_adr 32 |
| #define MSK32BCM_base_adr 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_BCM { |
| /////////////////////////////////////////////////////////// |
| SIE_BCMErrSt ie_BCMErrSt; |
| /////////////////////////////////////////////////////////// |
| #define GET32BCM_base_adr(r32) _BFGET_(r32,31, 0) |
| #define SET32BCM_base_adr(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32BCM_base {\ |
| UNSG32 ubase_adr : 32;\ |
| } |
| union { UNSG32 u32BCM_base; |
| struct w32BCM_base; |
| }; |
| /////////////////////////////////////////////////////////// |
| } SIE_BCM; |
| |
| typedef union T32BCM_base |
| { UNSG32 u32; |
| struct w32BCM_base; |
| } T32BCM_base; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TBCM_base |
| { UNSG32 u32[1]; |
| struct { |
| struct w32BCM_base; |
| }; |
| } TBCM_base; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 BCM_drvrd(SIE_BCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 BCM_drvwr(SIE_BCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void BCM_reset(SIE_BCM *p); |
| SIGN32 BCM_cmp (SIE_BCM *p, SIE_BCM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define BCM_check(p,pie,pfx,hLOG) BCM_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define BCM_print(p, pfx,hLOG) BCM_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: BCM |
| //////////////////////////////////////////////////////////// |
| |
| |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| #pragma pack() |
| |
| #endif |
| ////// |
| /// ENDOFFILE: bcm.h |
| //////////////////////////////////////////////////////////// |
| |
