| /******************************************************************************** |
| * Marvell GPL License Option |
| * |
| * If you received this File from Marvell, you may opt to use, redistribute and/or |
| * modify this File in accordance with the terms and conditions of the General |
| * Public License Version 2, June 1991 (the "GPL License"), a copy of which is |
| * available along with the File in the license.txt file or by writing to the Free |
| * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or |
| * on the worldwide web at http://www.gnu.org/licenses/gpl.txt. |
| * |
| * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY |
| * DISCLAIMED. The GPL License provides additional details about this warranty |
| * disclaimer. |
| ******************************************************************************/ |
| |
| ////// |
| /// don't edit! auto-generated by docc: gc360wrapper.h |
| //////////////////////////////////////////////////////////// |
| #ifndef gc360wrapper_h |
| #define gc360wrapper_h (){} |
| |
| |
| #include "ctypes.h" |
| |
| #pragma pack(1) |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| #ifndef _DOCC_H_BITOPS_ |
| #define _DOCC_H_BITOPS_ (){} |
| |
| #define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0) |
| #define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb)) |
| #define _bCLRMASK_(b) (~_bSETMASK_(b)) |
| #define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb)) |
| #define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb))) |
| #define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0) |
| |
| #endif |
| |
| |
| |
| ////// |
| /// |
| /// $INTERFACE Gc360 biu (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (W-) |
| /// # # Stuffing bytes... |
| /// %% 2097152 |
| /// @ 0x40000 PWRCtrl (P) |
| /// %unsigned 1 CSYSREQ 0x1 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x40004 PWRStatus (R-) |
| /// %unsigned 1 CACTIVE 0x1 |
| /// %unsigned 1 CSYSACK 0x1 |
| /// %% 30 # Stuffing bits... |
| /// @ 0x40008 DEBUG_OUT (R-) |
| /// %unsigned 1 FE_IDLE 0x1 |
| /// %unsigned 1 DE_IDLE 0x1 |
| /// %unsigned 1 PE_IDLE 0x1 |
| /// %unsigned 1 SH_IDLE 0x1 |
| /// %unsigned 1 PA_IDLE 0x1 |
| /// %unsigned 1 SE_IDLE 0x1 |
| /// %unsigned 1 RA_IDLE 0x1 |
| /// %unsigned 1 TX_IDLE 0x1 |
| /// %% 24 # Stuffing bits... |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 262156B, bits: 11b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_Gc360 |
| #define h_Gc360 (){} |
| |
| #define RA_Gc360_PWRCtrl 0x40000 |
| |
| #define BA_Gc360_PWRCtrl_CSYSREQ 0x40000 |
| #define B16Gc360_PWRCtrl_CSYSREQ 0x40000 |
| #define LSb32Gc360_PWRCtrl_CSYSREQ 0 |
| #define LSb16Gc360_PWRCtrl_CSYSREQ 0 |
| #define bGc360_PWRCtrl_CSYSREQ 1 |
| #define MSK32Gc360_PWRCtrl_CSYSREQ 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_Gc360_PWRStatus 0x40004 |
| |
| #define BA_Gc360_PWRStatus_CACTIVE 0x40004 |
| #define B16Gc360_PWRStatus_CACTIVE 0x40004 |
| #define LSb32Gc360_PWRStatus_CACTIVE 0 |
| #define LSb16Gc360_PWRStatus_CACTIVE 0 |
| #define bGc360_PWRStatus_CACTIVE 1 |
| #define MSK32Gc360_PWRStatus_CACTIVE 0x00000001 |
| |
| #define BA_Gc360_PWRStatus_CSYSACK 0x40004 |
| #define B16Gc360_PWRStatus_CSYSACK 0x40004 |
| #define LSb32Gc360_PWRStatus_CSYSACK 1 |
| #define LSb16Gc360_PWRStatus_CSYSACK 1 |
| #define bGc360_PWRStatus_CSYSACK 1 |
| #define MSK32Gc360_PWRStatus_CSYSACK 0x00000002 |
| /////////////////////////////////////////////////////////// |
| #define RA_Gc360_DEBUG_OUT 0x40008 |
| |
| #define BA_Gc360_DEBUG_OUT_FE_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_FE_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_FE_IDLE 0 |
| #define LSb16Gc360_DEBUG_OUT_FE_IDLE 0 |
| #define bGc360_DEBUG_OUT_FE_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_FE_IDLE 0x00000001 |
| |
| #define BA_Gc360_DEBUG_OUT_DE_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_DE_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_DE_IDLE 1 |
| #define LSb16Gc360_DEBUG_OUT_DE_IDLE 1 |
| #define bGc360_DEBUG_OUT_DE_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_DE_IDLE 0x00000002 |
| |
| #define BA_Gc360_DEBUG_OUT_PE_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_PE_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_PE_IDLE 2 |
| #define LSb16Gc360_DEBUG_OUT_PE_IDLE 2 |
| #define bGc360_DEBUG_OUT_PE_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_PE_IDLE 0x00000004 |
| |
| #define BA_Gc360_DEBUG_OUT_SH_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_SH_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_SH_IDLE 3 |
| #define LSb16Gc360_DEBUG_OUT_SH_IDLE 3 |
| #define bGc360_DEBUG_OUT_SH_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_SH_IDLE 0x00000008 |
| |
| #define BA_Gc360_DEBUG_OUT_PA_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_PA_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_PA_IDLE 4 |
| #define LSb16Gc360_DEBUG_OUT_PA_IDLE 4 |
| #define bGc360_DEBUG_OUT_PA_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_PA_IDLE 0x00000010 |
| |
| #define BA_Gc360_DEBUG_OUT_SE_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_SE_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_SE_IDLE 5 |
| #define LSb16Gc360_DEBUG_OUT_SE_IDLE 5 |
| #define bGc360_DEBUG_OUT_SE_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_SE_IDLE 0x00000020 |
| |
| #define BA_Gc360_DEBUG_OUT_RA_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_RA_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_RA_IDLE 6 |
| #define LSb16Gc360_DEBUG_OUT_RA_IDLE 6 |
| #define bGc360_DEBUG_OUT_RA_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_RA_IDLE 0x00000040 |
| |
| #define BA_Gc360_DEBUG_OUT_TX_IDLE 0x40008 |
| #define B16Gc360_DEBUG_OUT_TX_IDLE 0x40008 |
| #define LSb32Gc360_DEBUG_OUT_TX_IDLE 7 |
| #define LSb16Gc360_DEBUG_OUT_TX_IDLE 7 |
| #define bGc360_DEBUG_OUT_TX_IDLE 1 |
| #define MSK32Gc360_DEBUG_OUT_TX_IDLE 0x00000080 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_Gc360 { |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDx0 [262144]; |
| /////////////////////////////////////////////////////////// |
| #define GET32Gc360_PWRCtrl_CSYSREQ(r32) _BFGET_(r32, 0, 0) |
| #define SET32Gc360_PWRCtrl_CSYSREQ(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16Gc360_PWRCtrl_CSYSREQ(r16) _BFGET_(r16, 0, 0) |
| #define SET16Gc360_PWRCtrl_CSYSREQ(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32Gc360_PWRCtrl {\ |
| UNSG32 uPWRCtrl_CSYSREQ : 1;\ |
| UNSG32 RSVDx40000_b1 : 31;\ |
| } |
| union { UNSG32 u32Gc360_PWRCtrl; |
| struct w32Gc360_PWRCtrl; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Gc360_PWRStatus_CACTIVE(r32) _BFGET_(r32, 0, 0) |
| #define SET32Gc360_PWRStatus_CACTIVE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16Gc360_PWRStatus_CACTIVE(r16) _BFGET_(r16, 0, 0) |
| #define SET16Gc360_PWRStatus_CACTIVE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define GET32Gc360_PWRStatus_CSYSACK(r32) _BFGET_(r32, 1, 1) |
| #define SET32Gc360_PWRStatus_CSYSACK(r32,v) _BFSET_(r32, 1, 1,v) |
| #define GET16Gc360_PWRStatus_CSYSACK(r16) _BFGET_(r16, 1, 1) |
| #define SET16Gc360_PWRStatus_CSYSACK(r16,v) _BFSET_(r16, 1, 1,v) |
| |
| #define w32Gc360_PWRStatus {\ |
| UNSG32 uPWRStatus_CACTIVE : 1;\ |
| UNSG32 uPWRStatus_CSYSACK : 1;\ |
| UNSG32 RSVDx40004_b2 : 30;\ |
| } |
| union { UNSG32 u32Gc360_PWRStatus; |
| struct w32Gc360_PWRStatus; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Gc360_DEBUG_OUT_FE_IDLE(r32) _BFGET_(r32, 0, 0) |
| #define SET32Gc360_DEBUG_OUT_FE_IDLE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16Gc360_DEBUG_OUT_FE_IDLE(r16) _BFGET_(r16, 0, 0) |
| #define SET16Gc360_DEBUG_OUT_FE_IDLE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define GET32Gc360_DEBUG_OUT_DE_IDLE(r32) _BFGET_(r32, 1, 1) |
| #define SET32Gc360_DEBUG_OUT_DE_IDLE(r32,v) _BFSET_(r32, 1, 1,v) |
| #define GET16Gc360_DEBUG_OUT_DE_IDLE(r16) _BFGET_(r16, 1, 1) |
| #define SET16Gc360_DEBUG_OUT_DE_IDLE(r16,v) _BFSET_(r16, 1, 1,v) |
| |
| #define GET32Gc360_DEBUG_OUT_PE_IDLE(r32) _BFGET_(r32, 2, 2) |
| #define SET32Gc360_DEBUG_OUT_PE_IDLE(r32,v) _BFSET_(r32, 2, 2,v) |
| #define GET16Gc360_DEBUG_OUT_PE_IDLE(r16) _BFGET_(r16, 2, 2) |
| #define SET16Gc360_DEBUG_OUT_PE_IDLE(r16,v) _BFSET_(r16, 2, 2,v) |
| |
| #define GET32Gc360_DEBUG_OUT_SH_IDLE(r32) _BFGET_(r32, 3, 3) |
| #define SET32Gc360_DEBUG_OUT_SH_IDLE(r32,v) _BFSET_(r32, 3, 3,v) |
| #define GET16Gc360_DEBUG_OUT_SH_IDLE(r16) _BFGET_(r16, 3, 3) |
| #define SET16Gc360_DEBUG_OUT_SH_IDLE(r16,v) _BFSET_(r16, 3, 3,v) |
| |
| #define GET32Gc360_DEBUG_OUT_PA_IDLE(r32) _BFGET_(r32, 4, 4) |
| #define SET32Gc360_DEBUG_OUT_PA_IDLE(r32,v) _BFSET_(r32, 4, 4,v) |
| #define GET16Gc360_DEBUG_OUT_PA_IDLE(r16) _BFGET_(r16, 4, 4) |
| #define SET16Gc360_DEBUG_OUT_PA_IDLE(r16,v) _BFSET_(r16, 4, 4,v) |
| |
| #define GET32Gc360_DEBUG_OUT_SE_IDLE(r32) _BFGET_(r32, 5, 5) |
| #define SET32Gc360_DEBUG_OUT_SE_IDLE(r32,v) _BFSET_(r32, 5, 5,v) |
| #define GET16Gc360_DEBUG_OUT_SE_IDLE(r16) _BFGET_(r16, 5, 5) |
| #define SET16Gc360_DEBUG_OUT_SE_IDLE(r16,v) _BFSET_(r16, 5, 5,v) |
| |
| #define GET32Gc360_DEBUG_OUT_RA_IDLE(r32) _BFGET_(r32, 6, 6) |
| #define SET32Gc360_DEBUG_OUT_RA_IDLE(r32,v) _BFSET_(r32, 6, 6,v) |
| #define GET16Gc360_DEBUG_OUT_RA_IDLE(r16) _BFGET_(r16, 6, 6) |
| #define SET16Gc360_DEBUG_OUT_RA_IDLE(r16,v) _BFSET_(r16, 6, 6,v) |
| |
| #define GET32Gc360_DEBUG_OUT_TX_IDLE(r32) _BFGET_(r32, 7, 7) |
| #define SET32Gc360_DEBUG_OUT_TX_IDLE(r32,v) _BFSET_(r32, 7, 7,v) |
| #define GET16Gc360_DEBUG_OUT_TX_IDLE(r16) _BFGET_(r16, 7, 7) |
| #define SET16Gc360_DEBUG_OUT_TX_IDLE(r16,v) _BFSET_(r16, 7, 7,v) |
| |
| #define w32Gc360_DEBUG_OUT {\ |
| UNSG32 uDEBUG_OUT_FE_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_DE_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_PE_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_SH_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_PA_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_SE_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_RA_IDLE : 1;\ |
| UNSG32 uDEBUG_OUT_TX_IDLE : 1;\ |
| UNSG32 RSVDx40008_b8 : 24;\ |
| } |
| union { UNSG32 u32Gc360_DEBUG_OUT; |
| struct w32Gc360_DEBUG_OUT; |
| }; |
| /////////////////////////////////////////////////////////// |
| } SIE_Gc360; |
| |
| typedef union T32Gc360_PWRCtrl |
| { UNSG32 u32; |
| struct w32Gc360_PWRCtrl; |
| } T32Gc360_PWRCtrl; |
| typedef union T32Gc360_PWRStatus |
| { UNSG32 u32; |
| struct w32Gc360_PWRStatus; |
| } T32Gc360_PWRStatus; |
| typedef union T32Gc360_DEBUG_OUT |
| { UNSG32 u32; |
| struct w32Gc360_DEBUG_OUT; |
| } T32Gc360_DEBUG_OUT; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TGc360_PWRCtrl |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Gc360_PWRCtrl; |
| }; |
| } TGc360_PWRCtrl; |
| typedef union TGc360_PWRStatus |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Gc360_PWRStatus; |
| }; |
| } TGc360_PWRStatus; |
| typedef union TGc360_DEBUG_OUT |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Gc360_DEBUG_OUT; |
| }; |
| } TGc360_DEBUG_OUT; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 Gc360_drvrd(SIE_Gc360 *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 Gc360_drvwr(SIE_Gc360 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void Gc360_reset(SIE_Gc360 *p); |
| SIGN32 Gc360_cmp (SIE_Gc360 *p, SIE_Gc360 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define Gc360_check(p,pie,pfx,hLOG) Gc360_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define Gc360_print(p, pfx,hLOG) Gc360_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: Gc360 |
| //////////////////////////////////////////////////////////// |
| |
| |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| #pragma pack() |
| |
| #endif |
| ////// |
| /// ENDOFFILE: gc360wrapper.h |
| //////////////////////////////////////////////////////////// |
| |
