| /******************************************************************************** |
| * Marvell GPL License Option |
| * |
| * If you received this File from Marvell, you may opt to use, redistribute and/or |
| * modify this File in accordance with the terms and conditions of the General |
| * Public License Version 2, June 1991 (the "GPL License"), a copy of which is |
| * available along with the File in the license.txt file or by writing to the Free |
| * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or |
| * on the worldwide web at http://www.gnu.org/licenses/gpl.txt. |
| * |
| * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY |
| * DISCLAIMED. The GPL License provides additional details about this warranty |
| * disclaimer. |
| ******************************************************************************/ |
| |
| ////// |
| /// don't edit! auto-generated by docc: mtest.h |
| //////////////////////////////////////////////////////////// |
| #ifndef mtest_h |
| #define mtest_h (){} |
| |
| |
| #include "ctypes.h" |
| |
| #pragma pack(1) |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| #ifndef _DOCC_H_BITOPS_ |
| #define _DOCC_H_BITOPS_ (){} |
| |
| #define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0) |
| #define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb)) |
| #define _bCLRMASK_(b) (~_bSETMASK_(b)) |
| #define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb)) |
| #define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb))) |
| #define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0) |
| |
| #endif |
| |
| |
| |
| ////// |
| /// |
| /// $INTERFACE Mtest biu (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 DebugTrigger (RW-) |
| /// ### |
| /// * SDRAM Debug Trigger Register |
| /// ### |
| /// %unsigned 1 mt_loop 0x0 |
| /// ### |
| /// * 1'b1: continuously testing (looping) until an error is detected (when mt_coe is 0) or mt_active is deactivated |
| /// * 1'b0: test finishes after one run |
| /// * (Hardware only detects this value when mt_active register bit field is written.) |
| /// ### |
| /// %unsigned 1 mt_active 0x0 |
| /// ### |
| /// * 1'b1: loop testing the memory interface |
| /// ### |
| /// %unsigned 1 mt_mode 0x0 |
| /// ### |
| /// * Specifies the data pattern to be used |
| /// * 0: walking data pattern, data used is the value of address |
| /// * 1 : interleave data pattern, the 64-bit data used is {mt_even,mt_odd} |
| /// ### |
| /// %unsigned 1 mt_coe 0x0 |
| /// ### |
| /// * Continue On Error |
| /// * 0 : Self-test stops on finding an error. Records the address/data corresponding to the mismatch. |
| /// * 1 : Self-test completes its command (loop/non-loop) irrespective of the error. Records the address/data corresponding to the first mismatch. |
| /// ### |
| /// %% 28 # Stuffing bits... |
| /// @ 0x00004 DebugStAddr (P) |
| /// ### |
| /// * SDRAM Debug Starting Address Register |
| /// ### |
| /// %unsigned 32 addr_start 0x0 |
| /// ### |
| /// * Starting address of testing range (32-byte aligned) |
| /// ### |
| /// @ 0x00008 DebugEdAddr (P) |
| /// ### |
| /// * SDRAM Debug Ending Address Register |
| /// ### |
| /// %unsigned 32 addr_end 0x0 |
| /// ### |
| /// * Ending address (exclusive) of testing range (32-byte aligned). Note that addr_end is excluded from the tested memory range; that is, the last address to be tested is (addr_end - 8). |
| /// ### |
| /// @ 0x0000C DebugAdSize (P) |
| /// ### |
| /// * SDRAM Debug Address Size Register |
| /// ### |
| /// %unsigned 32 addr_size 0x0 |
| /// ### |
| /// * Size of Memory region to be tested before incrementing the address by addr_step, 32-byte aligned. |
| /// ### |
| /// @ 0x00010 DebugAdStep (P) |
| /// ### |
| /// * SDRAM Debug Address Step Register |
| /// ### |
| /// %unsigned 32 addr_step 0x0 |
| /// ### |
| /// * Step size to increment the address after addr_size region is tested, 32-byte aligned. |
| /// ### |
| /// @ 0x00014 DebugStatus (R-) |
| /// ### |
| /// * SDRAM Debug Status Register |
| /// ### |
| /// %unsigned 1 mt_done 0x0 |
| /// ### |
| /// * Done flag for one test loop |
| /// * (Not valid in looping mode) |
| /// ### |
| /// %unsigned 2 mt_error 0x0 |
| /// ### |
| /// * 2-bit Error code |
| /// * 00: No error |
| /// * 01: Error, Read data mismatch |
| /// * 1x: Reserved |
| /// * Note that mt_error will be cleared on writing to mt_active. The user should read the value of mt_error before writing to mt_active. |
| /// ### |
| /// %% 29 # Stuffing bits... |
| /// @ 0x00018 DebugRaddr (R-) |
| /// ### |
| /// * SDRAM Debug Read Address |
| /// ### |
| /// %unsigned 32 mt_raddr 0x0 |
| /// ### |
| /// * The read address when error occurred |
| /// ### |
| /// @ 0x0001C DebugRdata0 (R-) |
| /// ### |
| /// * SDRAM Debug Read Data Low Word |
| /// ### |
| /// %unsigned 32 mt_rdata0 0x0 |
| /// ### |
| /// * The read data when error occurred [31:0] |
| /// ### |
| /// @ 0x00020 DebugRdata1 (R-) |
| /// ### |
| /// * SDRAM Debug Read Data High Word |
| /// ### |
| /// %unsigned 32 mt_rdata1 0x0 |
| /// ### |
| /// * The read data when error occurred [63:32] |
| /// ### |
| /// @ 0x00024 DebugOData (P) |
| /// ### |
| /// * SDRAM Debug Odd data for mt_mode = 1 |
| /// ### |
| /// %unsigned 32 mt_odd 0x55555555 |
| /// ### |
| /// * Odd data word which is used to form the slef-test data when mt_mode=1 |
| /// * 64-bit data = {mt_even[31:0],mt_odd[31:0]} |
| /// ### |
| /// @ 0x00028 DebugEData (P) |
| /// ### |
| /// * SDRAM Debug Even data for mt_mode = 1 |
| /// ### |
| /// %unsigned 32 mt_even 0xAAAAAAAA |
| /// ### |
| /// * Even data word which is used to form the slef-test data when mt_mode=1 |
| /// * 64-bit data = {mt_even[31:0],mt_odd[31:0]} |
| /// ### |
| /// @ 0x0002C ChkByte (P) |
| /// ### |
| /// * Byte Mask for comparison control |
| /// ### |
| /// %unsigned 4 ctrl 0x0 |
| /// ### |
| /// * This feature allows MTEST to check only the required byte-lanes. There are 4 control bits, and each control bit maps to 2 byte-lanes in the 64-bit MTEST AXI bus. |
| /// * If the data is D7 D6 D5 D4 D3 D2 D1 D0 . |
| /// * CTRL bit Value Byte-lanes to check |
| /// * Ctrl[0] 0 D0 & D4 |
| /// * Ctrl[1] 0 D1 & D5 |
| /// * Ctrl[2] 0 D2 & D6 |
| /// * Ctrl[3] 0 D3 & D7 |
| /// * If the value for any of the above control bits is 1, it will NOT check data for the corresponding pair of byte-lanes. |
| /// ### |
| /// %% 28 # Stuffing bits... |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 48B, bits: 299b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_Mtest |
| #define h_Mtest (){} |
| |
| #define RA_Mtest_DebugTrigger 0x0000 |
| |
| #define BA_Mtest_DebugTrigger_mt_loop 0x0000 |
| #define B16Mtest_DebugTrigger_mt_loop 0x0000 |
| #define LSb32Mtest_DebugTrigger_mt_loop 0 |
| #define LSb16Mtest_DebugTrigger_mt_loop 0 |
| #define bMtest_DebugTrigger_mt_loop 1 |
| #define MSK32Mtest_DebugTrigger_mt_loop 0x00000001 |
| |
| #define BA_Mtest_DebugTrigger_mt_active 0x0000 |
| #define B16Mtest_DebugTrigger_mt_active 0x0000 |
| #define LSb32Mtest_DebugTrigger_mt_active 1 |
| #define LSb16Mtest_DebugTrigger_mt_active 1 |
| #define bMtest_DebugTrigger_mt_active 1 |
| #define MSK32Mtest_DebugTrigger_mt_active 0x00000002 |
| |
| #define BA_Mtest_DebugTrigger_mt_mode 0x0000 |
| #define B16Mtest_DebugTrigger_mt_mode 0x0000 |
| #define LSb32Mtest_DebugTrigger_mt_mode 2 |
| #define LSb16Mtest_DebugTrigger_mt_mode 2 |
| #define bMtest_DebugTrigger_mt_mode 1 |
| #define MSK32Mtest_DebugTrigger_mt_mode 0x00000004 |
| |
| #define BA_Mtest_DebugTrigger_mt_coe 0x0000 |
| #define B16Mtest_DebugTrigger_mt_coe 0x0000 |
| #define LSb32Mtest_DebugTrigger_mt_coe 3 |
| #define LSb16Mtest_DebugTrigger_mt_coe 3 |
| #define bMtest_DebugTrigger_mt_coe 1 |
| #define MSK32Mtest_DebugTrigger_mt_coe 0x00000008 |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugStAddr 0x0004 |
| |
| #define BA_Mtest_DebugStAddr_addr_start 0x0004 |
| #define B16Mtest_DebugStAddr_addr_start 0x0004 |
| #define LSb32Mtest_DebugStAddr_addr_start 0 |
| #define LSb16Mtest_DebugStAddr_addr_start 0 |
| #define bMtest_DebugStAddr_addr_start 32 |
| #define MSK32Mtest_DebugStAddr_addr_start 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugEdAddr 0x0008 |
| |
| #define BA_Mtest_DebugEdAddr_addr_end 0x0008 |
| #define B16Mtest_DebugEdAddr_addr_end 0x0008 |
| #define LSb32Mtest_DebugEdAddr_addr_end 0 |
| #define LSb16Mtest_DebugEdAddr_addr_end 0 |
| #define bMtest_DebugEdAddr_addr_end 32 |
| #define MSK32Mtest_DebugEdAddr_addr_end 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugAdSize 0x000C |
| |
| #define BA_Mtest_DebugAdSize_addr_size 0x000C |
| #define B16Mtest_DebugAdSize_addr_size 0x000C |
| #define LSb32Mtest_DebugAdSize_addr_size 0 |
| #define LSb16Mtest_DebugAdSize_addr_size 0 |
| #define bMtest_DebugAdSize_addr_size 32 |
| #define MSK32Mtest_DebugAdSize_addr_size 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugAdStep 0x0010 |
| |
| #define BA_Mtest_DebugAdStep_addr_step 0x0010 |
| #define B16Mtest_DebugAdStep_addr_step 0x0010 |
| #define LSb32Mtest_DebugAdStep_addr_step 0 |
| #define LSb16Mtest_DebugAdStep_addr_step 0 |
| #define bMtest_DebugAdStep_addr_step 32 |
| #define MSK32Mtest_DebugAdStep_addr_step 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugStatus 0x0014 |
| |
| #define BA_Mtest_DebugStatus_mt_done 0x0014 |
| #define B16Mtest_DebugStatus_mt_done 0x0014 |
| #define LSb32Mtest_DebugStatus_mt_done 0 |
| #define LSb16Mtest_DebugStatus_mt_done 0 |
| #define bMtest_DebugStatus_mt_done 1 |
| #define MSK32Mtest_DebugStatus_mt_done 0x00000001 |
| |
| #define BA_Mtest_DebugStatus_mt_error 0x0014 |
| #define B16Mtest_DebugStatus_mt_error 0x0014 |
| #define LSb32Mtest_DebugStatus_mt_error 1 |
| #define LSb16Mtest_DebugStatus_mt_error 1 |
| #define bMtest_DebugStatus_mt_error 2 |
| #define MSK32Mtest_DebugStatus_mt_error 0x00000006 |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugRaddr 0x0018 |
| |
| #define BA_Mtest_DebugRaddr_mt_raddr 0x0018 |
| #define B16Mtest_DebugRaddr_mt_raddr 0x0018 |
| #define LSb32Mtest_DebugRaddr_mt_raddr 0 |
| #define LSb16Mtest_DebugRaddr_mt_raddr 0 |
| #define bMtest_DebugRaddr_mt_raddr 32 |
| #define MSK32Mtest_DebugRaddr_mt_raddr 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugRdata0 0x001C |
| |
| #define BA_Mtest_DebugRdata0_mt_rdata0 0x001C |
| #define B16Mtest_DebugRdata0_mt_rdata0 0x001C |
| #define LSb32Mtest_DebugRdata0_mt_rdata0 0 |
| #define LSb16Mtest_DebugRdata0_mt_rdata0 0 |
| #define bMtest_DebugRdata0_mt_rdata0 32 |
| #define MSK32Mtest_DebugRdata0_mt_rdata0 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugRdata1 0x0020 |
| |
| #define BA_Mtest_DebugRdata1_mt_rdata1 0x0020 |
| #define B16Mtest_DebugRdata1_mt_rdata1 0x0020 |
| #define LSb32Mtest_DebugRdata1_mt_rdata1 0 |
| #define LSb16Mtest_DebugRdata1_mt_rdata1 0 |
| #define bMtest_DebugRdata1_mt_rdata1 32 |
| #define MSK32Mtest_DebugRdata1_mt_rdata1 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugOData 0x0024 |
| |
| #define BA_Mtest_DebugOData_mt_odd 0x0024 |
| #define B16Mtest_DebugOData_mt_odd 0x0024 |
| #define LSb32Mtest_DebugOData_mt_odd 0 |
| #define LSb16Mtest_DebugOData_mt_odd 0 |
| #define bMtest_DebugOData_mt_odd 32 |
| #define MSK32Mtest_DebugOData_mt_odd 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_DebugEData 0x0028 |
| |
| #define BA_Mtest_DebugEData_mt_even 0x0028 |
| #define B16Mtest_DebugEData_mt_even 0x0028 |
| #define LSb32Mtest_DebugEData_mt_even 0 |
| #define LSb16Mtest_DebugEData_mt_even 0 |
| #define bMtest_DebugEData_mt_even 32 |
| #define MSK32Mtest_DebugEData_mt_even 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_Mtest_ChkByte 0x002C |
| |
| #define BA_Mtest_ChkByte_ctrl 0x002C |
| #define B16Mtest_ChkByte_ctrl 0x002C |
| #define LSb32Mtest_ChkByte_ctrl 0 |
| #define LSb16Mtest_ChkByte_ctrl 0 |
| #define bMtest_ChkByte_ctrl 4 |
| #define MSK32Mtest_ChkByte_ctrl 0x0000000F |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_Mtest { |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugTrigger_mt_loop(r32) _BFGET_(r32, 0, 0) |
| #define SET32Mtest_DebugTrigger_mt_loop(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16Mtest_DebugTrigger_mt_loop(r16) _BFGET_(r16, 0, 0) |
| #define SET16Mtest_DebugTrigger_mt_loop(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define GET32Mtest_DebugTrigger_mt_active(r32) _BFGET_(r32, 1, 1) |
| #define SET32Mtest_DebugTrigger_mt_active(r32,v) _BFSET_(r32, 1, 1,v) |
| #define GET16Mtest_DebugTrigger_mt_active(r16) _BFGET_(r16, 1, 1) |
| #define SET16Mtest_DebugTrigger_mt_active(r16,v) _BFSET_(r16, 1, 1,v) |
| |
| #define GET32Mtest_DebugTrigger_mt_mode(r32) _BFGET_(r32, 2, 2) |
| #define SET32Mtest_DebugTrigger_mt_mode(r32,v) _BFSET_(r32, 2, 2,v) |
| #define GET16Mtest_DebugTrigger_mt_mode(r16) _BFGET_(r16, 2, 2) |
| #define SET16Mtest_DebugTrigger_mt_mode(r16,v) _BFSET_(r16, 2, 2,v) |
| |
| #define GET32Mtest_DebugTrigger_mt_coe(r32) _BFGET_(r32, 3, 3) |
| #define SET32Mtest_DebugTrigger_mt_coe(r32,v) _BFSET_(r32, 3, 3,v) |
| #define GET16Mtest_DebugTrigger_mt_coe(r16) _BFGET_(r16, 3, 3) |
| #define SET16Mtest_DebugTrigger_mt_coe(r16,v) _BFSET_(r16, 3, 3,v) |
| |
| #define w32Mtest_DebugTrigger {\ |
| UNSG32 uDebugTrigger_mt_loop : 1;\ |
| UNSG32 uDebugTrigger_mt_active : 1;\ |
| UNSG32 uDebugTrigger_mt_mode : 1;\ |
| UNSG32 uDebugTrigger_mt_coe : 1;\ |
| UNSG32 RSVDx0_b4 : 28;\ |
| } |
| union { UNSG32 u32Mtest_DebugTrigger; |
| struct w32Mtest_DebugTrigger; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugStAddr_addr_start(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugStAddr_addr_start(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugStAddr {\ |
| UNSG32 uDebugStAddr_addr_start : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugStAddr; |
| struct w32Mtest_DebugStAddr; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugEdAddr_addr_end(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugEdAddr_addr_end(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugEdAddr {\ |
| UNSG32 uDebugEdAddr_addr_end : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugEdAddr; |
| struct w32Mtest_DebugEdAddr; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugAdSize_addr_size(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugAdSize_addr_size(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugAdSize {\ |
| UNSG32 uDebugAdSize_addr_size : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugAdSize; |
| struct w32Mtest_DebugAdSize; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugAdStep_addr_step(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugAdStep_addr_step(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugAdStep {\ |
| UNSG32 uDebugAdStep_addr_step : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugAdStep; |
| struct w32Mtest_DebugAdStep; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugStatus_mt_done(r32) _BFGET_(r32, 0, 0) |
| #define SET32Mtest_DebugStatus_mt_done(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16Mtest_DebugStatus_mt_done(r16) _BFGET_(r16, 0, 0) |
| #define SET16Mtest_DebugStatus_mt_done(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define GET32Mtest_DebugStatus_mt_error(r32) _BFGET_(r32, 2, 1) |
| #define SET32Mtest_DebugStatus_mt_error(r32,v) _BFSET_(r32, 2, 1,v) |
| #define GET16Mtest_DebugStatus_mt_error(r16) _BFGET_(r16, 2, 1) |
| #define SET16Mtest_DebugStatus_mt_error(r16,v) _BFSET_(r16, 2, 1,v) |
| |
| #define w32Mtest_DebugStatus {\ |
| UNSG32 uDebugStatus_mt_done : 1;\ |
| UNSG32 uDebugStatus_mt_error : 2;\ |
| UNSG32 RSVDx14_b3 : 29;\ |
| } |
| union { UNSG32 u32Mtest_DebugStatus; |
| struct w32Mtest_DebugStatus; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugRaddr_mt_raddr(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugRaddr_mt_raddr(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugRaddr {\ |
| UNSG32 uDebugRaddr_mt_raddr : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugRaddr; |
| struct w32Mtest_DebugRaddr; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugRdata0_mt_rdata0(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugRdata0_mt_rdata0(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugRdata0 {\ |
| UNSG32 uDebugRdata0_mt_rdata0 : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugRdata0; |
| struct w32Mtest_DebugRdata0; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugRdata1_mt_rdata1(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugRdata1_mt_rdata1(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugRdata1 {\ |
| UNSG32 uDebugRdata1_mt_rdata1 : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugRdata1; |
| struct w32Mtest_DebugRdata1; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugOData_mt_odd(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugOData_mt_odd(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugOData {\ |
| UNSG32 uDebugOData_mt_odd : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugOData; |
| struct w32Mtest_DebugOData; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_DebugEData_mt_even(r32) _BFGET_(r32,31, 0) |
| #define SET32Mtest_DebugEData_mt_even(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Mtest_DebugEData {\ |
| UNSG32 uDebugEData_mt_even : 32;\ |
| } |
| union { UNSG32 u32Mtest_DebugEData; |
| struct w32Mtest_DebugEData; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Mtest_ChkByte_ctrl(r32) _BFGET_(r32, 3, 0) |
| #define SET32Mtest_ChkByte_ctrl(r32,v) _BFSET_(r32, 3, 0,v) |
| #define GET16Mtest_ChkByte_ctrl(r16) _BFGET_(r16, 3, 0) |
| #define SET16Mtest_ChkByte_ctrl(r16,v) _BFSET_(r16, 3, 0,v) |
| |
| #define w32Mtest_ChkByte {\ |
| UNSG32 uChkByte_ctrl : 4;\ |
| UNSG32 RSVDx2C_b4 : 28;\ |
| } |
| union { UNSG32 u32Mtest_ChkByte; |
| struct w32Mtest_ChkByte; |
| }; |
| /////////////////////////////////////////////////////////// |
| } SIE_Mtest; |
| |
| typedef union T32Mtest_DebugTrigger |
| { UNSG32 u32; |
| struct w32Mtest_DebugTrigger; |
| } T32Mtest_DebugTrigger; |
| typedef union T32Mtest_DebugStAddr |
| { UNSG32 u32; |
| struct w32Mtest_DebugStAddr; |
| } T32Mtest_DebugStAddr; |
| typedef union T32Mtest_DebugEdAddr |
| { UNSG32 u32; |
| struct w32Mtest_DebugEdAddr; |
| } T32Mtest_DebugEdAddr; |
| typedef union T32Mtest_DebugAdSize |
| { UNSG32 u32; |
| struct w32Mtest_DebugAdSize; |
| } T32Mtest_DebugAdSize; |
| typedef union T32Mtest_DebugAdStep |
| { UNSG32 u32; |
| struct w32Mtest_DebugAdStep; |
| } T32Mtest_DebugAdStep; |
| typedef union T32Mtest_DebugStatus |
| { UNSG32 u32; |
| struct w32Mtest_DebugStatus; |
| } T32Mtest_DebugStatus; |
| typedef union T32Mtest_DebugRaddr |
| { UNSG32 u32; |
| struct w32Mtest_DebugRaddr; |
| } T32Mtest_DebugRaddr; |
| typedef union T32Mtest_DebugRdata0 |
| { UNSG32 u32; |
| struct w32Mtest_DebugRdata0; |
| } T32Mtest_DebugRdata0; |
| typedef union T32Mtest_DebugRdata1 |
| { UNSG32 u32; |
| struct w32Mtest_DebugRdata1; |
| } T32Mtest_DebugRdata1; |
| typedef union T32Mtest_DebugOData |
| { UNSG32 u32; |
| struct w32Mtest_DebugOData; |
| } T32Mtest_DebugOData; |
| typedef union T32Mtest_DebugEData |
| { UNSG32 u32; |
| struct w32Mtest_DebugEData; |
| } T32Mtest_DebugEData; |
| typedef union T32Mtest_ChkByte |
| { UNSG32 u32; |
| struct w32Mtest_ChkByte; |
| } T32Mtest_ChkByte; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TMtest_DebugTrigger |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugTrigger; |
| }; |
| } TMtest_DebugTrigger; |
| typedef union TMtest_DebugStAddr |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugStAddr; |
| }; |
| } TMtest_DebugStAddr; |
| typedef union TMtest_DebugEdAddr |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugEdAddr; |
| }; |
| } TMtest_DebugEdAddr; |
| typedef union TMtest_DebugAdSize |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugAdSize; |
| }; |
| } TMtest_DebugAdSize; |
| typedef union TMtest_DebugAdStep |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugAdStep; |
| }; |
| } TMtest_DebugAdStep; |
| typedef union TMtest_DebugStatus |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugStatus; |
| }; |
| } TMtest_DebugStatus; |
| typedef union TMtest_DebugRaddr |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugRaddr; |
| }; |
| } TMtest_DebugRaddr; |
| typedef union TMtest_DebugRdata0 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugRdata0; |
| }; |
| } TMtest_DebugRdata0; |
| typedef union TMtest_DebugRdata1 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugRdata1; |
| }; |
| } TMtest_DebugRdata1; |
| typedef union TMtest_DebugOData |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugOData; |
| }; |
| } TMtest_DebugOData; |
| typedef union TMtest_DebugEData |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_DebugEData; |
| }; |
| } TMtest_DebugEData; |
| typedef union TMtest_ChkByte |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Mtest_ChkByte; |
| }; |
| } TMtest_ChkByte; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 Mtest_drvrd(SIE_Mtest *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 Mtest_drvwr(SIE_Mtest *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void Mtest_reset(SIE_Mtest *p); |
| SIGN32 Mtest_cmp (SIE_Mtest *p, SIE_Mtest *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define Mtest_check(p,pie,pfx,hLOG) Mtest_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define Mtest_print(p, pfx,hLOG) Mtest_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: Mtest |
| //////////////////////////////////////////////////////////// |
| |
| |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| #pragma pack() |
| |
| #endif |
| ////// |
| /// ENDOFFILE: mtest.h |
| //////////////////////////////////////////////////////////// |
| |