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nest-open-source / manifest_repos / bootloader / 836ad32e08388e0e4ce8d03fe4f14d2c3ea8ba13 / . / berlin_tools / bootloader / include / Firmware_Berlin_BG2CDP_A0 / AhbTrace.h
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/********************************************************************************
* Marvell GPL License Option
*
* If you received this File from Marvell, you may opt to use, redistribute and/or
* modify this File in accordance with the terms and conditions of the General
* Public License Version 2, June 1991 (the "GPL License"), a copy of which is
* available along with the File in the license.txt file or by writing to the Free
* Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
* on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
*
* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
* WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
* DISCLAIMED. The GPL License provides additional details about this warranty
* disclaimer.
******************************************************************************/
//////
/// don't edit! auto-generated by docc: AhbTrace.h
////////////////////////////////////////////////////////////
#ifndef AhbTrace_h
#define AhbTrace_h (){}
#include "ctypes.h"
#pragma pack(1)
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}
#define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0)
#define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
#define _bCLRMASK_(b) (~_bSETMASK_(b))
#define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb))
#define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
#define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)
#endif
//////
///
/// $INTERFACE AhbTrcLogPkt (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 (P)
/// %unsigned 8 TriggerIndex
/// ###
/// * Index of the trigger condition that the AHB transaction matches with;
/// * In case an AHB transaction matches with multiple trigger conditions with logging enabled, the smallest index will be saved in the log packet.
/// ###
/// %% 24 # Stuffing bits...
/// @ 0x00004 (W-)
/// # # Stuffing bytes...
/// %% 64
/// @ 0x0000C (P)
/// %unsigned 3 AhbBurst
/// ###
/// * HBURST signals of the transaction
/// ###
/// %unsigned 1 AhbMastlock
/// ###
/// * HMASTLOCK signals of the transaction
/// ###
/// %unsigned 4 AhbProt
/// ###
/// * HPROT signals of the transaction
/// ###
/// %unsigned 3 AhbSize
/// ###
/// * HSIZE signals of the transaction
/// ###
/// %unsigned 2 AhbTrans
/// ###
/// * HTRANS signals of the transaction
/// ###
/// %unsigned 1 AhbWrite
/// ###
/// * HWRITE signals of the transaction
/// ###
/// %unsigned 1 AhbResp
/// ###
/// * HRESP signals of the transaction
/// ###
/// %% 17 # Stuffing bits...
/// @ 0x00010 (P)
/// %unsigned 32 AhbAddr
/// ###
/// * HADDR of the transaction
/// ###
/// @ 0x00014 (P)
/// %unsigned 32 AhbData
/// ###
/// * HWDATA or HRDATA of the transaction
/// ###
/// @ 0x00018 (P)
/// %unsigned 32 TimeStampLower
/// @ 0x0001C (P)
/// %unsigned 32 TimeStampUpper
/// ###
/// * 64-bit time stamp based sysClk
/// * It is captured when the transaction is observed.
/// ###
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 32B, bits: 151b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcLogPkt
#define h_AhbTrcLogPkt (){}
#define BA_AhbTrcLogPkt_TriggerIndex 0x0000
#define B16AhbTrcLogPkt_TriggerIndex 0x0000
#define LSb32AhbTrcLogPkt_TriggerIndex 0
#define LSb16AhbTrcLogPkt_TriggerIndex 0
#define bAhbTrcLogPkt_TriggerIndex 8
#define MSK32AhbTrcLogPkt_TriggerIndex 0x000000FF
///////////////////////////////////////////////////////////
#define BA_AhbTrcLogPkt_AhbBurst 0x000C
#define B16AhbTrcLogPkt_AhbBurst 0x000C
#define LSb32AhbTrcLogPkt_AhbBurst 0
#define LSb16AhbTrcLogPkt_AhbBurst 0
#define bAhbTrcLogPkt_AhbBurst 3
#define MSK32AhbTrcLogPkt_AhbBurst 0x00000007
#define BA_AhbTrcLogPkt_AhbMastlock 0x000C
#define B16AhbTrcLogPkt_AhbMastlock 0x000C
#define LSb32AhbTrcLogPkt_AhbMastlock 3
#define LSb16AhbTrcLogPkt_AhbMastlock 3
#define bAhbTrcLogPkt_AhbMastlock 1
#define MSK32AhbTrcLogPkt_AhbMastlock 0x00000008
#define BA_AhbTrcLogPkt_AhbProt 0x000C
#define B16AhbTrcLogPkt_AhbProt 0x000C
#define LSb32AhbTrcLogPkt_AhbProt 4
#define LSb16AhbTrcLogPkt_AhbProt 4
#define bAhbTrcLogPkt_AhbProt 4
#define MSK32AhbTrcLogPkt_AhbProt 0x000000F0
#define BA_AhbTrcLogPkt_AhbSize 0x000D
#define B16AhbTrcLogPkt_AhbSize 0x000C
#define LSb32AhbTrcLogPkt_AhbSize 8
#define LSb16AhbTrcLogPkt_AhbSize 8
#define bAhbTrcLogPkt_AhbSize 3
#define MSK32AhbTrcLogPkt_AhbSize 0x00000700
#define BA_AhbTrcLogPkt_AhbTrans 0x000D
#define B16AhbTrcLogPkt_AhbTrans 0x000C
#define LSb32AhbTrcLogPkt_AhbTrans 11
#define LSb16AhbTrcLogPkt_AhbTrans 11
#define bAhbTrcLogPkt_AhbTrans 2
#define MSK32AhbTrcLogPkt_AhbTrans 0x00001800
#define BA_AhbTrcLogPkt_AhbWrite 0x000D
#define B16AhbTrcLogPkt_AhbWrite 0x000C
#define LSb32AhbTrcLogPkt_AhbWrite 13
#define LSb16AhbTrcLogPkt_AhbWrite 13
#define bAhbTrcLogPkt_AhbWrite 1
#define MSK32AhbTrcLogPkt_AhbWrite 0x00002000
#define BA_AhbTrcLogPkt_AhbResp 0x000D
#define B16AhbTrcLogPkt_AhbResp 0x000C
#define LSb32AhbTrcLogPkt_AhbResp 14
#define LSb16AhbTrcLogPkt_AhbResp 14
#define bAhbTrcLogPkt_AhbResp 1
#define MSK32AhbTrcLogPkt_AhbResp 0x00004000
///////////////////////////////////////////////////////////
#define BA_AhbTrcLogPkt_AhbAddr 0x0010
#define B16AhbTrcLogPkt_AhbAddr 0x0010
#define LSb32AhbTrcLogPkt_AhbAddr 0
#define LSb16AhbTrcLogPkt_AhbAddr 0
#define bAhbTrcLogPkt_AhbAddr 32
#define MSK32AhbTrcLogPkt_AhbAddr 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define BA_AhbTrcLogPkt_AhbData 0x0014
#define B16AhbTrcLogPkt_AhbData 0x0014
#define LSb32AhbTrcLogPkt_AhbData 0
#define LSb16AhbTrcLogPkt_AhbData 0
#define bAhbTrcLogPkt_AhbData 32
#define MSK32AhbTrcLogPkt_AhbData 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define BA_AhbTrcLogPkt_TimeStampLower 0x0018
#define B16AhbTrcLogPkt_TimeStampLower 0x0018
#define LSb32AhbTrcLogPkt_TimeStampLower 0
#define LSb16AhbTrcLogPkt_TimeStampLower 0
#define bAhbTrcLogPkt_TimeStampLower 32
#define MSK32AhbTrcLogPkt_TimeStampLower 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define BA_AhbTrcLogPkt_TimeStampUpper 0x001C
#define B16AhbTrcLogPkt_TimeStampUpper 0x001C
#define LSb32AhbTrcLogPkt_TimeStampUpper 0
#define LSb16AhbTrcLogPkt_TimeStampUpper 0
#define bAhbTrcLogPkt_TimeStampUpper 32
#define MSK32AhbTrcLogPkt_TimeStampUpper 0xFFFFFFFF
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcLogPkt {
///////////////////////////////////////////////////////////
#define GET32AhbTrcLogPkt_TriggerIndex(r32) _BFGET_(r32, 7, 0)
#define SET32AhbTrcLogPkt_TriggerIndex(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16AhbTrcLogPkt_TriggerIndex(r16) _BFGET_(r16, 7, 0)
#define SET16AhbTrcLogPkt_TriggerIndex(r16,v) _BFSET_(r16, 7, 0,v)
UNSG32 u_TriggerIndex : 8;
UNSG32 RSVDx0_b8 : 24;
///////////////////////////////////////////////////////////
UNSG8 RSVDx4 [8];
///////////////////////////////////////////////////////////
#define GET32AhbTrcLogPkt_AhbBurst(r32) _BFGET_(r32, 2, 0)
#define SET32AhbTrcLogPkt_AhbBurst(r32,v) _BFSET_(r32, 2, 0,v)
#define GET16AhbTrcLogPkt_AhbBurst(r16) _BFGET_(r16, 2, 0)
#define SET16AhbTrcLogPkt_AhbBurst(r16,v) _BFSET_(r16, 2, 0,v)
#define GET32AhbTrcLogPkt_AhbMastlock(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcLogPkt_AhbMastlock(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcLogPkt_AhbMastlock(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcLogPkt_AhbMastlock(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcLogPkt_AhbProt(r32) _BFGET_(r32, 7, 4)
#define SET32AhbTrcLogPkt_AhbProt(r32,v) _BFSET_(r32, 7, 4,v)
#define GET16AhbTrcLogPkt_AhbProt(r16) _BFGET_(r16, 7, 4)
#define SET16AhbTrcLogPkt_AhbProt(r16,v) _BFSET_(r16, 7, 4,v)
#define GET32AhbTrcLogPkt_AhbSize(r32) _BFGET_(r32,10, 8)
#define SET32AhbTrcLogPkt_AhbSize(r32,v) _BFSET_(r32,10, 8,v)
#define GET16AhbTrcLogPkt_AhbSize(r16) _BFGET_(r16,10, 8)
#define SET16AhbTrcLogPkt_AhbSize(r16,v) _BFSET_(r16,10, 8,v)
#define GET32AhbTrcLogPkt_AhbTrans(r32) _BFGET_(r32,12,11)
#define SET32AhbTrcLogPkt_AhbTrans(r32,v) _BFSET_(r32,12,11,v)
#define GET16AhbTrcLogPkt_AhbTrans(r16) _BFGET_(r16,12,11)
#define SET16AhbTrcLogPkt_AhbTrans(r16,v) _BFSET_(r16,12,11,v)
#define GET32AhbTrcLogPkt_AhbWrite(r32) _BFGET_(r32,13,13)
#define SET32AhbTrcLogPkt_AhbWrite(r32,v) _BFSET_(r32,13,13,v)
#define GET16AhbTrcLogPkt_AhbWrite(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcLogPkt_AhbWrite(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcLogPkt_AhbResp(r32) _BFGET_(r32,14,14)
#define SET32AhbTrcLogPkt_AhbResp(r32,v) _BFSET_(r32,14,14,v)
#define GET16AhbTrcLogPkt_AhbResp(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcLogPkt_AhbResp(r16,v) _BFSET_(r16,14,14,v)
UNSG32 u_AhbBurst : 3;
UNSG32 u_AhbMastlock : 1;
UNSG32 u_AhbProt : 4;
UNSG32 u_AhbSize : 3;
UNSG32 u_AhbTrans : 2;
UNSG32 u_AhbWrite : 1;
UNSG32 u_AhbResp : 1;
UNSG32 RSVDxC_b15 : 17;
///////////////////////////////////////////////////////////
#define GET32AhbTrcLogPkt_AhbAddr(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcLogPkt_AhbAddr(r32,v) _BFSET_(r32,31, 0,v)
UNSG32 u_AhbAddr : 32;
///////////////////////////////////////////////////////////
#define GET32AhbTrcLogPkt_AhbData(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcLogPkt_AhbData(r32,v) _BFSET_(r32,31, 0,v)
UNSG32 u_AhbData : 32;
///////////////////////////////////////////////////////////
#define GET32AhbTrcLogPkt_TimeStampLower(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcLogPkt_TimeStampLower(r32,v) _BFSET_(r32,31, 0,v)
UNSG32 u_TimeStampLower : 32;
///////////////////////////////////////////////////////////
#define GET32AhbTrcLogPkt_TimeStampUpper(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcLogPkt_TimeStampUpper(r32,v) _BFSET_(r32,31, 0,v)
UNSG32 u_TimeStampUpper : 32;
///////////////////////////////////////////////////////////
} SIE_AhbTrcLogPkt;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcLogPkt_drvrd(SIE_AhbTrcLogPkt *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcLogPkt_drvwr(SIE_AhbTrcLogPkt *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcLogPkt_reset(SIE_AhbTrcLogPkt *p);
SIGN32 AhbTrcLogPkt_cmp (SIE_AhbTrcLogPkt *p, SIE_AhbTrcLogPkt *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcLogPkt_check(p,pie,pfx,hLOG) AhbTrcLogPkt_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcLogPkt_print(p, pfx,hLOG) AhbTrcLogPkt_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcLogPkt
////////////////////////////////////////////////////////////
//////
///
/// $INTERFACE AhbTrcRegTri (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 AhbAddrValue (P)
/// %unsigned 32 Addr 0x0
/// @ 0x00004 AhbAddrMask (P)
/// %unsigned 32 Addr 0x0
/// @ 0x00008 AhbCntlValue (P)
/// %unsigned 3 Burst 0x0
/// %unsigned 1 Mastlock 0x0
/// %unsigned 4 Prot 0x0
/// %unsigned 3 Size 0x0
/// %unsigned 2 Trans 0x0
/// %unsigned 1 Write 0x0
/// %unsigned 1 Resp 0x0
/// %% 17 # Stuffing bits...
/// @ 0x0000C AhbCntlMask (P)
/// %unsigned 3 Burst 0x7
/// %unsigned 1 Mastlock 0x1
/// %unsigned 4 Prot 0xF
/// %unsigned 3 Size 0x7
/// %unsigned 2 Trans 0x3
/// %unsigned 1 Write 0x1
/// %unsigned 1 Resp 0x1
/// ###
/// * This group of Value and Mask registers defines the AHB address/control signals of the trigger condition.
/// * The matching logics will do bit-to-bit comparison between AHB bus signals and the programmed Value registers. If the Mask bit of a field is set to one, hardware will ignore the result of that bit. An AHB transaction is considered as meeting the trigger condition only if all the unmasked fields are matching
/// ###
/// %% 17 # Stuffing bits...
/// @ 0x00010 Control (P)
/// %unsigned 1 Enable 0x0
/// ###
/// * 1: enable the trigger condition
/// * 0: disable the trigger condition
/// ###
/// %unsigned 1 SaveLog 0x0
/// ###
/// * If this bit is one, a log packet will be saved into DRAM for every matching AHB transaction.
/// * If this bit is zero, no log packet will be saved.
/// ###
/// %% 30 # Stuffing bits...
/// @ 0x00014 Status (RW)
/// %unsigned 16 Count 0x0
/// ###
/// * Every time a matching AHB transaction is observed, this counter register will be increased by one, regardless if a log packet is saved or not.
/// ###
/// %% 16 # Stuffing bits...
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 24B, bits: 112b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcRegTri
#define h_AhbTrcRegTri (){}
#define RA_AhbTrcRegTri_AhbAddrValue 0x0000
#define BA_AhbTrcRegTri_AhbAddrValue_Addr 0x0000
#define B16AhbTrcRegTri_AhbAddrValue_Addr 0x0000
#define LSb32AhbTrcRegTri_AhbAddrValue_Addr 0
#define LSb16AhbTrcRegTri_AhbAddrValue_Addr 0
#define bAhbTrcRegTri_AhbAddrValue_Addr 32
#define MSK32AhbTrcRegTri_AhbAddrValue_Addr 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegTri_AhbAddrMask 0x0004
#define BA_AhbTrcRegTri_AhbAddrMask_Addr 0x0004
#define B16AhbTrcRegTri_AhbAddrMask_Addr 0x0004
#define LSb32AhbTrcRegTri_AhbAddrMask_Addr 0
#define LSb16AhbTrcRegTri_AhbAddrMask_Addr 0
#define bAhbTrcRegTri_AhbAddrMask_Addr 32
#define MSK32AhbTrcRegTri_AhbAddrMask_Addr 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegTri_AhbCntlValue 0x0008
#define BA_AhbTrcRegTri_AhbCntlValue_Burst 0x0008
#define B16AhbTrcRegTri_AhbCntlValue_Burst 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Burst 0
#define LSb16AhbTrcRegTri_AhbCntlValue_Burst 0
#define bAhbTrcRegTri_AhbCntlValue_Burst 3
#define MSK32AhbTrcRegTri_AhbCntlValue_Burst 0x00000007
#define BA_AhbTrcRegTri_AhbCntlValue_Mastlock 0x0008
#define B16AhbTrcRegTri_AhbCntlValue_Mastlock 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Mastlock 3
#define LSb16AhbTrcRegTri_AhbCntlValue_Mastlock 3
#define bAhbTrcRegTri_AhbCntlValue_Mastlock 1
#define MSK32AhbTrcRegTri_AhbCntlValue_Mastlock 0x00000008
#define BA_AhbTrcRegTri_AhbCntlValue_Prot 0x0008
#define B16AhbTrcRegTri_AhbCntlValue_Prot 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Prot 4
#define LSb16AhbTrcRegTri_AhbCntlValue_Prot 4
#define bAhbTrcRegTri_AhbCntlValue_Prot 4
#define MSK32AhbTrcRegTri_AhbCntlValue_Prot 0x000000F0
#define BA_AhbTrcRegTri_AhbCntlValue_Size 0x0009
#define B16AhbTrcRegTri_AhbCntlValue_Size 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Size 8
#define LSb16AhbTrcRegTri_AhbCntlValue_Size 8
#define bAhbTrcRegTri_AhbCntlValue_Size 3
#define MSK32AhbTrcRegTri_AhbCntlValue_Size 0x00000700
#define BA_AhbTrcRegTri_AhbCntlValue_Trans 0x0009
#define B16AhbTrcRegTri_AhbCntlValue_Trans 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Trans 11
#define LSb16AhbTrcRegTri_AhbCntlValue_Trans 11
#define bAhbTrcRegTri_AhbCntlValue_Trans 2
#define MSK32AhbTrcRegTri_AhbCntlValue_Trans 0x00001800
#define BA_AhbTrcRegTri_AhbCntlValue_Write 0x0009
#define B16AhbTrcRegTri_AhbCntlValue_Write 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Write 13
#define LSb16AhbTrcRegTri_AhbCntlValue_Write 13
#define bAhbTrcRegTri_AhbCntlValue_Write 1
#define MSK32AhbTrcRegTri_AhbCntlValue_Write 0x00002000
#define BA_AhbTrcRegTri_AhbCntlValue_Resp 0x0009
#define B16AhbTrcRegTri_AhbCntlValue_Resp 0x0008
#define LSb32AhbTrcRegTri_AhbCntlValue_Resp 14
#define LSb16AhbTrcRegTri_AhbCntlValue_Resp 14
#define bAhbTrcRegTri_AhbCntlValue_Resp 1
#define MSK32AhbTrcRegTri_AhbCntlValue_Resp 0x00004000
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegTri_AhbCntlMask 0x000C
#define BA_AhbTrcRegTri_AhbCntlMask_Burst 0x000C
#define B16AhbTrcRegTri_AhbCntlMask_Burst 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Burst 0
#define LSb16AhbTrcRegTri_AhbCntlMask_Burst 0
#define bAhbTrcRegTri_AhbCntlMask_Burst 3
#define MSK32AhbTrcRegTri_AhbCntlMask_Burst 0x00000007
#define BA_AhbTrcRegTri_AhbCntlMask_Mastlock 0x000C
#define B16AhbTrcRegTri_AhbCntlMask_Mastlock 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Mastlock 3
#define LSb16AhbTrcRegTri_AhbCntlMask_Mastlock 3
#define bAhbTrcRegTri_AhbCntlMask_Mastlock 1
#define MSK32AhbTrcRegTri_AhbCntlMask_Mastlock 0x00000008
#define BA_AhbTrcRegTri_AhbCntlMask_Prot 0x000C
#define B16AhbTrcRegTri_AhbCntlMask_Prot 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Prot 4
#define LSb16AhbTrcRegTri_AhbCntlMask_Prot 4
#define bAhbTrcRegTri_AhbCntlMask_Prot 4
#define MSK32AhbTrcRegTri_AhbCntlMask_Prot 0x000000F0
#define BA_AhbTrcRegTri_AhbCntlMask_Size 0x000D
#define B16AhbTrcRegTri_AhbCntlMask_Size 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Size 8
#define LSb16AhbTrcRegTri_AhbCntlMask_Size 8
#define bAhbTrcRegTri_AhbCntlMask_Size 3
#define MSK32AhbTrcRegTri_AhbCntlMask_Size 0x00000700
#define BA_AhbTrcRegTri_AhbCntlMask_Trans 0x000D
#define B16AhbTrcRegTri_AhbCntlMask_Trans 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Trans 11
#define LSb16AhbTrcRegTri_AhbCntlMask_Trans 11
#define bAhbTrcRegTri_AhbCntlMask_Trans 2
#define MSK32AhbTrcRegTri_AhbCntlMask_Trans 0x00001800
#define BA_AhbTrcRegTri_AhbCntlMask_Write 0x000D
#define B16AhbTrcRegTri_AhbCntlMask_Write 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Write 13
#define LSb16AhbTrcRegTri_AhbCntlMask_Write 13
#define bAhbTrcRegTri_AhbCntlMask_Write 1
#define MSK32AhbTrcRegTri_AhbCntlMask_Write 0x00002000
#define BA_AhbTrcRegTri_AhbCntlMask_Resp 0x000D
#define B16AhbTrcRegTri_AhbCntlMask_Resp 0x000C
#define LSb32AhbTrcRegTri_AhbCntlMask_Resp 14
#define LSb16AhbTrcRegTri_AhbCntlMask_Resp 14
#define bAhbTrcRegTri_AhbCntlMask_Resp 1
#define MSK32AhbTrcRegTri_AhbCntlMask_Resp 0x00004000
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegTri_Control 0x0010
#define BA_AhbTrcRegTri_Control_Enable 0x0010
#define B16AhbTrcRegTri_Control_Enable 0x0010
#define LSb32AhbTrcRegTri_Control_Enable 0
#define LSb16AhbTrcRegTri_Control_Enable 0
#define bAhbTrcRegTri_Control_Enable 1
#define MSK32AhbTrcRegTri_Control_Enable 0x00000001
#define BA_AhbTrcRegTri_Control_SaveLog 0x0010
#define B16AhbTrcRegTri_Control_SaveLog 0x0010
#define LSb32AhbTrcRegTri_Control_SaveLog 1
#define LSb16AhbTrcRegTri_Control_SaveLog 1
#define bAhbTrcRegTri_Control_SaveLog 1
#define MSK32AhbTrcRegTri_Control_SaveLog 0x00000002
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegTri_Status 0x0014
#define BA_AhbTrcRegTri_Status_Count 0x0014
#define B16AhbTrcRegTri_Status_Count 0x0014
#define LSb32AhbTrcRegTri_Status_Count 0
#define LSb16AhbTrcRegTri_Status_Count 0
#define bAhbTrcRegTri_Status_Count 16
#define MSK32AhbTrcRegTri_Status_Count 0x0000FFFF
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcRegTri {
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegTri_AhbAddrValue_Addr(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegTri_AhbAddrValue_Addr(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegTri_AhbAddrValue {\
UNSG32 uAhbAddrValue_Addr : 32;\
}
union { UNSG32 u32AhbTrcRegTri_AhbAddrValue;
struct w32AhbTrcRegTri_AhbAddrValue;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegTri_AhbAddrMask_Addr(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegTri_AhbAddrMask_Addr(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegTri_AhbAddrMask {\
UNSG32 uAhbAddrMask_Addr : 32;\
}
union { UNSG32 u32AhbTrcRegTri_AhbAddrMask;
struct w32AhbTrcRegTri_AhbAddrMask;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegTri_AhbCntlValue_Burst(r32) _BFGET_(r32, 2, 0)
#define SET32AhbTrcRegTri_AhbCntlValue_Burst(r32,v) _BFSET_(r32, 2, 0,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Burst(r16) _BFGET_(r16, 2, 0)
#define SET16AhbTrcRegTri_AhbCntlValue_Burst(r16,v) _BFSET_(r16, 2, 0,v)
#define GET32AhbTrcRegTri_AhbCntlValue_Mastlock(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcRegTri_AhbCntlValue_Mastlock(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Mastlock(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegTri_AhbCntlValue_Mastlock(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegTri_AhbCntlValue_Prot(r32) _BFGET_(r32, 7, 4)
#define SET32AhbTrcRegTri_AhbCntlValue_Prot(r32,v) _BFSET_(r32, 7, 4,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Prot(r16) _BFGET_(r16, 7, 4)
#define SET16AhbTrcRegTri_AhbCntlValue_Prot(r16,v) _BFSET_(r16, 7, 4,v)
#define GET32AhbTrcRegTri_AhbCntlValue_Size(r32) _BFGET_(r32,10, 8)
#define SET32AhbTrcRegTri_AhbCntlValue_Size(r32,v) _BFSET_(r32,10, 8,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Size(r16) _BFGET_(r16,10, 8)
#define SET16AhbTrcRegTri_AhbCntlValue_Size(r16,v) _BFSET_(r16,10, 8,v)
#define GET32AhbTrcRegTri_AhbCntlValue_Trans(r32) _BFGET_(r32,12,11)
#define SET32AhbTrcRegTri_AhbCntlValue_Trans(r32,v) _BFSET_(r32,12,11,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Trans(r16) _BFGET_(r16,12,11)
#define SET16AhbTrcRegTri_AhbCntlValue_Trans(r16,v) _BFSET_(r16,12,11,v)
#define GET32AhbTrcRegTri_AhbCntlValue_Write(r32) _BFGET_(r32,13,13)
#define SET32AhbTrcRegTri_AhbCntlValue_Write(r32,v) _BFSET_(r32,13,13,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Write(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcRegTri_AhbCntlValue_Write(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcRegTri_AhbCntlValue_Resp(r32) _BFGET_(r32,14,14)
#define SET32AhbTrcRegTri_AhbCntlValue_Resp(r32,v) _BFSET_(r32,14,14,v)
#define GET16AhbTrcRegTri_AhbCntlValue_Resp(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcRegTri_AhbCntlValue_Resp(r16,v) _BFSET_(r16,14,14,v)
#define w32AhbTrcRegTri_AhbCntlValue {\
UNSG32 uAhbCntlValue_Burst : 3;\
UNSG32 uAhbCntlValue_Mastlock : 1;\
UNSG32 uAhbCntlValue_Prot : 4;\
UNSG32 uAhbCntlValue_Size : 3;\
UNSG32 uAhbCntlValue_Trans : 2;\
UNSG32 uAhbCntlValue_Write : 1;\
UNSG32 uAhbCntlValue_Resp : 1;\
UNSG32 RSVDx8_b15 : 17;\
}
union { UNSG32 u32AhbTrcRegTri_AhbCntlValue;
struct w32AhbTrcRegTri_AhbCntlValue;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegTri_AhbCntlMask_Burst(r32) _BFGET_(r32, 2, 0)
#define SET32AhbTrcRegTri_AhbCntlMask_Burst(r32,v) _BFSET_(r32, 2, 0,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Burst(r16) _BFGET_(r16, 2, 0)
#define SET16AhbTrcRegTri_AhbCntlMask_Burst(r16,v) _BFSET_(r16, 2, 0,v)
#define GET32AhbTrcRegTri_AhbCntlMask_Mastlock(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcRegTri_AhbCntlMask_Mastlock(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Mastlock(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegTri_AhbCntlMask_Mastlock(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegTri_AhbCntlMask_Prot(r32) _BFGET_(r32, 7, 4)
#define SET32AhbTrcRegTri_AhbCntlMask_Prot(r32,v) _BFSET_(r32, 7, 4,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Prot(r16) _BFGET_(r16, 7, 4)
#define SET16AhbTrcRegTri_AhbCntlMask_Prot(r16,v) _BFSET_(r16, 7, 4,v)
#define GET32AhbTrcRegTri_AhbCntlMask_Size(r32) _BFGET_(r32,10, 8)
#define SET32AhbTrcRegTri_AhbCntlMask_Size(r32,v) _BFSET_(r32,10, 8,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Size(r16) _BFGET_(r16,10, 8)
#define SET16AhbTrcRegTri_AhbCntlMask_Size(r16,v) _BFSET_(r16,10, 8,v)
#define GET32AhbTrcRegTri_AhbCntlMask_Trans(r32) _BFGET_(r32,12,11)
#define SET32AhbTrcRegTri_AhbCntlMask_Trans(r32,v) _BFSET_(r32,12,11,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Trans(r16) _BFGET_(r16,12,11)
#define SET16AhbTrcRegTri_AhbCntlMask_Trans(r16,v) _BFSET_(r16,12,11,v)
#define GET32AhbTrcRegTri_AhbCntlMask_Write(r32) _BFGET_(r32,13,13)
#define SET32AhbTrcRegTri_AhbCntlMask_Write(r32,v) _BFSET_(r32,13,13,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Write(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcRegTri_AhbCntlMask_Write(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcRegTri_AhbCntlMask_Resp(r32) _BFGET_(r32,14,14)
#define SET32AhbTrcRegTri_AhbCntlMask_Resp(r32,v) _BFSET_(r32,14,14,v)
#define GET16AhbTrcRegTri_AhbCntlMask_Resp(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcRegTri_AhbCntlMask_Resp(r16,v) _BFSET_(r16,14,14,v)
#define w32AhbTrcRegTri_AhbCntlMask {\
UNSG32 uAhbCntlMask_Burst : 3;\
UNSG32 uAhbCntlMask_Mastlock : 1;\
UNSG32 uAhbCntlMask_Prot : 4;\
UNSG32 uAhbCntlMask_Size : 3;\
UNSG32 uAhbCntlMask_Trans : 2;\
UNSG32 uAhbCntlMask_Write : 1;\
UNSG32 uAhbCntlMask_Resp : 1;\
UNSG32 RSVDxC_b15 : 17;\
}
union { UNSG32 u32AhbTrcRegTri_AhbCntlMask;
struct w32AhbTrcRegTri_AhbCntlMask;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegTri_Control_Enable(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegTri_Control_Enable(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegTri_Control_Enable(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegTri_Control_Enable(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegTri_Control_SaveLog(r32) _BFGET_(r32, 1, 1)
#define SET32AhbTrcRegTri_Control_SaveLog(r32,v) _BFSET_(r32, 1, 1,v)
#define GET16AhbTrcRegTri_Control_SaveLog(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegTri_Control_SaveLog(r16,v) _BFSET_(r16, 1, 1,v)
#define w32AhbTrcRegTri_Control {\
UNSG32 uControl_Enable : 1;\
UNSG32 uControl_SaveLog : 1;\
UNSG32 RSVDx10_b2 : 30;\
}
union { UNSG32 u32AhbTrcRegTri_Control;
struct w32AhbTrcRegTri_Control;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegTri_Status_Count(r32) _BFGET_(r32,15, 0)
#define SET32AhbTrcRegTri_Status_Count(r32,v) _BFSET_(r32,15, 0,v)
#define GET16AhbTrcRegTri_Status_Count(r16) _BFGET_(r16,15, 0)
#define SET16AhbTrcRegTri_Status_Count(r16,v) _BFSET_(r16,15, 0,v)
#define w32AhbTrcRegTri_Status {\
UNSG32 uStatus_Count : 16;\
UNSG32 RSVDx14_b16 : 16;\
}
union { UNSG32 u32AhbTrcRegTri_Status;
struct w32AhbTrcRegTri_Status;
};
///////////////////////////////////////////////////////////
} SIE_AhbTrcRegTri;
typedef union T32AhbTrcRegTri_AhbAddrValue
{ UNSG32 u32;
struct w32AhbTrcRegTri_AhbAddrValue;
} T32AhbTrcRegTri_AhbAddrValue;
typedef union T32AhbTrcRegTri_AhbAddrMask
{ UNSG32 u32;
struct w32AhbTrcRegTri_AhbAddrMask;
} T32AhbTrcRegTri_AhbAddrMask;
typedef union T32AhbTrcRegTri_AhbCntlValue
{ UNSG32 u32;
struct w32AhbTrcRegTri_AhbCntlValue;
} T32AhbTrcRegTri_AhbCntlValue;
typedef union T32AhbTrcRegTri_AhbCntlMask
{ UNSG32 u32;
struct w32AhbTrcRegTri_AhbCntlMask;
} T32AhbTrcRegTri_AhbCntlMask;
typedef union T32AhbTrcRegTri_Control
{ UNSG32 u32;
struct w32AhbTrcRegTri_Control;
} T32AhbTrcRegTri_Control;
typedef union T32AhbTrcRegTri_Status
{ UNSG32 u32;
struct w32AhbTrcRegTri_Status;
} T32AhbTrcRegTri_Status;
///////////////////////////////////////////////////////////
typedef union TAhbTrcRegTri_AhbAddrValue
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegTri_AhbAddrValue;
};
} TAhbTrcRegTri_AhbAddrValue;
typedef union TAhbTrcRegTri_AhbAddrMask
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegTri_AhbAddrMask;
};
} TAhbTrcRegTri_AhbAddrMask;
typedef union TAhbTrcRegTri_AhbCntlValue
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegTri_AhbCntlValue;
};
} TAhbTrcRegTri_AhbCntlValue;
typedef union TAhbTrcRegTri_AhbCntlMask
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegTri_AhbCntlMask;
};
} TAhbTrcRegTri_AhbCntlMask;
typedef union TAhbTrcRegTri_Control
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegTri_Control;
};
} TAhbTrcRegTri_Control;
typedef union TAhbTrcRegTri_Status
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegTri_Status;
};
} TAhbTrcRegTri_Status;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcRegTri_drvrd(SIE_AhbTrcRegTri *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcRegTri_drvwr(SIE_AhbTrcRegTri *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcRegTri_reset(SIE_AhbTrcRegTri *p);
SIGN32 AhbTrcRegTri_cmp (SIE_AhbTrcRegTri *p, SIE_AhbTrcRegTri *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcRegTri_check(p,pie,pfx,hLOG) AhbTrcRegTri_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcRegTri_print(p, pfx,hLOG) AhbTrcRegTri_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcRegTri
////////////////////////////////////////////////////////////
//////
///
/// $INTERFACE AhbTrcRegLog (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 BufBase (P)
/// %unsigned 32 Addr 0x0
/// ###
/// * Based address of the log buffer in DRAM, in byte
/// ###
/// @ 0x00004 BufSize (P)
/// %unsigned 32 Size 0x0
/// ###
/// * Size of the log buffer in DRAM, in byte; The buffer size must be multiple of 32 and it should not be 0. If buffer size is set to 0, no log will be saved into DRAM even if the trigger conditions are met.
/// ###
/// @ 0x00008 ReadCounter (P)
/// %unsigned 32 ReadCounter 0x0
/// ###
/// * Total number of bytes software reads from the log buffer. Software should keep increasing this register as it reads data from the log buffer.
/// ###
/// @ 0x0000C WriteCounter (RW)
/// %unsigned 32 WriteCounter 0x0
/// ###
/// * Total number of bytes hardware writes into the log buffer. Hardware keeps increasing this counter as it reads data from the log buffer.
/// * Software should not program this register during normal operation. In case software needs to program this register, it should stop the tracing first.
/// ###
/// @ 0x00010 WritePointer (RW)
/// %unsigned 32 WritePointer 0x0
/// ###
/// * Write pointer (offset value to BaseAddr) of the log buffer, in byte;
/// * Once WritePointer reach BufferSize, hard will set it back to zero.
/// * Software should not program this register during normal operation. In case software needs to program this register, it should stop the tracing first.
/// ###
/// @ 0x00014 Control (P)
/// %unsigned 1 Overwrite 0x0
/// ###
/// * When this bit is one, hardware will overwrite old packets once the log buffer is full.
/// * When this bit is zero, hardware will drop new packets when log buffer is full.
/// ###
/// %% 31 # Stuffing bits...
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 24B, bits: 161b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcRegLog
#define h_AhbTrcRegLog (){}
#define RA_AhbTrcRegLog_BufBase 0x0000
#define BA_AhbTrcRegLog_BufBase_Addr 0x0000
#define B16AhbTrcRegLog_BufBase_Addr 0x0000
#define LSb32AhbTrcRegLog_BufBase_Addr 0
#define LSb16AhbTrcRegLog_BufBase_Addr 0
#define bAhbTrcRegLog_BufBase_Addr 32
#define MSK32AhbTrcRegLog_BufBase_Addr 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegLog_BufSize 0x0004
#define BA_AhbTrcRegLog_BufSize_Size 0x0004
#define B16AhbTrcRegLog_BufSize_Size 0x0004
#define LSb32AhbTrcRegLog_BufSize_Size 0
#define LSb16AhbTrcRegLog_BufSize_Size 0
#define bAhbTrcRegLog_BufSize_Size 32
#define MSK32AhbTrcRegLog_BufSize_Size 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegLog_ReadCounter 0x0008
#define BA_AhbTrcRegLog_ReadCounter_ReadCounter 0x0008
#define B16AhbTrcRegLog_ReadCounter_ReadCounter 0x0008
#define LSb32AhbTrcRegLog_ReadCounter_ReadCounter 0
#define LSb16AhbTrcRegLog_ReadCounter_ReadCounter 0
#define bAhbTrcRegLog_ReadCounter_ReadCounter 32
#define MSK32AhbTrcRegLog_ReadCounter_ReadCounter 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegLog_WriteCounter 0x000C
#define BA_AhbTrcRegLog_WriteCounter_WriteCounter 0x000C
#define B16AhbTrcRegLog_WriteCounter_WriteCounter 0x000C
#define LSb32AhbTrcRegLog_WriteCounter_WriteCounter 0
#define LSb16AhbTrcRegLog_WriteCounter_WriteCounter 0
#define bAhbTrcRegLog_WriteCounter_WriteCounter 32
#define MSK32AhbTrcRegLog_WriteCounter_WriteCounter 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegLog_WritePointer 0x0010
#define BA_AhbTrcRegLog_WritePointer_WritePointer 0x0010
#define B16AhbTrcRegLog_WritePointer_WritePointer 0x0010
#define LSb32AhbTrcRegLog_WritePointer_WritePointer 0
#define LSb16AhbTrcRegLog_WritePointer_WritePointer 0
#define bAhbTrcRegLog_WritePointer_WritePointer 32
#define MSK32AhbTrcRegLog_WritePointer_WritePointer 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegLog_Control 0x0014
#define BA_AhbTrcRegLog_Control_Overwrite 0x0014
#define B16AhbTrcRegLog_Control_Overwrite 0x0014
#define LSb32AhbTrcRegLog_Control_Overwrite 0
#define LSb16AhbTrcRegLog_Control_Overwrite 0
#define bAhbTrcRegLog_Control_Overwrite 1
#define MSK32AhbTrcRegLog_Control_Overwrite 0x00000001
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcRegLog {
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegLog_BufBase_Addr(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegLog_BufBase_Addr(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegLog_BufBase {\
UNSG32 uBufBase_Addr : 32;\
}
union { UNSG32 u32AhbTrcRegLog_BufBase;
struct w32AhbTrcRegLog_BufBase;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegLog_BufSize_Size(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegLog_BufSize_Size(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegLog_BufSize {\
UNSG32 uBufSize_Size : 32;\
}
union { UNSG32 u32AhbTrcRegLog_BufSize;
struct w32AhbTrcRegLog_BufSize;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegLog_ReadCounter_ReadCounter(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegLog_ReadCounter_ReadCounter(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegLog_ReadCounter {\
UNSG32 uReadCounter_ReadCounter : 32;\
}
union { UNSG32 u32AhbTrcRegLog_ReadCounter;
struct w32AhbTrcRegLog_ReadCounter;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegLog_WriteCounter_WriteCounter(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegLog_WriteCounter_WriteCounter(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegLog_WriteCounter {\
UNSG32 uWriteCounter_WriteCounter : 32;\
}
union { UNSG32 u32AhbTrcRegLog_WriteCounter;
struct w32AhbTrcRegLog_WriteCounter;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegLog_WritePointer_WritePointer(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegLog_WritePointer_WritePointer(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegLog_WritePointer {\
UNSG32 uWritePointer_WritePointer : 32;\
}
union { UNSG32 u32AhbTrcRegLog_WritePointer;
struct w32AhbTrcRegLog_WritePointer;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegLog_Control_Overwrite(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegLog_Control_Overwrite(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegLog_Control_Overwrite(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegLog_Control_Overwrite(r16,v) _BFSET_(r16, 0, 0,v)
#define w32AhbTrcRegLog_Control {\
UNSG32 uControl_Overwrite : 1;\
UNSG32 RSVDx14_b1 : 31;\
}
union { UNSG32 u32AhbTrcRegLog_Control;
struct w32AhbTrcRegLog_Control;
};
///////////////////////////////////////////////////////////
} SIE_AhbTrcRegLog;
typedef union T32AhbTrcRegLog_BufBase
{ UNSG32 u32;
struct w32AhbTrcRegLog_BufBase;
} T32AhbTrcRegLog_BufBase;
typedef union T32AhbTrcRegLog_BufSize
{ UNSG32 u32;
struct w32AhbTrcRegLog_BufSize;
} T32AhbTrcRegLog_BufSize;
typedef union T32AhbTrcRegLog_ReadCounter
{ UNSG32 u32;
struct w32AhbTrcRegLog_ReadCounter;
} T32AhbTrcRegLog_ReadCounter;
typedef union T32AhbTrcRegLog_WriteCounter
{ UNSG32 u32;
struct w32AhbTrcRegLog_WriteCounter;
} T32AhbTrcRegLog_WriteCounter;
typedef union T32AhbTrcRegLog_WritePointer
{ UNSG32 u32;
struct w32AhbTrcRegLog_WritePointer;
} T32AhbTrcRegLog_WritePointer;
typedef union T32AhbTrcRegLog_Control
{ UNSG32 u32;
struct w32AhbTrcRegLog_Control;
} T32AhbTrcRegLog_Control;
///////////////////////////////////////////////////////////
typedef union TAhbTrcRegLog_BufBase
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegLog_BufBase;
};
} TAhbTrcRegLog_BufBase;
typedef union TAhbTrcRegLog_BufSize
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegLog_BufSize;
};
} TAhbTrcRegLog_BufSize;
typedef union TAhbTrcRegLog_ReadCounter
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegLog_ReadCounter;
};
} TAhbTrcRegLog_ReadCounter;
typedef union TAhbTrcRegLog_WriteCounter
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegLog_WriteCounter;
};
} TAhbTrcRegLog_WriteCounter;
typedef union TAhbTrcRegLog_WritePointer
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegLog_WritePointer;
};
} TAhbTrcRegLog_WritePointer;
typedef union TAhbTrcRegLog_Control
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegLog_Control;
};
} TAhbTrcRegLog_Control;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcRegLog_drvrd(SIE_AhbTrcRegLog *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcRegLog_drvwr(SIE_AhbTrcRegLog *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcRegLog_reset(SIE_AhbTrcRegLog *p);
SIGN32 AhbTrcRegLog_cmp (SIE_AhbTrcRegLog *p, SIE_AhbTrcRegLog *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcRegLog_check(p,pie,pfx,hLOG) AhbTrcRegLog_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcRegLog_print(p, pfx,hLOG) AhbTrcRegLog_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcRegLog
////////////////////////////////////////////////////////////
//////
///
/// $INTERFACE AhbTrcRegInt (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 IntTriStatus (WOC-)
/// %unsigned 1 IntTri_0i 0x0
/// %unsigned 1 IntTri_1i 0x0
/// %unsigned 1 IntTri_2i 0x0
/// %unsigned 1 IntTri_3i 0x0
/// %unsigned 1 IntTri_4i 0x0
/// %unsigned 1 IntTri_5i 0x0
/// %unsigned 1 IntTri_6i 0x0
/// %unsigned 1 IntTri_7i 0x0
/// %unsigned 1 IntTri_8i 0x0
/// %unsigned 1 IntTri_9i 0x0
/// %unsigned 1 IntTri_10i 0x0
/// %unsigned 1 IntTri_11i 0x0
/// %unsigned 1 IntTri_12i 0x0
/// %unsigned 1 IntTri_13i 0x0
/// %unsigned 1 IntTri_14i 0x0
/// %unsigned 1 IntTri_15i 0x0
/// %unsigned 1 IntTri_16i 0x0
/// %unsigned 1 IntTri_17i 0x0
/// %unsigned 1 IntTri_18i 0x0
/// %unsigned 1 IntTri_19i 0x0
/// %unsigned 1 IntTri_20i 0x0
/// %unsigned 1 IntTri_21i 0x0
/// %unsigned 1 IntTri_22i 0x0
/// %unsigned 1 IntTri_23i 0x0
/// %unsigned 1 IntTri_24i 0x0
/// %unsigned 1 IntTri_25i 0x0
/// %unsigned 1 IntTri_26i 0x0
/// %unsigned 1 IntTri_27i 0x0
/// %unsigned 1 IntTri_28i 0x0
/// %unsigned 1 IntTri_29i 0x0
/// %unsigned 1 IntTri_30i 0x0
/// %unsigned 1 IntTri_31i 0x0
/// ###
/// * trigger status interrupts;
/// * Bit i is used for trigger condition i.
/// * An IntTri bit will be set when a matching AHB transaction is observed for the associated trigger condition.
/// ###
/// @ 0x00004 IntTriMask (P)
/// %unsigned 1 IntTri_0i 0x1
/// %unsigned 1 IntTri_1i 0x1
/// %unsigned 1 IntTri_2i 0x1
/// %unsigned 1 IntTri_3i 0x1
/// %unsigned 1 IntTri_4i 0x1
/// %unsigned 1 IntTri_5i 0x1
/// %unsigned 1 IntTri_6i 0x1
/// %unsigned 1 IntTri_7i 0x1
/// %unsigned 1 IntTri_8i 0x1
/// %unsigned 1 IntTri_9i 0x1
/// %unsigned 1 IntTri_10i 0x1
/// %unsigned 1 IntTri_11i 0x1
/// %unsigned 1 IntTri_12i 0x1
/// %unsigned 1 IntTri_13i 0x1
/// %unsigned 1 IntTri_14i 0x1
/// %unsigned 1 IntTri_15i 0x1
/// %unsigned 1 IntTri_16i 0x1
/// %unsigned 1 IntTri_17i 0x1
/// %unsigned 1 IntTri_18i 0x1
/// %unsigned 1 IntTri_19i 0x1
/// %unsigned 1 IntTri_20i 0x1
/// %unsigned 1 IntTri_21i 0x1
/// %unsigned 1 IntTri_22i 0x1
/// %unsigned 1 IntTri_23i 0x1
/// %unsigned 1 IntTri_24i 0x1
/// %unsigned 1 IntTri_25i 0x1
/// %unsigned 1 IntTri_26i 0x1
/// %unsigned 1 IntTri_27i 0x1
/// %unsigned 1 IntTri_28i 0x1
/// %unsigned 1 IntTri_29i 0x1
/// %unsigned 1 IntTri_30i 0x1
/// %unsigned 1 IntTri_31i 0x1
/// ###
/// * Mask bits for trigger interrupts;
/// * Bit i is used for trigger interrupt i.
/// ###
/// @ 0x00008 IntLogStatus (WOC-)
/// %unsigned 1 BufAlmostFull 0x0
/// ###
/// * log buffer almost full interrupt;
/// * The bit is set to one when log buffer is ¾ full. Software can adjust the log buffer read pointer to release some space to avoid overflow.
/// * This interrupt is cleared automatically when the buffer is less than ¾ full.
/// ###
/// %unsigned 1 PacketDropped 0x0
/// ###
/// * log buffer overflow interrupt;
/// * The bit is set to one when packets are dropped due to buffer full.
/// ###
/// %unsigned 1 BufOverflow 0x0
/// ###
/// * log buffer overflow interrupt;
/// * The bit is set to one when buffer level is bigger than buffer size.
/// ###
/// %unsigned 1 BufUnderflow 0x0
/// ###
/// * log buffer underflow interrupt;
/// * The bit is set to one when buffer level is smaller than zero.
/// ###
/// %unsigned 1 FastMonMiss 0x0
/// ###
/// * Fast AHB monitor miss interrupt;
/// * The bit is set to one when some transactions on fast AHB are missed by the monitor. This will happen when there are too many AHB transactions and hardware cannot process all of them in time. Setting stricter trigger conditions or disabling the logging will reduce the chance of missing transactions.
/// ###
/// %unsigned 1 SlowMonMiss 0x0
/// ###
/// * Slow AHB monitor miss interrupt;
/// * The bit is set to one when some transactions on slow AHB are missed by the monitor.
/// ###
/// %% 26 # Stuffing bits...
/// @ 0x0000C IntLogMask (P)
/// %unsigned 1 BufAlmostFull 0x1
/// ###
/// * Mask bit for log buffer almost full interrupt
/// ###
/// %unsigned 1 PacketDropped 0x1
/// ###
/// * Mask bit for packet dropped interrupt
/// ###
/// %unsigned 1 BufOverflow 0x1
/// ###
/// * Mask bit for log buffer overflow interrupt
/// ###
/// %unsigned 1 BufUnderflow 0x1
/// ###
/// * Mask bit for log buffer Underflow interrupt
/// ###
/// %unsigned 1 FastMonMiss 0x1
/// ###
/// * Mask bit for fast AHB monitor miss interrupt;
/// ###
/// %unsigned 1 SlowMonMiss 0x1
/// ###
/// * Mask bit for slow AHB monitor miss interrupt;
/// ###
/// %% 26 # Stuffing bits...
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 16B, bits: 76b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcRegInt
#define h_AhbTrcRegInt (){}
#define RA_AhbTrcRegInt_IntTriStatus 0x0000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_0i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_0i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_0i 0
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_0i 0
#define bAhbTrcRegInt_IntTriStatus_IntTri_0i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_0i 0x00000001
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_1i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_1i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_1i 1
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_1i 1
#define bAhbTrcRegInt_IntTriStatus_IntTri_1i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_1i 0x00000002
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_2i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_2i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_2i 2
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_2i 2
#define bAhbTrcRegInt_IntTriStatus_IntTri_2i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_2i 0x00000004
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_3i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_3i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_3i 3
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_3i 3
#define bAhbTrcRegInt_IntTriStatus_IntTri_3i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_3i 0x00000008
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_4i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_4i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_4i 4
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_4i 4
#define bAhbTrcRegInt_IntTriStatus_IntTri_4i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_4i 0x00000010
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_5i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_5i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_5i 5
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_5i 5
#define bAhbTrcRegInt_IntTriStatus_IntTri_5i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_5i 0x00000020
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_6i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_6i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_6i 6
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_6i 6
#define bAhbTrcRegInt_IntTriStatus_IntTri_6i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_6i 0x00000040
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_7i 0x0000
#define B16AhbTrcRegInt_IntTriStatus_IntTri_7i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_7i 7
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_7i 7
#define bAhbTrcRegInt_IntTriStatus_IntTri_7i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_7i 0x00000080
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_8i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_8i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_8i 8
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_8i 8
#define bAhbTrcRegInt_IntTriStatus_IntTri_8i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_8i 0x00000100
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_9i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_9i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_9i 9
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_9i 9
#define bAhbTrcRegInt_IntTriStatus_IntTri_9i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_9i 0x00000200
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_10i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_10i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_10i 10
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_10i 10
#define bAhbTrcRegInt_IntTriStatus_IntTri_10i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_10i 0x00000400
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_11i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_11i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_11i 11
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_11i 11
#define bAhbTrcRegInt_IntTriStatus_IntTri_11i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_11i 0x00000800
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_12i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_12i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_12i 12
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_12i 12
#define bAhbTrcRegInt_IntTriStatus_IntTri_12i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_12i 0x00001000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_13i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_13i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_13i 13
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_13i 13
#define bAhbTrcRegInt_IntTriStatus_IntTri_13i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_13i 0x00002000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_14i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_14i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_14i 14
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_14i 14
#define bAhbTrcRegInt_IntTriStatus_IntTri_14i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_14i 0x00004000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_15i 0x0001
#define B16AhbTrcRegInt_IntTriStatus_IntTri_15i 0x0000
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_15i 15
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_15i 15
#define bAhbTrcRegInt_IntTriStatus_IntTri_15i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_15i 0x00008000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_16i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_16i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_16i 16
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_16i 0
#define bAhbTrcRegInt_IntTriStatus_IntTri_16i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_16i 0x00010000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_17i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_17i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_17i 17
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_17i 1
#define bAhbTrcRegInt_IntTriStatus_IntTri_17i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_17i 0x00020000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_18i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_18i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_18i 18
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_18i 2
#define bAhbTrcRegInt_IntTriStatus_IntTri_18i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_18i 0x00040000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_19i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_19i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_19i 19
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_19i 3
#define bAhbTrcRegInt_IntTriStatus_IntTri_19i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_19i 0x00080000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_20i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_20i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_20i 20
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_20i 4
#define bAhbTrcRegInt_IntTriStatus_IntTri_20i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_20i 0x00100000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_21i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_21i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_21i 21
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_21i 5
#define bAhbTrcRegInt_IntTriStatus_IntTri_21i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_21i 0x00200000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_22i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_22i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_22i 22
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_22i 6
#define bAhbTrcRegInt_IntTriStatus_IntTri_22i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_22i 0x00400000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_23i 0x0002
#define B16AhbTrcRegInt_IntTriStatus_IntTri_23i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_23i 23
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_23i 7
#define bAhbTrcRegInt_IntTriStatus_IntTri_23i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_23i 0x00800000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_24i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_24i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_24i 24
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_24i 8
#define bAhbTrcRegInt_IntTriStatus_IntTri_24i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_24i 0x01000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_25i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_25i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_25i 25
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_25i 9
#define bAhbTrcRegInt_IntTriStatus_IntTri_25i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_25i 0x02000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_26i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_26i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_26i 26
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_26i 10
#define bAhbTrcRegInt_IntTriStatus_IntTri_26i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_26i 0x04000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_27i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_27i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_27i 27
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_27i 11
#define bAhbTrcRegInt_IntTriStatus_IntTri_27i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_27i 0x08000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_28i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_28i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_28i 28
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_28i 12
#define bAhbTrcRegInt_IntTriStatus_IntTri_28i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_28i 0x10000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_29i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_29i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_29i 29
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_29i 13
#define bAhbTrcRegInt_IntTriStatus_IntTri_29i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_29i 0x20000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_30i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_30i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_30i 30
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_30i 14
#define bAhbTrcRegInt_IntTriStatus_IntTri_30i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_30i 0x40000000
#define BA_AhbTrcRegInt_IntTriStatus_IntTri_31i 0x0003
#define B16AhbTrcRegInt_IntTriStatus_IntTri_31i 0x0002
#define LSb32AhbTrcRegInt_IntTriStatus_IntTri_31i 31
#define LSb16AhbTrcRegInt_IntTriStatus_IntTri_31i 15
#define bAhbTrcRegInt_IntTriStatus_IntTri_31i 1
#define MSK32AhbTrcRegInt_IntTriStatus_IntTri_31i 0x80000000
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegInt_IntTriMask 0x0004
#define BA_AhbTrcRegInt_IntTriMask_IntTri_0i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_0i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_0i 0
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_0i 0
#define bAhbTrcRegInt_IntTriMask_IntTri_0i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_0i 0x00000001
#define BA_AhbTrcRegInt_IntTriMask_IntTri_1i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_1i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_1i 1
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_1i 1
#define bAhbTrcRegInt_IntTriMask_IntTri_1i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_1i 0x00000002
#define BA_AhbTrcRegInt_IntTriMask_IntTri_2i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_2i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_2i 2
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_2i 2
#define bAhbTrcRegInt_IntTriMask_IntTri_2i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_2i 0x00000004
#define BA_AhbTrcRegInt_IntTriMask_IntTri_3i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_3i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_3i 3
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_3i 3
#define bAhbTrcRegInt_IntTriMask_IntTri_3i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_3i 0x00000008
#define BA_AhbTrcRegInt_IntTriMask_IntTri_4i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_4i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_4i 4
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_4i 4
#define bAhbTrcRegInt_IntTriMask_IntTri_4i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_4i 0x00000010
#define BA_AhbTrcRegInt_IntTriMask_IntTri_5i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_5i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_5i 5
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_5i 5
#define bAhbTrcRegInt_IntTriMask_IntTri_5i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_5i 0x00000020
#define BA_AhbTrcRegInt_IntTriMask_IntTri_6i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_6i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_6i 6
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_6i 6
#define bAhbTrcRegInt_IntTriMask_IntTri_6i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_6i 0x00000040
#define BA_AhbTrcRegInt_IntTriMask_IntTri_7i 0x0004
#define B16AhbTrcRegInt_IntTriMask_IntTri_7i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_7i 7
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_7i 7
#define bAhbTrcRegInt_IntTriMask_IntTri_7i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_7i 0x00000080
#define BA_AhbTrcRegInt_IntTriMask_IntTri_8i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_8i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_8i 8
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_8i 8
#define bAhbTrcRegInt_IntTriMask_IntTri_8i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_8i 0x00000100
#define BA_AhbTrcRegInt_IntTriMask_IntTri_9i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_9i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_9i 9
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_9i 9
#define bAhbTrcRegInt_IntTriMask_IntTri_9i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_9i 0x00000200
#define BA_AhbTrcRegInt_IntTriMask_IntTri_10i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_10i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_10i 10
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_10i 10
#define bAhbTrcRegInt_IntTriMask_IntTri_10i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_10i 0x00000400
#define BA_AhbTrcRegInt_IntTriMask_IntTri_11i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_11i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_11i 11
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_11i 11
#define bAhbTrcRegInt_IntTriMask_IntTri_11i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_11i 0x00000800
#define BA_AhbTrcRegInt_IntTriMask_IntTri_12i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_12i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_12i 12
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_12i 12
#define bAhbTrcRegInt_IntTriMask_IntTri_12i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_12i 0x00001000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_13i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_13i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_13i 13
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_13i 13
#define bAhbTrcRegInt_IntTriMask_IntTri_13i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_13i 0x00002000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_14i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_14i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_14i 14
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_14i 14
#define bAhbTrcRegInt_IntTriMask_IntTri_14i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_14i 0x00004000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_15i 0x0005
#define B16AhbTrcRegInt_IntTriMask_IntTri_15i 0x0004
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_15i 15
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_15i 15
#define bAhbTrcRegInt_IntTriMask_IntTri_15i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_15i 0x00008000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_16i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_16i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_16i 16
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_16i 0
#define bAhbTrcRegInt_IntTriMask_IntTri_16i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_16i 0x00010000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_17i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_17i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_17i 17
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_17i 1
#define bAhbTrcRegInt_IntTriMask_IntTri_17i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_17i 0x00020000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_18i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_18i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_18i 18
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_18i 2
#define bAhbTrcRegInt_IntTriMask_IntTri_18i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_18i 0x00040000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_19i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_19i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_19i 19
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_19i 3
#define bAhbTrcRegInt_IntTriMask_IntTri_19i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_19i 0x00080000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_20i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_20i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_20i 20
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_20i 4
#define bAhbTrcRegInt_IntTriMask_IntTri_20i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_20i 0x00100000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_21i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_21i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_21i 21
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_21i 5
#define bAhbTrcRegInt_IntTriMask_IntTri_21i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_21i 0x00200000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_22i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_22i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_22i 22
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_22i 6
#define bAhbTrcRegInt_IntTriMask_IntTri_22i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_22i 0x00400000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_23i 0x0006
#define B16AhbTrcRegInt_IntTriMask_IntTri_23i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_23i 23
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_23i 7
#define bAhbTrcRegInt_IntTriMask_IntTri_23i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_23i 0x00800000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_24i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_24i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_24i 24
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_24i 8
#define bAhbTrcRegInt_IntTriMask_IntTri_24i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_24i 0x01000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_25i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_25i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_25i 25
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_25i 9
#define bAhbTrcRegInt_IntTriMask_IntTri_25i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_25i 0x02000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_26i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_26i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_26i 26
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_26i 10
#define bAhbTrcRegInt_IntTriMask_IntTri_26i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_26i 0x04000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_27i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_27i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_27i 27
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_27i 11
#define bAhbTrcRegInt_IntTriMask_IntTri_27i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_27i 0x08000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_28i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_28i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_28i 28
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_28i 12
#define bAhbTrcRegInt_IntTriMask_IntTri_28i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_28i 0x10000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_29i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_29i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_29i 29
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_29i 13
#define bAhbTrcRegInt_IntTriMask_IntTri_29i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_29i 0x20000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_30i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_30i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_30i 30
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_30i 14
#define bAhbTrcRegInt_IntTriMask_IntTri_30i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_30i 0x40000000
#define BA_AhbTrcRegInt_IntTriMask_IntTri_31i 0x0007
#define B16AhbTrcRegInt_IntTriMask_IntTri_31i 0x0006
#define LSb32AhbTrcRegInt_IntTriMask_IntTri_31i 31
#define LSb16AhbTrcRegInt_IntTriMask_IntTri_31i 15
#define bAhbTrcRegInt_IntTriMask_IntTri_31i 1
#define MSK32AhbTrcRegInt_IntTriMask_IntTri_31i 0x80000000
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegInt_IntLogStatus 0x0008
#define BA_AhbTrcRegInt_IntLogStatus_BufAlmostFull 0x0008
#define B16AhbTrcRegInt_IntLogStatus_BufAlmostFull 0x0008
#define LSb32AhbTrcRegInt_IntLogStatus_BufAlmostFull 0
#define LSb16AhbTrcRegInt_IntLogStatus_BufAlmostFull 0
#define bAhbTrcRegInt_IntLogStatus_BufAlmostFull 1
#define MSK32AhbTrcRegInt_IntLogStatus_BufAlmostFull 0x00000001
#define BA_AhbTrcRegInt_IntLogStatus_PacketDropped 0x0008
#define B16AhbTrcRegInt_IntLogStatus_PacketDropped 0x0008
#define LSb32AhbTrcRegInt_IntLogStatus_PacketDropped 1
#define LSb16AhbTrcRegInt_IntLogStatus_PacketDropped 1
#define bAhbTrcRegInt_IntLogStatus_PacketDropped 1
#define MSK32AhbTrcRegInt_IntLogStatus_PacketDropped 0x00000002
#define BA_AhbTrcRegInt_IntLogStatus_BufOverflow 0x0008
#define B16AhbTrcRegInt_IntLogStatus_BufOverflow 0x0008
#define LSb32AhbTrcRegInt_IntLogStatus_BufOverflow 2
#define LSb16AhbTrcRegInt_IntLogStatus_BufOverflow 2
#define bAhbTrcRegInt_IntLogStatus_BufOverflow 1
#define MSK32AhbTrcRegInt_IntLogStatus_BufOverflow 0x00000004
#define BA_AhbTrcRegInt_IntLogStatus_BufUnderflow 0x0008
#define B16AhbTrcRegInt_IntLogStatus_BufUnderflow 0x0008
#define LSb32AhbTrcRegInt_IntLogStatus_BufUnderflow 3
#define LSb16AhbTrcRegInt_IntLogStatus_BufUnderflow 3
#define bAhbTrcRegInt_IntLogStatus_BufUnderflow 1
#define MSK32AhbTrcRegInt_IntLogStatus_BufUnderflow 0x00000008
#define BA_AhbTrcRegInt_IntLogStatus_FastMonMiss 0x0008
#define B16AhbTrcRegInt_IntLogStatus_FastMonMiss 0x0008
#define LSb32AhbTrcRegInt_IntLogStatus_FastMonMiss 4
#define LSb16AhbTrcRegInt_IntLogStatus_FastMonMiss 4
#define bAhbTrcRegInt_IntLogStatus_FastMonMiss 1
#define MSK32AhbTrcRegInt_IntLogStatus_FastMonMiss 0x00000010
#define BA_AhbTrcRegInt_IntLogStatus_SlowMonMiss 0x0008
#define B16AhbTrcRegInt_IntLogStatus_SlowMonMiss 0x0008
#define LSb32AhbTrcRegInt_IntLogStatus_SlowMonMiss 5
#define LSb16AhbTrcRegInt_IntLogStatus_SlowMonMiss 5
#define bAhbTrcRegInt_IntLogStatus_SlowMonMiss 1
#define MSK32AhbTrcRegInt_IntLogStatus_SlowMonMiss 0x00000020
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegInt_IntLogMask 0x000C
#define BA_AhbTrcRegInt_IntLogMask_BufAlmostFull 0x000C
#define B16AhbTrcRegInt_IntLogMask_BufAlmostFull 0x000C
#define LSb32AhbTrcRegInt_IntLogMask_BufAlmostFull 0
#define LSb16AhbTrcRegInt_IntLogMask_BufAlmostFull 0
#define bAhbTrcRegInt_IntLogMask_BufAlmostFull 1
#define MSK32AhbTrcRegInt_IntLogMask_BufAlmostFull 0x00000001
#define BA_AhbTrcRegInt_IntLogMask_PacketDropped 0x000C
#define B16AhbTrcRegInt_IntLogMask_PacketDropped 0x000C
#define LSb32AhbTrcRegInt_IntLogMask_PacketDropped 1
#define LSb16AhbTrcRegInt_IntLogMask_PacketDropped 1
#define bAhbTrcRegInt_IntLogMask_PacketDropped 1
#define MSK32AhbTrcRegInt_IntLogMask_PacketDropped 0x00000002
#define BA_AhbTrcRegInt_IntLogMask_BufOverflow 0x000C
#define B16AhbTrcRegInt_IntLogMask_BufOverflow 0x000C
#define LSb32AhbTrcRegInt_IntLogMask_BufOverflow 2
#define LSb16AhbTrcRegInt_IntLogMask_BufOverflow 2
#define bAhbTrcRegInt_IntLogMask_BufOverflow 1
#define MSK32AhbTrcRegInt_IntLogMask_BufOverflow 0x00000004
#define BA_AhbTrcRegInt_IntLogMask_BufUnderflow 0x000C
#define B16AhbTrcRegInt_IntLogMask_BufUnderflow 0x000C
#define LSb32AhbTrcRegInt_IntLogMask_BufUnderflow 3
#define LSb16AhbTrcRegInt_IntLogMask_BufUnderflow 3
#define bAhbTrcRegInt_IntLogMask_BufUnderflow 1
#define MSK32AhbTrcRegInt_IntLogMask_BufUnderflow 0x00000008
#define BA_AhbTrcRegInt_IntLogMask_FastMonMiss 0x000C
#define B16AhbTrcRegInt_IntLogMask_FastMonMiss 0x000C
#define LSb32AhbTrcRegInt_IntLogMask_FastMonMiss 4
#define LSb16AhbTrcRegInt_IntLogMask_FastMonMiss 4
#define bAhbTrcRegInt_IntLogMask_FastMonMiss 1
#define MSK32AhbTrcRegInt_IntLogMask_FastMonMiss 0x00000010
#define BA_AhbTrcRegInt_IntLogMask_SlowMonMiss 0x000C
#define B16AhbTrcRegInt_IntLogMask_SlowMonMiss 0x000C
#define LSb32AhbTrcRegInt_IntLogMask_SlowMonMiss 5
#define LSb16AhbTrcRegInt_IntLogMask_SlowMonMiss 5
#define bAhbTrcRegInt_IntLogMask_SlowMonMiss 1
#define MSK32AhbTrcRegInt_IntLogMask_SlowMonMiss 0x00000020
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcRegInt {
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_0i(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_0i(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_0i(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_0i(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_1i(r32) _BFGET_(r32, 1, 1)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_1i(r32,v) _BFSET_(r32, 1, 1,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_1i(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_1i(r16,v) _BFSET_(r16, 1, 1,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_2i(r32) _BFGET_(r32, 2, 2)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_2i(r32,v) _BFSET_(r32, 2, 2,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_2i(r16) _BFGET_(r16, 2, 2)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_2i(r16,v) _BFSET_(r16, 2, 2,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_3i(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_3i(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_3i(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_3i(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_4i(r32) _BFGET_(r32, 4, 4)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_4i(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_4i(r16) _BFGET_(r16, 4, 4)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_4i(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_5i(r32) _BFGET_(r32, 5, 5)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_5i(r32,v) _BFSET_(r32, 5, 5,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_5i(r16) _BFGET_(r16, 5, 5)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_5i(r16,v) _BFSET_(r16, 5, 5,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_6i(r32) _BFGET_(r32, 6, 6)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_6i(r32,v) _BFSET_(r32, 6, 6,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_6i(r16) _BFGET_(r16, 6, 6)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_6i(r16,v) _BFSET_(r16, 6, 6,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_7i(r32) _BFGET_(r32, 7, 7)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_7i(r32,v) _BFSET_(r32, 7, 7,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_7i(r16) _BFGET_(r16, 7, 7)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_7i(r16,v) _BFSET_(r16, 7, 7,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_8i(r32) _BFGET_(r32, 8, 8)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_8i(r32,v) _BFSET_(r32, 8, 8,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_8i(r16) _BFGET_(r16, 8, 8)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_8i(r16,v) _BFSET_(r16, 8, 8,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_9i(r32) _BFGET_(r32, 9, 9)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_9i(r32,v) _BFSET_(r32, 9, 9,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_9i(r16) _BFGET_(r16, 9, 9)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_9i(r16,v) _BFSET_(r16, 9, 9,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_10i(r32) _BFGET_(r32,10,10)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_10i(r32,v) _BFSET_(r32,10,10,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_10i(r16) _BFGET_(r16,10,10)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_10i(r16,v) _BFSET_(r16,10,10,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_11i(r32) _BFGET_(r32,11,11)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_11i(r32,v) _BFSET_(r32,11,11,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_11i(r16) _BFGET_(r16,11,11)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_11i(r16,v) _BFSET_(r16,11,11,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_12i(r32) _BFGET_(r32,12,12)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_12i(r32,v) _BFSET_(r32,12,12,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_12i(r16) _BFGET_(r16,12,12)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_12i(r16,v) _BFSET_(r16,12,12,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_13i(r32) _BFGET_(r32,13,13)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_13i(r32,v) _BFSET_(r32,13,13,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_13i(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_13i(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_14i(r32) _BFGET_(r32,14,14)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_14i(r32,v) _BFSET_(r32,14,14,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_14i(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_14i(r16,v) _BFSET_(r16,14,14,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_15i(r32) _BFGET_(r32,15,15)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_15i(r32,v) _BFSET_(r32,15,15,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_15i(r16) _BFGET_(r16,15,15)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_15i(r16,v) _BFSET_(r16,15,15,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_16i(r32) _BFGET_(r32,16,16)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_16i(r32,v) _BFSET_(r32,16,16,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_16i(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_16i(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_17i(r32) _BFGET_(r32,17,17)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_17i(r32,v) _BFSET_(r32,17,17,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_17i(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_17i(r16,v) _BFSET_(r16, 1, 1,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_18i(r32) _BFGET_(r32,18,18)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_18i(r32,v) _BFSET_(r32,18,18,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_18i(r16) _BFGET_(r16, 2, 2)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_18i(r16,v) _BFSET_(r16, 2, 2,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_19i(r32) _BFGET_(r32,19,19)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_19i(r32,v) _BFSET_(r32,19,19,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_19i(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_19i(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_20i(r32) _BFGET_(r32,20,20)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_20i(r32,v) _BFSET_(r32,20,20,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_20i(r16) _BFGET_(r16, 4, 4)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_20i(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_21i(r32) _BFGET_(r32,21,21)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_21i(r32,v) _BFSET_(r32,21,21,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_21i(r16) _BFGET_(r16, 5, 5)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_21i(r16,v) _BFSET_(r16, 5, 5,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_22i(r32) _BFGET_(r32,22,22)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_22i(r32,v) _BFSET_(r32,22,22,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_22i(r16) _BFGET_(r16, 6, 6)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_22i(r16,v) _BFSET_(r16, 6, 6,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_23i(r32) _BFGET_(r32,23,23)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_23i(r32,v) _BFSET_(r32,23,23,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_23i(r16) _BFGET_(r16, 7, 7)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_23i(r16,v) _BFSET_(r16, 7, 7,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_24i(r32) _BFGET_(r32,24,24)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_24i(r32,v) _BFSET_(r32,24,24,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_24i(r16) _BFGET_(r16, 8, 8)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_24i(r16,v) _BFSET_(r16, 8, 8,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_25i(r32) _BFGET_(r32,25,25)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_25i(r32,v) _BFSET_(r32,25,25,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_25i(r16) _BFGET_(r16, 9, 9)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_25i(r16,v) _BFSET_(r16, 9, 9,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_26i(r32) _BFGET_(r32,26,26)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_26i(r32,v) _BFSET_(r32,26,26,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_26i(r16) _BFGET_(r16,10,10)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_26i(r16,v) _BFSET_(r16,10,10,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_27i(r32) _BFGET_(r32,27,27)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_27i(r32,v) _BFSET_(r32,27,27,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_27i(r16) _BFGET_(r16,11,11)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_27i(r16,v) _BFSET_(r16,11,11,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_28i(r32) _BFGET_(r32,28,28)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_28i(r32,v) _BFSET_(r32,28,28,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_28i(r16) _BFGET_(r16,12,12)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_28i(r16,v) _BFSET_(r16,12,12,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_29i(r32) _BFGET_(r32,29,29)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_29i(r32,v) _BFSET_(r32,29,29,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_29i(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_29i(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_30i(r32) _BFGET_(r32,30,30)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_30i(r32,v) _BFSET_(r32,30,30,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_30i(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_30i(r16,v) _BFSET_(r16,14,14,v)
#define GET32AhbTrcRegInt_IntTriStatus_IntTri_31i(r32) _BFGET_(r32,31,31)
#define SET32AhbTrcRegInt_IntTriStatus_IntTri_31i(r32,v) _BFSET_(r32,31,31,v)
#define GET16AhbTrcRegInt_IntTriStatus_IntTri_31i(r16) _BFGET_(r16,15,15)
#define SET16AhbTrcRegInt_IntTriStatus_IntTri_31i(r16,v) _BFSET_(r16,15,15,v)
#define w32AhbTrcRegInt_IntTriStatus {\
UNSG32 uIntTriStatus_IntTri_0i : 1;\
UNSG32 uIntTriStatus_IntTri_1i : 1;\
UNSG32 uIntTriStatus_IntTri_2i : 1;\
UNSG32 uIntTriStatus_IntTri_3i : 1;\
UNSG32 uIntTriStatus_IntTri_4i : 1;\
UNSG32 uIntTriStatus_IntTri_5i : 1;\
UNSG32 uIntTriStatus_IntTri_6i : 1;\
UNSG32 uIntTriStatus_IntTri_7i : 1;\
UNSG32 uIntTriStatus_IntTri_8i : 1;\
UNSG32 uIntTriStatus_IntTri_9i : 1;\
UNSG32 uIntTriStatus_IntTri_10i : 1;\
UNSG32 uIntTriStatus_IntTri_11i : 1;\
UNSG32 uIntTriStatus_IntTri_12i : 1;\
UNSG32 uIntTriStatus_IntTri_13i : 1;\
UNSG32 uIntTriStatus_IntTri_14i : 1;\
UNSG32 uIntTriStatus_IntTri_15i : 1;\
UNSG32 uIntTriStatus_IntTri_16i : 1;\
UNSG32 uIntTriStatus_IntTri_17i : 1;\
UNSG32 uIntTriStatus_IntTri_18i : 1;\
UNSG32 uIntTriStatus_IntTri_19i : 1;\
UNSG32 uIntTriStatus_IntTri_20i : 1;\
UNSG32 uIntTriStatus_IntTri_21i : 1;\
UNSG32 uIntTriStatus_IntTri_22i : 1;\
UNSG32 uIntTriStatus_IntTri_23i : 1;\
UNSG32 uIntTriStatus_IntTri_24i : 1;\
UNSG32 uIntTriStatus_IntTri_25i : 1;\
UNSG32 uIntTriStatus_IntTri_26i : 1;\
UNSG32 uIntTriStatus_IntTri_27i : 1;\
UNSG32 uIntTriStatus_IntTri_28i : 1;\
UNSG32 uIntTriStatus_IntTri_29i : 1;\
UNSG32 uIntTriStatus_IntTri_30i : 1;\
UNSG32 uIntTriStatus_IntTri_31i : 1;\
}
union { UNSG32 u32AhbTrcRegInt_IntTriStatus;
struct w32AhbTrcRegInt_IntTriStatus;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegInt_IntTriMask_IntTri_0i(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_0i(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_0i(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_0i(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_1i(r32) _BFGET_(r32, 1, 1)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_1i(r32,v) _BFSET_(r32, 1, 1,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_1i(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_1i(r16,v) _BFSET_(r16, 1, 1,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_2i(r32) _BFGET_(r32, 2, 2)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_2i(r32,v) _BFSET_(r32, 2, 2,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_2i(r16) _BFGET_(r16, 2, 2)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_2i(r16,v) _BFSET_(r16, 2, 2,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_3i(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_3i(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_3i(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_3i(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_4i(r32) _BFGET_(r32, 4, 4)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_4i(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_4i(r16) _BFGET_(r16, 4, 4)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_4i(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_5i(r32) _BFGET_(r32, 5, 5)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_5i(r32,v) _BFSET_(r32, 5, 5,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_5i(r16) _BFGET_(r16, 5, 5)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_5i(r16,v) _BFSET_(r16, 5, 5,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_6i(r32) _BFGET_(r32, 6, 6)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_6i(r32,v) _BFSET_(r32, 6, 6,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_6i(r16) _BFGET_(r16, 6, 6)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_6i(r16,v) _BFSET_(r16, 6, 6,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_7i(r32) _BFGET_(r32, 7, 7)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_7i(r32,v) _BFSET_(r32, 7, 7,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_7i(r16) _BFGET_(r16, 7, 7)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_7i(r16,v) _BFSET_(r16, 7, 7,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_8i(r32) _BFGET_(r32, 8, 8)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_8i(r32,v) _BFSET_(r32, 8, 8,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_8i(r16) _BFGET_(r16, 8, 8)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_8i(r16,v) _BFSET_(r16, 8, 8,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_9i(r32) _BFGET_(r32, 9, 9)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_9i(r32,v) _BFSET_(r32, 9, 9,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_9i(r16) _BFGET_(r16, 9, 9)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_9i(r16,v) _BFSET_(r16, 9, 9,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_10i(r32) _BFGET_(r32,10,10)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_10i(r32,v) _BFSET_(r32,10,10,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_10i(r16) _BFGET_(r16,10,10)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_10i(r16,v) _BFSET_(r16,10,10,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_11i(r32) _BFGET_(r32,11,11)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_11i(r32,v) _BFSET_(r32,11,11,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_11i(r16) _BFGET_(r16,11,11)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_11i(r16,v) _BFSET_(r16,11,11,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_12i(r32) _BFGET_(r32,12,12)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_12i(r32,v) _BFSET_(r32,12,12,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_12i(r16) _BFGET_(r16,12,12)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_12i(r16,v) _BFSET_(r16,12,12,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_13i(r32) _BFGET_(r32,13,13)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_13i(r32,v) _BFSET_(r32,13,13,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_13i(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_13i(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_14i(r32) _BFGET_(r32,14,14)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_14i(r32,v) _BFSET_(r32,14,14,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_14i(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_14i(r16,v) _BFSET_(r16,14,14,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_15i(r32) _BFGET_(r32,15,15)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_15i(r32,v) _BFSET_(r32,15,15,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_15i(r16) _BFGET_(r16,15,15)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_15i(r16,v) _BFSET_(r16,15,15,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_16i(r32) _BFGET_(r32,16,16)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_16i(r32,v) _BFSET_(r32,16,16,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_16i(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_16i(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_17i(r32) _BFGET_(r32,17,17)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_17i(r32,v) _BFSET_(r32,17,17,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_17i(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_17i(r16,v) _BFSET_(r16, 1, 1,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_18i(r32) _BFGET_(r32,18,18)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_18i(r32,v) _BFSET_(r32,18,18,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_18i(r16) _BFGET_(r16, 2, 2)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_18i(r16,v) _BFSET_(r16, 2, 2,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_19i(r32) _BFGET_(r32,19,19)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_19i(r32,v) _BFSET_(r32,19,19,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_19i(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_19i(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_20i(r32) _BFGET_(r32,20,20)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_20i(r32,v) _BFSET_(r32,20,20,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_20i(r16) _BFGET_(r16, 4, 4)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_20i(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_21i(r32) _BFGET_(r32,21,21)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_21i(r32,v) _BFSET_(r32,21,21,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_21i(r16) _BFGET_(r16, 5, 5)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_21i(r16,v) _BFSET_(r16, 5, 5,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_22i(r32) _BFGET_(r32,22,22)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_22i(r32,v) _BFSET_(r32,22,22,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_22i(r16) _BFGET_(r16, 6, 6)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_22i(r16,v) _BFSET_(r16, 6, 6,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_23i(r32) _BFGET_(r32,23,23)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_23i(r32,v) _BFSET_(r32,23,23,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_23i(r16) _BFGET_(r16, 7, 7)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_23i(r16,v) _BFSET_(r16, 7, 7,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_24i(r32) _BFGET_(r32,24,24)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_24i(r32,v) _BFSET_(r32,24,24,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_24i(r16) _BFGET_(r16, 8, 8)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_24i(r16,v) _BFSET_(r16, 8, 8,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_25i(r32) _BFGET_(r32,25,25)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_25i(r32,v) _BFSET_(r32,25,25,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_25i(r16) _BFGET_(r16, 9, 9)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_25i(r16,v) _BFSET_(r16, 9, 9,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_26i(r32) _BFGET_(r32,26,26)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_26i(r32,v) _BFSET_(r32,26,26,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_26i(r16) _BFGET_(r16,10,10)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_26i(r16,v) _BFSET_(r16,10,10,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_27i(r32) _BFGET_(r32,27,27)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_27i(r32,v) _BFSET_(r32,27,27,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_27i(r16) _BFGET_(r16,11,11)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_27i(r16,v) _BFSET_(r16,11,11,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_28i(r32) _BFGET_(r32,28,28)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_28i(r32,v) _BFSET_(r32,28,28,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_28i(r16) _BFGET_(r16,12,12)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_28i(r16,v) _BFSET_(r16,12,12,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_29i(r32) _BFGET_(r32,29,29)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_29i(r32,v) _BFSET_(r32,29,29,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_29i(r16) _BFGET_(r16,13,13)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_29i(r16,v) _BFSET_(r16,13,13,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_30i(r32) _BFGET_(r32,30,30)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_30i(r32,v) _BFSET_(r32,30,30,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_30i(r16) _BFGET_(r16,14,14)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_30i(r16,v) _BFSET_(r16,14,14,v)
#define GET32AhbTrcRegInt_IntTriMask_IntTri_31i(r32) _BFGET_(r32,31,31)
#define SET32AhbTrcRegInt_IntTriMask_IntTri_31i(r32,v) _BFSET_(r32,31,31,v)
#define GET16AhbTrcRegInt_IntTriMask_IntTri_31i(r16) _BFGET_(r16,15,15)
#define SET16AhbTrcRegInt_IntTriMask_IntTri_31i(r16,v) _BFSET_(r16,15,15,v)
#define w32AhbTrcRegInt_IntTriMask {\
UNSG32 uIntTriMask_IntTri_0i : 1;\
UNSG32 uIntTriMask_IntTri_1i : 1;\
UNSG32 uIntTriMask_IntTri_2i : 1;\
UNSG32 uIntTriMask_IntTri_3i : 1;\
UNSG32 uIntTriMask_IntTri_4i : 1;\
UNSG32 uIntTriMask_IntTri_5i : 1;\
UNSG32 uIntTriMask_IntTri_6i : 1;\
UNSG32 uIntTriMask_IntTri_7i : 1;\
UNSG32 uIntTriMask_IntTri_8i : 1;\
UNSG32 uIntTriMask_IntTri_9i : 1;\
UNSG32 uIntTriMask_IntTri_10i : 1;\
UNSG32 uIntTriMask_IntTri_11i : 1;\
UNSG32 uIntTriMask_IntTri_12i : 1;\
UNSG32 uIntTriMask_IntTri_13i : 1;\
UNSG32 uIntTriMask_IntTri_14i : 1;\
UNSG32 uIntTriMask_IntTri_15i : 1;\
UNSG32 uIntTriMask_IntTri_16i : 1;\
UNSG32 uIntTriMask_IntTri_17i : 1;\
UNSG32 uIntTriMask_IntTri_18i : 1;\
UNSG32 uIntTriMask_IntTri_19i : 1;\
UNSG32 uIntTriMask_IntTri_20i : 1;\
UNSG32 uIntTriMask_IntTri_21i : 1;\
UNSG32 uIntTriMask_IntTri_22i : 1;\
UNSG32 uIntTriMask_IntTri_23i : 1;\
UNSG32 uIntTriMask_IntTri_24i : 1;\
UNSG32 uIntTriMask_IntTri_25i : 1;\
UNSG32 uIntTriMask_IntTri_26i : 1;\
UNSG32 uIntTriMask_IntTri_27i : 1;\
UNSG32 uIntTriMask_IntTri_28i : 1;\
UNSG32 uIntTriMask_IntTri_29i : 1;\
UNSG32 uIntTriMask_IntTri_30i : 1;\
UNSG32 uIntTriMask_IntTri_31i : 1;\
}
union { UNSG32 u32AhbTrcRegInt_IntTriMask;
struct w32AhbTrcRegInt_IntTriMask;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegInt_IntLogStatus_BufAlmostFull(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegInt_IntLogStatus_BufAlmostFull(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegInt_IntLogStatus_BufAlmostFull(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegInt_IntLogStatus_BufAlmostFull(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegInt_IntLogStatus_PacketDropped(r32) _BFGET_(r32, 1, 1)
#define SET32AhbTrcRegInt_IntLogStatus_PacketDropped(r32,v) _BFSET_(r32, 1, 1,v)
#define GET16AhbTrcRegInt_IntLogStatus_PacketDropped(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegInt_IntLogStatus_PacketDropped(r16,v) _BFSET_(r16, 1, 1,v)
#define GET32AhbTrcRegInt_IntLogStatus_BufOverflow(r32) _BFGET_(r32, 2, 2)
#define SET32AhbTrcRegInt_IntLogStatus_BufOverflow(r32,v) _BFSET_(r32, 2, 2,v)
#define GET16AhbTrcRegInt_IntLogStatus_BufOverflow(r16) _BFGET_(r16, 2, 2)
#define SET16AhbTrcRegInt_IntLogStatus_BufOverflow(r16,v) _BFSET_(r16, 2, 2,v)
#define GET32AhbTrcRegInt_IntLogStatus_BufUnderflow(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcRegInt_IntLogStatus_BufUnderflow(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcRegInt_IntLogStatus_BufUnderflow(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegInt_IntLogStatus_BufUnderflow(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegInt_IntLogStatus_FastMonMiss(r32) _BFGET_(r32, 4, 4)
#define SET32AhbTrcRegInt_IntLogStatus_FastMonMiss(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16AhbTrcRegInt_IntLogStatus_FastMonMiss(r16) _BFGET_(r16, 4, 4)
#define SET16AhbTrcRegInt_IntLogStatus_FastMonMiss(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32AhbTrcRegInt_IntLogStatus_SlowMonMiss(r32) _BFGET_(r32, 5, 5)
#define SET32AhbTrcRegInt_IntLogStatus_SlowMonMiss(r32,v) _BFSET_(r32, 5, 5,v)
#define GET16AhbTrcRegInt_IntLogStatus_SlowMonMiss(r16) _BFGET_(r16, 5, 5)
#define SET16AhbTrcRegInt_IntLogStatus_SlowMonMiss(r16,v) _BFSET_(r16, 5, 5,v)
#define w32AhbTrcRegInt_IntLogStatus {\
UNSG32 uIntLogStatus_BufAlmostFull : 1;\
UNSG32 uIntLogStatus_PacketDropped : 1;\
UNSG32 uIntLogStatus_BufOverflow : 1;\
UNSG32 uIntLogStatus_BufUnderflow : 1;\
UNSG32 uIntLogStatus_FastMonMiss : 1;\
UNSG32 uIntLogStatus_SlowMonMiss : 1;\
UNSG32 RSVDx8_b6 : 26;\
}
union { UNSG32 u32AhbTrcRegInt_IntLogStatus;
struct w32AhbTrcRegInt_IntLogStatus;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegInt_IntLogMask_BufAlmostFull(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegInt_IntLogMask_BufAlmostFull(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegInt_IntLogMask_BufAlmostFull(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegInt_IntLogMask_BufAlmostFull(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32AhbTrcRegInt_IntLogMask_PacketDropped(r32) _BFGET_(r32, 1, 1)
#define SET32AhbTrcRegInt_IntLogMask_PacketDropped(r32,v) _BFSET_(r32, 1, 1,v)
#define GET16AhbTrcRegInt_IntLogMask_PacketDropped(r16) _BFGET_(r16, 1, 1)
#define SET16AhbTrcRegInt_IntLogMask_PacketDropped(r16,v) _BFSET_(r16, 1, 1,v)
#define GET32AhbTrcRegInt_IntLogMask_BufOverflow(r32) _BFGET_(r32, 2, 2)
#define SET32AhbTrcRegInt_IntLogMask_BufOverflow(r32,v) _BFSET_(r32, 2, 2,v)
#define GET16AhbTrcRegInt_IntLogMask_BufOverflow(r16) _BFGET_(r16, 2, 2)
#define SET16AhbTrcRegInt_IntLogMask_BufOverflow(r16,v) _BFSET_(r16, 2, 2,v)
#define GET32AhbTrcRegInt_IntLogMask_BufUnderflow(r32) _BFGET_(r32, 3, 3)
#define SET32AhbTrcRegInt_IntLogMask_BufUnderflow(r32,v) _BFSET_(r32, 3, 3,v)
#define GET16AhbTrcRegInt_IntLogMask_BufUnderflow(r16) _BFGET_(r16, 3, 3)
#define SET16AhbTrcRegInt_IntLogMask_BufUnderflow(r16,v) _BFSET_(r16, 3, 3,v)
#define GET32AhbTrcRegInt_IntLogMask_FastMonMiss(r32) _BFGET_(r32, 4, 4)
#define SET32AhbTrcRegInt_IntLogMask_FastMonMiss(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16AhbTrcRegInt_IntLogMask_FastMonMiss(r16) _BFGET_(r16, 4, 4)
#define SET16AhbTrcRegInt_IntLogMask_FastMonMiss(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32AhbTrcRegInt_IntLogMask_SlowMonMiss(r32) _BFGET_(r32, 5, 5)
#define SET32AhbTrcRegInt_IntLogMask_SlowMonMiss(r32,v) _BFSET_(r32, 5, 5,v)
#define GET16AhbTrcRegInt_IntLogMask_SlowMonMiss(r16) _BFGET_(r16, 5, 5)
#define SET16AhbTrcRegInt_IntLogMask_SlowMonMiss(r16,v) _BFSET_(r16, 5, 5,v)
#define w32AhbTrcRegInt_IntLogMask {\
UNSG32 uIntLogMask_BufAlmostFull : 1;\
UNSG32 uIntLogMask_PacketDropped : 1;\
UNSG32 uIntLogMask_BufOverflow : 1;\
UNSG32 uIntLogMask_BufUnderflow : 1;\
UNSG32 uIntLogMask_FastMonMiss : 1;\
UNSG32 uIntLogMask_SlowMonMiss : 1;\
UNSG32 RSVDxC_b6 : 26;\
}
union { UNSG32 u32AhbTrcRegInt_IntLogMask;
struct w32AhbTrcRegInt_IntLogMask;
};
///////////////////////////////////////////////////////////
} SIE_AhbTrcRegInt;
typedef union T32AhbTrcRegInt_IntTriStatus
{ UNSG32 u32;
struct w32AhbTrcRegInt_IntTriStatus;
} T32AhbTrcRegInt_IntTriStatus;
typedef union T32AhbTrcRegInt_IntTriMask
{ UNSG32 u32;
struct w32AhbTrcRegInt_IntTriMask;
} T32AhbTrcRegInt_IntTriMask;
typedef union T32AhbTrcRegInt_IntLogStatus
{ UNSG32 u32;
struct w32AhbTrcRegInt_IntLogStatus;
} T32AhbTrcRegInt_IntLogStatus;
typedef union T32AhbTrcRegInt_IntLogMask
{ UNSG32 u32;
struct w32AhbTrcRegInt_IntLogMask;
} T32AhbTrcRegInt_IntLogMask;
///////////////////////////////////////////////////////////
typedef union TAhbTrcRegInt_IntTriStatus
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegInt_IntTriStatus;
};
} TAhbTrcRegInt_IntTriStatus;
typedef union TAhbTrcRegInt_IntTriMask
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegInt_IntTriMask;
};
} TAhbTrcRegInt_IntTriMask;
typedef union TAhbTrcRegInt_IntLogStatus
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegInt_IntLogStatus;
};
} TAhbTrcRegInt_IntLogStatus;
typedef union TAhbTrcRegInt_IntLogMask
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegInt_IntLogMask;
};
} TAhbTrcRegInt_IntLogMask;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcRegInt_drvrd(SIE_AhbTrcRegInt *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcRegInt_drvwr(SIE_AhbTrcRegInt *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcRegInt_reset(SIE_AhbTrcRegInt *p);
SIGN32 AhbTrcRegInt_cmp (SIE_AhbTrcRegInt *p, SIE_AhbTrcRegInt *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcRegInt_check(p,pie,pfx,hLOG) AhbTrcRegInt_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcRegInt_print(p, pfx,hLOG) AhbTrcRegInt_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcRegInt
////////////////////////////////////////////////////////////
//////
///
/// $INTERFACE AhbTrcRegAxi (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 AxiParam (P)
/// %unsigned 4 ALEN 0x3
/// ###
/// * Maxim burst length of the AXI requests issued. Hardware also guarantees that AXI burst will not cross the boundary of maxim burst length.
/// * 0: one beat
/// * 1: two beats
/// * 3: four beats
/// * 7: eight beats
/// * 15: sixteen beats
/// * All other values are reserved;
/// ###
/// %unsigned 4 ACACHE 0x0
/// ###
/// * The value will be passed to AxCACHE[3:0] on AXI interface
/// ###
/// %unsigned 1 Reserved0 0x0
/// %unsigned 3 APROT 0x0
/// ###
/// * The value will be passed to AxPROT[2:0] on AXI interface
/// ###
/// %unsigned 4 AQOS 0x0
/// ###
/// * The value will be passed to AxQOS[3:0] on AXI interface
/// ###
/// %% 16 # Stuffing bits...
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 4B, bits: 16b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcRegAxi
#define h_AhbTrcRegAxi (){}
#define RA_AhbTrcRegAxi_AxiParam 0x0000
#define BA_AhbTrcRegAxi_AxiParam_ALEN 0x0000
#define B16AhbTrcRegAxi_AxiParam_ALEN 0x0000
#define LSb32AhbTrcRegAxi_AxiParam_ALEN 0
#define LSb16AhbTrcRegAxi_AxiParam_ALEN 0
#define bAhbTrcRegAxi_AxiParam_ALEN 4
#define MSK32AhbTrcRegAxi_AxiParam_ALEN 0x0000000F
#define BA_AhbTrcRegAxi_AxiParam_ACACHE 0x0000
#define B16AhbTrcRegAxi_AxiParam_ACACHE 0x0000
#define LSb32AhbTrcRegAxi_AxiParam_ACACHE 4
#define LSb16AhbTrcRegAxi_AxiParam_ACACHE 4
#define bAhbTrcRegAxi_AxiParam_ACACHE 4
#define MSK32AhbTrcRegAxi_AxiParam_ACACHE 0x000000F0
#define BA_AhbTrcRegAxi_AxiParam_Reserved0 0x0001
#define B16AhbTrcRegAxi_AxiParam_Reserved0 0x0000
#define LSb32AhbTrcRegAxi_AxiParam_Reserved0 8
#define LSb16AhbTrcRegAxi_AxiParam_Reserved0 8
#define bAhbTrcRegAxi_AxiParam_Reserved0 1
#define MSK32AhbTrcRegAxi_AxiParam_Reserved0 0x00000100
#define BA_AhbTrcRegAxi_AxiParam_APROT 0x0001
#define B16AhbTrcRegAxi_AxiParam_APROT 0x0000
#define LSb32AhbTrcRegAxi_AxiParam_APROT 9
#define LSb16AhbTrcRegAxi_AxiParam_APROT 9
#define bAhbTrcRegAxi_AxiParam_APROT 3
#define MSK32AhbTrcRegAxi_AxiParam_APROT 0x00000E00
#define BA_AhbTrcRegAxi_AxiParam_AQOS 0x0001
#define B16AhbTrcRegAxi_AxiParam_AQOS 0x0000
#define LSb32AhbTrcRegAxi_AxiParam_AQOS 12
#define LSb16AhbTrcRegAxi_AxiParam_AQOS 12
#define bAhbTrcRegAxi_AxiParam_AQOS 4
#define MSK32AhbTrcRegAxi_AxiParam_AQOS 0x0000F000
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcRegAxi {
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegAxi_AxiParam_ALEN(r32) _BFGET_(r32, 3, 0)
#define SET32AhbTrcRegAxi_AxiParam_ALEN(r32,v) _BFSET_(r32, 3, 0,v)
#define GET16AhbTrcRegAxi_AxiParam_ALEN(r16) _BFGET_(r16, 3, 0)
#define SET16AhbTrcRegAxi_AxiParam_ALEN(r16,v) _BFSET_(r16, 3, 0,v)
#define GET32AhbTrcRegAxi_AxiParam_ACACHE(r32) _BFGET_(r32, 7, 4)
#define SET32AhbTrcRegAxi_AxiParam_ACACHE(r32,v) _BFSET_(r32, 7, 4,v)
#define GET16AhbTrcRegAxi_AxiParam_ACACHE(r16) _BFGET_(r16, 7, 4)
#define SET16AhbTrcRegAxi_AxiParam_ACACHE(r16,v) _BFSET_(r16, 7, 4,v)
#define GET32AhbTrcRegAxi_AxiParam_Reserved0(r32) _BFGET_(r32, 8, 8)
#define SET32AhbTrcRegAxi_AxiParam_Reserved0(r32,v) _BFSET_(r32, 8, 8,v)
#define GET16AhbTrcRegAxi_AxiParam_Reserved0(r16) _BFGET_(r16, 8, 8)
#define SET16AhbTrcRegAxi_AxiParam_Reserved0(r16,v) _BFSET_(r16, 8, 8,v)
#define GET32AhbTrcRegAxi_AxiParam_APROT(r32) _BFGET_(r32,11, 9)
#define SET32AhbTrcRegAxi_AxiParam_APROT(r32,v) _BFSET_(r32,11, 9,v)
#define GET16AhbTrcRegAxi_AxiParam_APROT(r16) _BFGET_(r16,11, 9)
#define SET16AhbTrcRegAxi_AxiParam_APROT(r16,v) _BFSET_(r16,11, 9,v)
#define GET32AhbTrcRegAxi_AxiParam_AQOS(r32) _BFGET_(r32,15,12)
#define SET32AhbTrcRegAxi_AxiParam_AQOS(r32,v) _BFSET_(r32,15,12,v)
#define GET16AhbTrcRegAxi_AxiParam_AQOS(r16) _BFGET_(r16,15,12)
#define SET16AhbTrcRegAxi_AxiParam_AQOS(r16,v) _BFSET_(r16,15,12,v)
#define w32AhbTrcRegAxi_AxiParam {\
UNSG32 uAxiParam_ALEN : 4;\
UNSG32 uAxiParam_ACACHE : 4;\
UNSG32 uAxiParam_Reserved0 : 1;\
UNSG32 uAxiParam_APROT : 3;\
UNSG32 uAxiParam_AQOS : 4;\
UNSG32 RSVDx0_b16 : 16;\
}
union { UNSG32 u32AhbTrcRegAxi_AxiParam;
struct w32AhbTrcRegAxi_AxiParam;
};
///////////////////////////////////////////////////////////
} SIE_AhbTrcRegAxi;
typedef union T32AhbTrcRegAxi_AxiParam
{ UNSG32 u32;
struct w32AhbTrcRegAxi_AxiParam;
} T32AhbTrcRegAxi_AxiParam;
///////////////////////////////////////////////////////////
typedef union TAhbTrcRegAxi_AxiParam
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegAxi_AxiParam;
};
} TAhbTrcRegAxi_AxiParam;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcRegAxi_drvrd(SIE_AhbTrcRegAxi *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcRegAxi_drvwr(SIE_AhbTrcRegAxi *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcRegAxi_reset(SIE_AhbTrcRegAxi *p);
SIGN32 AhbTrcRegAxi_cmp (SIE_AhbTrcRegAxi *p, SIE_AhbTrcRegAxi *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcRegAxi_check(p,pie,pfx,hLOG) AhbTrcRegAxi_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcRegAxi_print(p, pfx,hLOG) AhbTrcRegAxi_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcRegAxi
////////////////////////////////////////////////////////////
//////
///
/// $INTERFACE AhbTrcRegGen (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 TimeStamp (RW)
/// %unsigned 32 lower 0x0
/// # 0x00004 TimeStamp1
/// %unsigned 32 upper 0x0
/// ###
/// * 64-bit time stamp counter based on sysClk;
/// * When a matching AHB transaction is observed, hardware will capture the value of time stamp counter and save it into the log packet.
/// * When the Enable register is set to zero, the time stamp counter will stop counting.
/// ###
/// @ 0x00008 Enable (P)
/// %unsigned 1 Enable 0x0
/// ###
/// * 1: enable the tracing
/// * 0: stop the tracing
/// ###
/// %% 31 # Stuffing bits...
/// @ 0x0000C Status (R-)
/// %unsigned 1 Stopped 0x1
/// ###
/// * 1: Tracing is stopped.
/// * 0: Tracing is running
/// * When tracing is disabled, software can still program registers and the programmed value will be kept, other logics will be clock-gated to save power.
/// ###
/// %% 31 # Stuffing bits...
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 16B, bits: 66b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcRegGen
#define h_AhbTrcRegGen (){}
#define RA_AhbTrcRegGen_TimeStamp 0x0000
#define BA_AhbTrcRegGen_TimeStamp_lower 0x0000
#define B16AhbTrcRegGen_TimeStamp_lower 0x0000
#define LSb32AhbTrcRegGen_TimeStamp_lower 0
#define LSb16AhbTrcRegGen_TimeStamp_lower 0
#define bAhbTrcRegGen_TimeStamp_lower 32
#define MSK32AhbTrcRegGen_TimeStamp_lower 0xFFFFFFFF
#define RA_AhbTrcRegGen_TimeStamp1 0x0004
#define BA_AhbTrcRegGen_TimeStamp_upper 0x0004
#define B16AhbTrcRegGen_TimeStamp_upper 0x0004
#define LSb32AhbTrcRegGen_TimeStamp_upper 0
#define LSb16AhbTrcRegGen_TimeStamp_upper 0
#define bAhbTrcRegGen_TimeStamp_upper 32
#define MSK32AhbTrcRegGen_TimeStamp_upper 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegGen_Enable 0x0008
#define BA_AhbTrcRegGen_Enable_Enable 0x0008
#define B16AhbTrcRegGen_Enable_Enable 0x0008
#define LSb32AhbTrcRegGen_Enable_Enable 0
#define LSb16AhbTrcRegGen_Enable_Enable 0
#define bAhbTrcRegGen_Enable_Enable 1
#define MSK32AhbTrcRegGen_Enable_Enable 0x00000001
///////////////////////////////////////////////////////////
#define RA_AhbTrcRegGen_Status 0x000C
#define BA_AhbTrcRegGen_Status_Stopped 0x000C
#define B16AhbTrcRegGen_Status_Stopped 0x000C
#define LSb32AhbTrcRegGen_Status_Stopped 0
#define LSb16AhbTrcRegGen_Status_Stopped 0
#define bAhbTrcRegGen_Status_Stopped 1
#define MSK32AhbTrcRegGen_Status_Stopped 0x00000001
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcRegGen {
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegGen_TimeStamp_lower(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegGen_TimeStamp_lower(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegGen_TimeStamp {\
UNSG32 uTimeStamp_lower : 32;\
}
union { UNSG32 u32AhbTrcRegGen_TimeStamp;
struct w32AhbTrcRegGen_TimeStamp;
};
#define GET32AhbTrcRegGen_TimeStamp_upper(r32) _BFGET_(r32,31, 0)
#define SET32AhbTrcRegGen_TimeStamp_upper(r32,v) _BFSET_(r32,31, 0,v)
#define w32AhbTrcRegGen_TimeStamp1 {\
UNSG32 uTimeStamp_upper : 32;\
}
union { UNSG32 u32AhbTrcRegGen_TimeStamp1;
struct w32AhbTrcRegGen_TimeStamp1;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegGen_Enable_Enable(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegGen_Enable_Enable(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegGen_Enable_Enable(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegGen_Enable_Enable(r16,v) _BFSET_(r16, 0, 0,v)
#define w32AhbTrcRegGen_Enable {\
UNSG32 uEnable_Enable : 1;\
UNSG32 RSVDx8_b1 : 31;\
}
union { UNSG32 u32AhbTrcRegGen_Enable;
struct w32AhbTrcRegGen_Enable;
};
///////////////////////////////////////////////////////////
#define GET32AhbTrcRegGen_Status_Stopped(r32) _BFGET_(r32, 0, 0)
#define SET32AhbTrcRegGen_Status_Stopped(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16AhbTrcRegGen_Status_Stopped(r16) _BFGET_(r16, 0, 0)
#define SET16AhbTrcRegGen_Status_Stopped(r16,v) _BFSET_(r16, 0, 0,v)
#define w32AhbTrcRegGen_Status {\
UNSG32 uStatus_Stopped : 1;\
UNSG32 RSVDxC_b1 : 31;\
}
union { UNSG32 u32AhbTrcRegGen_Status;
struct w32AhbTrcRegGen_Status;
};
///////////////////////////////////////////////////////////
} SIE_AhbTrcRegGen;
typedef union T32AhbTrcRegGen_TimeStamp
{ UNSG32 u32;
struct w32AhbTrcRegGen_TimeStamp;
} T32AhbTrcRegGen_TimeStamp;
typedef union T32AhbTrcRegGen_TimeStamp1
{ UNSG32 u32;
struct w32AhbTrcRegGen_TimeStamp1;
} T32AhbTrcRegGen_TimeStamp1;
typedef union T32AhbTrcRegGen_Enable
{ UNSG32 u32;
struct w32AhbTrcRegGen_Enable;
} T32AhbTrcRegGen_Enable;
typedef union T32AhbTrcRegGen_Status
{ UNSG32 u32;
struct w32AhbTrcRegGen_Status;
} T32AhbTrcRegGen_Status;
///////////////////////////////////////////////////////////
typedef union TAhbTrcRegGen_TimeStamp
{ UNSG32 u32[2];
struct {
struct w32AhbTrcRegGen_TimeStamp;
struct w32AhbTrcRegGen_TimeStamp1;
};
} TAhbTrcRegGen_TimeStamp;
typedef union TAhbTrcRegGen_Enable
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegGen_Enable;
};
} TAhbTrcRegGen_Enable;
typedef union TAhbTrcRegGen_Status
{ UNSG32 u32[1];
struct {
struct w32AhbTrcRegGen_Status;
};
} TAhbTrcRegGen_Status;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcRegGen_drvrd(SIE_AhbTrcRegGen *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcRegGen_drvwr(SIE_AhbTrcRegGen *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcRegGen_reset(SIE_AhbTrcRegGen *p);
SIGN32 AhbTrcRegGen_cmp (SIE_AhbTrcRegGen *p, SIE_AhbTrcRegGen *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcRegGen_check(p,pie,pfx,hLOG) AhbTrcRegGen_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcRegGen_print(p, pfx,hLOG) AhbTrcRegGen_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcRegGen
////////////////////////////////////////////////////////////
//////
///
/// $INTERFACE AhbTrcReg biu (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 (P)
/// # 0x00000 AhbTrcRegTri
/// $AhbTrcRegTri AhbTrcRegTri REG [32]
/// ###
/// * Trigger condition registers;
/// * Software can define 32 independent trigger conditions. Each trigger condition is associated with one set of trigger condition registers.
/// ###
/// @ 0x00300 (P)
/// # 0x00300 AhbTrcRegLog
/// $AhbTrcRegLog AhbTrcRegLog REG
/// ###
/// * Log buffer control registers;
/// ###
/// @ 0x00318 (P)
/// # 0x00318 AhbTrcRegInt
/// $AhbTrcRegInt AhbTrcRegInt REG
/// ###
/// * Interrupt control registers;
/// ###
/// @ 0x00328 (P)
/// # 0x00328 AhbTrcRegAxi
/// $AhbTrcRegAxi AhbTrcRegAxi REG
/// ###
/// * AXI master control registers;
/// ###
/// @ 0x0032C (P)
/// # 0x0032C AhbTrcRegGen
/// $AhbTrcRegGen AhbTrcRegGen REG
/// ###
/// * General control registers;
/// ###
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 828B, bits: 3903b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_AhbTrcReg
#define h_AhbTrcReg (){}
#define RA_AhbTrcReg_AhbTrcRegTri 0x0000
///////////////////////////////////////////////////////////
#define RA_AhbTrcReg_AhbTrcRegLog 0x0300
///////////////////////////////////////////////////////////
#define RA_AhbTrcReg_AhbTrcRegInt 0x0318
///////////////////////////////////////////////////////////
#define RA_AhbTrcReg_AhbTrcRegAxi 0x0328
///////////////////////////////////////////////////////////
#define RA_AhbTrcReg_AhbTrcRegGen 0x032C
///////////////////////////////////////////////////////////
typedef struct SIE_AhbTrcReg {
///////////////////////////////////////////////////////////
SIE_AhbTrcRegTri ie_AhbTrcRegTri[32];
///////////////////////////////////////////////////////////
SIE_AhbTrcRegLog ie_AhbTrcRegLog;
///////////////////////////////////////////////////////////
SIE_AhbTrcRegInt ie_AhbTrcRegInt;
///////////////////////////////////////////////////////////
SIE_AhbTrcRegAxi ie_AhbTrcRegAxi;
///////////////////////////////////////////////////////////
SIE_AhbTrcRegGen ie_AhbTrcRegGen;
///////////////////////////////////////////////////////////
} SIE_AhbTrcReg;
///////////////////////////////////////////////////////////
SIGN32 AhbTrcReg_drvrd(SIE_AhbTrcReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 AhbTrcReg_drvwr(SIE_AhbTrcReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void AhbTrcReg_reset(SIE_AhbTrcReg *p);
SIGN32 AhbTrcReg_cmp (SIE_AhbTrcReg *p, SIE_AhbTrcReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define AhbTrcReg_check(p,pie,pfx,hLOG) AhbTrcReg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define AhbTrcReg_print(p, pfx,hLOG) AhbTrcReg_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: AhbTrcReg
////////////////////////////////////////////////////////////
#ifdef __cplusplus
}
#endif
#pragma pack()
#endif
//////
/// ENDOFFILE: AhbTrace.h
////////////////////////////////////////////////////////////