| /******************************************************************************** |
| * Marvell GPL License Option |
| * |
| * If you received this File from Marvell, you may opt to use, redistribute and/or |
| * modify this File in accordance with the terms and conditions of the General |
| * Public License Version 2, June 1991 (the "GPL License"), a copy of which is |
| * available along with the File in the license.txt file or by writing to the Free |
| * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or |
| * on the worldwide web at http://www.gnu.org/licenses/gpl.txt. |
| * |
| * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY |
| * DISCLAIMED. The GPL License provides additional details about this warranty |
| * disclaimer. |
| ******************************************************************************/ |
| |
| ////// |
| /// don't edit! auto-generated by docc: cec.h |
| //////////////////////////////////////////////////////////// |
| #ifndef cec_h |
| #define cec_h (){} |
| |
| |
| #include "ctypes.h" |
| |
| #pragma pack(1) |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| #ifndef _DOCC_H_BITOPS_ |
| #define _DOCC_H_BITOPS_ (){} |
| |
| #define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0) |
| #define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb)) |
| #define _bCLRMASK_(b) (~_bSETMASK_(b)) |
| #define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb)) |
| #define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb))) |
| #define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0) |
| |
| #endif |
| |
| |
| |
| ////// |
| /// |
| /// $INTERFACE oneReg (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (R-) |
| /// %unsigned 32 0x00000000 |
| /// ### |
| /// * One Register in K2 block. |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 4B, bits: 32b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_oneReg |
| #define h_oneReg (){} |
| |
| #define BA_oneReg_0x00000000 0x0000 |
| #define B16oneReg_0x00000000 0x0000 |
| #define LSb32oneReg_0x00000000 0 |
| #define LSb16oneReg_0x00000000 0 |
| #define boneReg_0x00000000 32 |
| #define MSK32oneReg_0x00000000 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_oneReg { |
| /////////////////////////////////////////////////////////// |
| #define GET32oneReg_0x00000000(r32) _BFGET_(r32,31, 0) |
| #define SET32oneReg_0x00000000(r32,v) _BFSET_(r32,31, 0,v) |
| |
| UNSG32 u_0x00000000 : 32; |
| /////////////////////////////////////////////////////////// |
| } SIE_oneReg; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 oneReg_drvrd(SIE_oneReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 oneReg_drvwr(SIE_oneReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void oneReg_reset(SIE_oneReg *p); |
| SIGN32 oneReg_cmp (SIE_oneReg *p, SIE_oneReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define oneReg_check(p,pie,pfx,hLOG) oneReg_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define oneReg_print(p, pfx,hLOG) oneReg_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: oneReg |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE Cec_REG (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (P) |
| /// # 0x00000 dummy |
| /// $oneReg dummy REG [256] |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 1024B, bits: 8192b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_Cec_REG |
| #define h_Cec_REG (){} |
| |
| #define RA_Cec_REG_dummy 0x0000 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_Cec_REG { |
| /////////////////////////////////////////////////////////// |
| SIE_oneReg ie_dummy[256]; |
| /////////////////////////////////////////////////////////// |
| } SIE_Cec_REG; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 Cec_REG_drvrd(SIE_Cec_REG *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 Cec_REG_drvwr(SIE_Cec_REG *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void Cec_REG_reset(SIE_Cec_REG *p); |
| SIGN32 Cec_REG_cmp (SIE_Cec_REG *p, SIE_Cec_REG *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define Cec_REG_check(p,pie,pfx,hLOG) Cec_REG_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define Cec_REG_print(p, pfx,hLOG) Cec_REG_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: Cec_REG |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE Cec biu (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 (R-) |
| /// # 0x00000 cfgReg |
| /// $Cec_REG cfgReg MEM |
| /// ### |
| /// * SRAM interface to access CEC MBUS registers. |
| /// ### |
| /// @ 0x00400 regIfCtrl (P) |
| /// %unsigned 8 mwrWidth 0x1 |
| /// ### |
| /// * Specifies the width of the MWR pulse (in terms of sysClks) to CEC block. |
| /// ### |
| /// %unsigned 8 hold 0x1 |
| /// ### |
| /// * Specifies the time (in terms of vppSysClks) between K2 read data mux output to sample point in VPP BIU. |
| /// ### |
| /// %% 16 # Stuffing bits... |
| /// @ 0x00404 CHIP_RESET_TRACKER (RW) |
| /// ### |
| /// * SW can perform read/write on this register to keep track of the chip reset. |
| /// * Note: A Shadow register is implemented for this register which stores the value that is written to this register. The Shadow Register gets reset only by the RSTIn Chip Pin. |
| /// ### |
| /// %unsigned 32 VALUE 0x0 |
| /// @ 0x00408 (W-) |
| /// # # Stuffing bytes... |
| /// %% 8128 |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 2048B, bits: 80b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_Cec |
| #define h_Cec (){} |
| |
| #define RA_Cec_cfgReg 0x0000 |
| /////////////////////////////////////////////////////////// |
| #define RA_Cec_regIfCtrl 0x0400 |
| |
| #define BA_Cec_regIfCtrl_mwrWidth 0x0400 |
| #define B16Cec_regIfCtrl_mwrWidth 0x0400 |
| #define LSb32Cec_regIfCtrl_mwrWidth 0 |
| #define LSb16Cec_regIfCtrl_mwrWidth 0 |
| #define bCec_regIfCtrl_mwrWidth 8 |
| #define MSK32Cec_regIfCtrl_mwrWidth 0x000000FF |
| |
| #define BA_Cec_regIfCtrl_hold 0x0401 |
| #define B16Cec_regIfCtrl_hold 0x0400 |
| #define LSb32Cec_regIfCtrl_hold 8 |
| #define LSb16Cec_regIfCtrl_hold 8 |
| #define bCec_regIfCtrl_hold 8 |
| #define MSK32Cec_regIfCtrl_hold 0x0000FF00 |
| /////////////////////////////////////////////////////////// |
| #define RA_Cec_CHIP_RESET_TRACKER 0x0404 |
| |
| #define BA_Cec_CHIP_RESET_TRACKER_VALUE 0x0404 |
| #define B16Cec_CHIP_RESET_TRACKER_VALUE 0x0404 |
| #define LSb32Cec_CHIP_RESET_TRACKER_VALUE 0 |
| #define LSb16Cec_CHIP_RESET_TRACKER_VALUE 0 |
| #define bCec_CHIP_RESET_TRACKER_VALUE 32 |
| #define MSK32Cec_CHIP_RESET_TRACKER_VALUE 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_Cec { |
| /////////////////////////////////////////////////////////// |
| SIE_Cec_REG ie_cfgReg; |
| /////////////////////////////////////////////////////////// |
| #define GET32Cec_regIfCtrl_mwrWidth(r32) _BFGET_(r32, 7, 0) |
| #define SET32Cec_regIfCtrl_mwrWidth(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16Cec_regIfCtrl_mwrWidth(r16) _BFGET_(r16, 7, 0) |
| #define SET16Cec_regIfCtrl_mwrWidth(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define GET32Cec_regIfCtrl_hold(r32) _BFGET_(r32,15, 8) |
| #define SET32Cec_regIfCtrl_hold(r32,v) _BFSET_(r32,15, 8,v) |
| #define GET16Cec_regIfCtrl_hold(r16) _BFGET_(r16,15, 8) |
| #define SET16Cec_regIfCtrl_hold(r16,v) _BFSET_(r16,15, 8,v) |
| |
| #define w32Cec_regIfCtrl {\ |
| UNSG32 uregIfCtrl_mwrWidth : 8;\ |
| UNSG32 uregIfCtrl_hold : 8;\ |
| UNSG32 RSVDx400_b16 : 16;\ |
| } |
| union { UNSG32 u32Cec_regIfCtrl; |
| struct w32Cec_regIfCtrl; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32Cec_CHIP_RESET_TRACKER_VALUE(r32) _BFGET_(r32,31, 0) |
| #define SET32Cec_CHIP_RESET_TRACKER_VALUE(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32Cec_CHIP_RESET_TRACKER {\ |
| UNSG32 uCHIP_RESET_TRACKER_VALUE : 32;\ |
| } |
| union { UNSG32 u32Cec_CHIP_RESET_TRACKER; |
| struct w32Cec_CHIP_RESET_TRACKER; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDx408 [1016]; |
| /////////////////////////////////////////////////////////// |
| } SIE_Cec; |
| |
| typedef union T32Cec_regIfCtrl |
| { UNSG32 u32; |
| struct w32Cec_regIfCtrl; |
| } T32Cec_regIfCtrl; |
| typedef union T32Cec_CHIP_RESET_TRACKER |
| { UNSG32 u32; |
| struct w32Cec_CHIP_RESET_TRACKER; |
| } T32Cec_CHIP_RESET_TRACKER; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TCec_regIfCtrl |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Cec_regIfCtrl; |
| }; |
| } TCec_regIfCtrl; |
| typedef union TCec_CHIP_RESET_TRACKER |
| { UNSG32 u32[1]; |
| struct { |
| struct w32Cec_CHIP_RESET_TRACKER; |
| }; |
| } TCec_CHIP_RESET_TRACKER; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 Cec_drvrd(SIE_Cec *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 Cec_drvwr(SIE_Cec *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void Cec_reset(SIE_Cec *p); |
| SIGN32 Cec_cmp (SIE_Cec *p, SIE_Cec *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define Cec_check(p,pie,pfx,hLOG) Cec_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define Cec_print(p, pfx,hLOG) Cec_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: Cec |
| //////////////////////////////////////////////////////////// |
| |
| |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| #pragma pack() |
| |
| #endif |
| ////// |
| /// ENDOFFILE: cec.h |
| //////////////////////////////////////////////////////////// |
| |
