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nest-open-source / manifest_repos / bootloader / 836ad32e08388e0e4ce8d03fe4f14d2c3ea8ba13 / . / berlin_tools / bootloader / include / Firmware_Berlin_BG2CDP_A0 / gfx2D.h
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/********************************************************************************
* Marvell GPL License Option
*
* If you received this File from Marvell, you may opt to use, redistribute and/or
* modify this File in accordance with the terms and conditions of the General
* Public License Version 2, June 1991 (the "GPL License"), a copy of which is
* available along with the File in the license.txt file or by writing to the Free
* Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
* on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
*
* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
* WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
* DISCLAIMED. The GPL License provides additional details about this warranty
* disclaimer.
******************************************************************************/
//////
/// don't edit! auto-generated by docc: gfx2D.h
////////////////////////////////////////////////////////////
#ifndef gfx2D_h
#define gfx2D_h (){}
#include "ctypes.h"
#pragma pack(1)
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}
#define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0)
#define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
#define _bCLRMASK_(b) (~_bSETMASK_(b))
#define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb))
#define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
#define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)
#endif
//////
///
/// $INTERFACE GFX2D biu (4,4)
/// # # ----------------------------------------------------------
/// @ 0x00000 (W-)
/// # # Stuffing bytes...
/// %% 128
/// @ 0x00010 AQIntrAcknowledge (RW)
/// ###
/// * Interrupt status register
/// ###
/// %unsigned 32 INTR_VEC 0x0
/// ###
/// * Interrupt source status
/// ###
/// @ 0x00014 AQIntrEnbl (RW)
/// ###
/// * Interrupt enable register
/// ###
/// %unsigned 32 INTR_ENBL_VEC 0x0
/// ###
/// * Interrupt enable for all sources
/// ###
/// @ 0x00018 (W-)
/// # # Stuffing bytes...
/// %% 1856
/// @ 0x00100 AQDESrcAddress (RW)
/// ###
/// * 32-bit aligned base address of the source surface
/// ###
/// %unsigned 28 ADDRESS 0x0
/// ###
/// * Address bits
/// ###
/// %% 2 # Stuffing bits...
/// %unsigned 2 TYPE 0x0
/// ###
/// * 0 => INTERNAL
/// * 1 => EXTERNAL
/// * 2 => SYSTEM
/// * 3 => VIRTUAL_SYSTEM
/// ###
/// @ 0x00104 AQDESrcStride (RW)
/// ###
/// * Stride of the source surface in bytes. To calculate the stride multiply the surface width in pixels (8-pixel aligned) by the number of bytes per pixel
/// ###
/// %unsigned 18 STRIDE 0x0
/// %% 14 # Stuffing bits...
/// @ 0x00108 AQDESrcRotationConfig (RW)
/// ###
/// * 90 degree rotation configuration for the source surface. AQDESrcRotationConfig_Width field specifies the width of the surface in pixels.
/// ###
/// %unsigned 16 WIDTH 0x0
/// %unsigned 1 ROTATION 0x0
/// ###
/// * 0 => NORMAL
/// * 1 => ROTATED
/// ###
/// %% 15 # Stuffing bits...
/// @ 0x0010C AQDESrcConfig (P)
/// ###
/// * Source surface configuration register
/// ###
/// %unsigned 4 FORMAT 0x0
/// ###
/// * Defines the pixel format of the source surface.
/// * 0 => X4R4G4B4
/// * 1 => A4R4G4B4
/// * 2 => X1R5G5B5
/// * 3 => A1R5G5B5
/// * 4 => R5G6B5
/// * 5 => X8R8G8B8
/// * 6 => A8R8G8B8
/// * 7 => A2R10G10B10
/// * 8 => A2B10G10R10
/// * 9 => G16R16
/// * A => A16B16G16R16
/// * B => YUY2
/// * C => UYVY
/// * D => INDEX8
/// * F => MONOCHROME
/// ###
/// %unsigned 2 TRANSPARENCY 0x0
/// ###
/// * Source transparency configuration. If set to OPAQUE, the transparency will be decided by the pattern mask if pattern is being used. If set to TRANSPARENT, each source pixel will be compared against GFX2D_AQDESrcColorBg register for color blits or AQDESrcConfig_MONO_TRANSPARENCY field of this register for mono expansion blits to determine whether the pixel is transparent or not. If set to MASKED_MASK, the transparency is determined based on the mask bits for masked blits. If set to MASKED_PATTERN, the transparency will be decided by the pattern mask; this setting is functionally identical to OPAQUE. Once the transarency is decided, the value (0 for opaque, 1 for transparent) it is used to select foreground or background ROP code.
/// * 0 => OPAQUE
/// * 1 => TRANSPARENT
/// * 2 => MASKED_MASK
/// * 3 => MASKED_PATTERN
/// ###
/// %unsigned 1 SRC_RELATIVE 0x0
/// ###
/// * If set to ABSOLUTE, the source coordinates are treated as absolute coordinates inside the source surface. If set to RELATIVE, the source coordinates are treated as the offsets from the destination coordinates with the source size equal to the size of the destination.
/// * 0 => ABSOLUTE
/// * 1 => RELATIVE
/// ###
/// %% 1 # Stuffing bits...
/// %unsigned 1 LOCATION 0x0
/// ###
/// * Source data location: set to STREAM for mono expansion blits or masked blits. For mono expansion blits the complete bitmap comes from the command stream. For masked blits the source data comes from the memory and the mask from the command stream.
/// * 0 => MEMORY
/// * 1 => STREAM
/// ###
/// %% 3 # Stuffing bits...
/// %unsigned 2 PACK 0x0
/// ###
/// * Mono expansion or masked blit: stream packing in pixels. Determines how many horizontal pixels are there per each 32-bit chunk. For example, if set to Packed8, each 32-bit chunk is 8-pixel wide, which also means that it defines 4 vertical lines of pixels.
/// * 0 => PACKED8
/// * 1 => PACKED16
/// * 2 => PACKED32
/// * 3 => UNPACKED
/// ###
/// %% 1 # Stuffing bits...
/// %unsigned 1 MONO_TRANSPARENCY 0x0
/// ###
/// * Mono expansion: if 0, transparency color will be 0, otherwise transparency color will be 1.
/// * 0 => BACKGROUND
/// * 1 => FOREGROUND
/// ###
/// %unsigned 1 COLOR_CONVERT 0x0
/// ###
/// * Mono expansion: if not set, the source color will be decided by the values straight from GFX2D_AQDESrcColorFg and AGFX2D_QDESrcColorBg registers. If set, the values will first be converted to the destination format.
/// * 0 => OFF
/// * 1 => ON
/// ###
/// %% 15 # Stuffing bits...
/// @ 0x00110 AQDESrcOrigin (RW)
/// ###
/// * Absolute or relative (see AQDESrcConfig_SRC_RELATIVE field of GFX2D_AQDESrcConfig register) X and Y coordinates in pixels of the top left corner of the source rectangle within the source surface.
/// ###
/// %unsigned 16 X 0x0
/// %unsigned 16 Y 0x0
/// @ 0x00114 AQDESrcSize (RW)
/// ###
/// * Width and height of the source rectangle in pixels. If the source is relative (see AQDESrcConfig_SRC_RELATIVE field of GFX2D_AQDESrcConfig register) or a regular bitblt is being performed without stretching, this register is ignored and the source size is assumed to be the same as the destination.
/// ###
/// %unsigned 16 X 0x0
/// %unsigned 16 Y 0x0
/// @ 0x00118 AQDESrcColorBg (RW)
/// ###
/// * In mono expansion defines the source color if the mono pixel is 0. In color blits defines the transparency color and is assumed to be on the same format as the source.
/// ###
/// %unsigned 8 BLUE 0x0
/// %unsigned 8 GREEN 0x0
/// %unsigned 8 RED 0x0
/// %unsigned 8 ALPHA 0x0
/// @ 0x0011C AQDESrcColorFg (RW)
/// ###
/// * In mono expansion defines the source color if the mono pixel is 1.
/// ###
/// %unsigned 8 BLUE 0x0
/// %unsigned 8 GREEN 0x0
/// %unsigned 8 RED 0x0
/// %unsigned 8 ALPHA 0x0
/// @ 0x00120 AQDEStretchFactorLow (RW)
/// ###
/// * Low part of the destination stretch factor which contains the horizontal stretch factor in 15.16 fixed point format. The value is calculated using the following formula: factor = ((srcWidth - 1) << 16) / (dstWidth - 1). Stretch blit uses only the integer part of the value, while Filter blit uses all 31 bits.
/// ###
/// %unsigned 31 X 0x0
/// %% 1 # Stuffing bits...
/// @ 0x00124 AQDEStretchFactorHigh (RW)
/// ###
/// * High part of the destination stretch factor which contains the vertical stretch factor in 15.16 fixed point format. The value is calculated using the following formula: factor = ((srcHeight - 1) << 16) / (dstHeight - 1). Stretch blit uses only the integer part of the value, while Filter blit uses all 31 bits.
/// ###
/// %unsigned 31 Y 0x0
/// %% 1 # Stuffing bits...
/// @ 0x00128 AQDEDestAddress (RW)
/// ###
/// * 32-bit aligned base address of the destination surface
/// ###
/// %unsigned 28 ADDRESS 0x0
/// %% 2 # Stuffing bits...
/// %unsigned 2 TYPE 0x0
/// ###
/// * 0 => INTERNAL
/// * 1 => EXTERNAL
/// * 2 => SYSTEM
/// * 3 => VIRTUAL_SYSTEM
/// ###
/// @ 0x0012C AQDEDestStride (RW)
/// ###
/// * Stride of the destination surface in bytes. To calculate the stride multiply the surface width in pixels (8-pixel aligned) by the number of bytes per pixel.
/// ###
/// %unsigned 18 STRIDE 0x0
/// %% 14 # Stuffing bits...
/// @ 0x00130 AQDEDestRotationConfig (RW)
/// ###
/// * 90 degree rotation configuration for the destination surface. AQDEDestRotationConfig_Width field specifies the width of the surface in pixels.
/// ###
/// %unsigned 16 WIDTH 0x0
/// %unsigned 1 ROTATION 0x0
/// ###
/// * 0 => NORMAL
/// * 1 => ROTATED
/// ###
/// %% 15 # Stuffing bits...
/// @ 0x00134 AQDEDestConfig (RW)
/// ###
/// * Destination surface configuration register.
/// ###
/// %unsigned 5 FORMAT 0x0
/// ###
/// * 00 => X4R4G4B4
/// * 01 => A4R4G4B4
/// * 02 => X1R5G5B5
/// * 03 => A1R5G5B5
/// * 04 => R5G6B5
/// * 05 => X8R8G8B8
/// * 06 => A8R8G8B8
/// * 07 => A2R10G10B10
/// * 08 => A2B10G10R10
/// * 09 => G16R16
/// * 0A => A16B16G16R16
/// * 0B => YUY2
/// * 0C => UYVY
/// * 0D => INDEX8
/// * 0F => MONOCHROME
/// * 10 => R16F
/// * 11 => G16R16F
/// * 12 => A16B16G16R16F
/// * 13 => R32F
/// * 14 => G32R32F
/// ###
/// %% 7 # Stuffing bits...
/// %unsigned 3 COMMAND 0x0
/// ###
/// * 0 => CLEAR
/// * 1 => LINE
/// * 2 => BIT_BLT
/// * 3 => BIT_BLT_REVERSED
/// * 4 => STRETCH_BLT
/// * 5 => HOR_FILTER_BLT
/// * 6 => VER_FILTER_BLT
/// * 7 => INVALID_COMMAND
/// ###
/// %% 17 # Stuffing bits...
/// @ 0x00138 AQDEPatternAddress (RW)
/// ###
/// * 32-bit aligned base address of 8x8 pattern for SOLID_COLOR patterns (see AQDEPatternConfig_TYPE field in GFX2D_AQDEPatternConfig register).
/// ###
/// %unsigned 28 ADDRESS 0x0
/// %% 2 # Stuffing bits...
/// %unsigned 2 TYPE 0x0
/// ###
/// * 0 => INTERNAL
/// * 1 => EXTERNAL
/// * 2 => SYSTEM
/// * 3 => VIRTUAL_SYSTEM
/// ###
/// @ 0x0013C AQDEPatternConfig (RW)
/// ###
/// * Pattern configuration register.
/// ###
/// %unsigned 4 FORMAT 0x0
/// ###
/// * 0 => X4R4G4B4
/// * 1 => A4R4G4B4
/// * 2 => X1R5G5B5
/// * 3 => A1R5G5B5
/// * 4 => R5G6B5
/// * 5 => X8R8G8B8
/// * 6 => A8R8G8B8
/// * 7 => A2R10G10B10
/// * 8 => A2B10G10R10
/// * 9 => G16R16
/// * A => A16B16G16R16
/// * B => YUY2
/// * C => UYVY
/// * D => INDEX8
/// * F => MONOCHROME
/// ###
/// %unsigned 1 TYPE 0x0
/// ###
/// * If set to SOLID_COLOR, the pattern color is defined by the GFX2D_AQDEPatternFgColor register, the value of which could used straight or converted to destination format (see AQDEPatternConfig_COLOR_CONVERT field of this register). If set to PATTERN and the pattern format is monochrome, the pattern colors are determined by the GFX2D_AQDEPatternFgColor and GFX2D_AQDEPatternBgColor register pair based on the pattern values from GFX2D_AQDEPatternLow and GFX2D_AQDEPatternHigh registers. If set to PATTERN and the pattern format is not monochrome, the pattern is loaded from memory starting from the address specified in GFX2D_AQDEPatternAddress register.
/// * 0 => SOLID_COLOR
/// * 1 => PATTERN
/// ###
/// %unsigned 1 COLOR_CONVERT 0x0
/// ###
/// * If disabled, then the pattern color for monochrome and solid color patterns will be directly defined with no color conversion by the GFX2D_AQDEPatternFgColor and GFX2D_AQDEPatternBgColor register pair. If enabled, the color values in the register pair are assumed to be in ARGB8 format and converted to the destination format before they are used.
/// * 0 => OFF
/// * 1 => ON
/// ###
/// %unsigned 2 INIT_TRIGGER 0x0
/// ###
/// * Defines what should be initialized. If DEFAULT or INIT_CONFIG are set, only pattern configuration will be modified. If INIT_PATTERN is set, the pattern cache will be reloaded using the current configuration. If INIT_ALL is set, first the configuration will be updated, then the pattern cache will be reloaded based on the updated configuration.
/// * 0 => DEFAULT
/// * 1 => INIT_CONFIG
/// * 2 => INIT_PATTERN
/// * 3 => INIT_ALL
/// ###
/// %% 9 # Stuffing bits...
/// %unsigned 3 ORIGIN_X 0x0
/// ###
/// * Defines the horizontal coordinate in pixels of the top left corner of 8x8 pattern within 8x8 block.
/// ###
/// %unsigned 3 ORIGIN_Y 0x0
/// ###
/// * Defines the vertical coordinate in pixels of the top left corner of 8x8 pattern within 8x8 block.
/// ###
/// %% 9 # Stuffing bits...
/// @ 0x00140 AQDEPatternLow (RW)
/// ###
/// * This register defines the pattern value for monochrome patterns. Color values from the GFX2D_AQDEPatternFgColor and GFX2D_AQDEPatternBgColor register pair are used in conjunction with the value of this register to determine the final color. The pattern is 8x8 pixels and is defined row by row.
/// ###
/// %unsigned 8 ROW0 0x0
/// %unsigned 8 ROW1 0x0
/// %unsigned 8 ROW2 0x0
/// %unsigned 8 ROW3 0x0
/// @ 0x00144 AQDEPatternHigh (RW)
/// ###
/// * This register defines the pattern value for monochrome patterns. Color values from the GFX2D_AQDEPatternFgColor and GFX2D_AQDEPatternBgColor register pair are used in conjunction with the value of this register to determine the final color. The pattern is 8x8 pixels and is defined row by row.
/// ###
/// %unsigned 8 ROW4 0x0
/// %unsigned 8 ROW5 0x0
/// %unsigned 8 ROW6 0x0
/// %unsigned 8 ROW7 0x0
/// @ 0x00148 AQDEPatternMaskLow (RW)
/// ###
/// * Pattern mask is used only when the transparency is defined by pattern. Pattern mask is defined in rows, one bit per pixel. Each mask bit is used to select the ROP code to use for this particular pixel. If mask bit is 0, the pixel is called transparent and background ROP is used, if the bit is 1, the pixel is called opaque and foreground ROP is used on it.
/// ###
/// %unsigned 8 ROW0 0x0
/// %unsigned 8 ROW1 0x0
/// %unsigned 8 ROW2 0x0
/// %unsigned 8 ROW3 0x0
/// @ 0x0014C AQDEPatternMaskHigh (RW)
/// ###
/// * Pattern mask is used only when the transparency is defined by pattern. Pattern mask is defined in rows, one bit per pixel. Each mask bit is used to select the ROP code to use for this particular pixel. If mask bit is 0, the pixel is called transparent and background ROP is used, if the bit is 1, the pixel is called opaque and foreground ROP is used on it.
/// ###
/// %unsigned 8 ROW4 0x0
/// %unsigned 8 ROW5 0x0
/// %unsigned 8 ROW6 0x0
/// %unsigned 8 ROW7 0x0
/// @ 0x00150 AQDEPatternBgColor (RW)
/// ###
/// * Defines the background color for monochrome patterns. It can be used straight from the register or converted to the destination before use (see AQDEPatternConfig_COLOR_CONVERT field of GFX2D_AQDEPatternConfig register).
/// ###
/// %unsigned 8 BLUE 0x0
/// %unsigned 8 GREEN 0x0
/// %unsigned 8 RED 0x0
/// %unsigned 8 ALPHA 0x0
/// @ 0x00154 AQDEPatternFgColor (RW)
/// ###
/// * Defines the foreground color for monochrome patterns, also defines the color of SOLID_COLOR patterns. It can be used straight from the register or converted to the destination before use (see AQDEPatternConfig_COLOR_CONVERT field of GFX2D_AQDEPatternConfig register).
/// ###
/// %unsigned 8 BLUE 0x0
/// %unsigned 8 GREEN 0x0
/// %unsigned 8 RED 0x0
/// %unsigned 8 ALPHA 0x0
/// @ 0x00158 AQDEFilterBlit (RW)
/// ###
/// * Filter blit configuration regisrter.
/// ###
/// %unsigned 4 KERNEL_SIZE 0x0
/// ###
/// * The size of the kernel; determines number of source samples to be taken to determine each destination pixel. Valid values are 1, 3, 5, 7, 9.
/// ###
/// %unsigned 1 IGNORE_BOTTOM_EDGE 0x0
/// ###
/// * The same as AQDEFilterBlit_IGNORE_LEFT_EDGE field, but for the bottom edge in vertical blit.
/// ###
/// %unsigned 1 IGNORE_RIGHT_EDGE 0x0
/// ###
/// * The same as AQDEFilterBlit_IGNORE_LEFT_EDGE field, but for the right edge.
/// ###
/// %unsigned 1 IGNORE_TOP_EDGE 0x0
/// ###
/// * The same as AQDEFilterBlit_IGNORE_LEFT_EDGE field, but for the top edge in vertical blit
/// ###
/// %unsigned 1 IGNORE_LEFT_EDGE 0x0
/// ###
/// * If set, the horizontal blit will walk all the way to the left edge allowing to sample pixels to the left of the center which could be beyond the source edge. This assumes that there are enough valid pixels beyond the left edge to cover the size of the kernel. For example if the kernel size is 9, there should be at least 4 valid pixels beyond the edge. This mode is used for split frame rendering to prevent seams between the subframes.
/// ###
/// %% 24 # Stuffing bits...
/// @ 0x0015C AQDERop (RW)
/// ###
/// * Raster operation foreground and background codes. Even though ROP is not used in CLEAR, HOR_FILTER_BLT, VER_FILTER_BLT and alpha-eanbled BIT_BLTs, ROP code still has to be programmed, because the engine makes the decision whether source, destination and pattern are involved in the current operation and the correct decision is essential for the engine to complete the operation as expected.
/// ###
/// %unsigned 8 ROP_FG 0x0
/// ###
/// * Background ROP code is used for opaque pixels
/// ###
/// %unsigned 8 ROP_BG 0x0
/// ###
/// * Background ROP code is used for transparent pixels
/// ###
/// %% 4 # Stuffing bits...
/// %unsigned 2 TYPE 0x0
/// ###
/// * ROP type: ROP2, ROP3 or ROP4
/// * 0 => ROP2_PATTERN
/// * 1 => ROP2_SOURCE
/// * 2 => ROP3
/// * 3 => ROP4
/// ###
/// %% 10 # Stuffing bits...
/// @ 0x00160 AQDEClipTopLeft (RW)
/// ###
/// * Top left corner of the clipping rectangle defined in pixels. Clipping is always on and everything beyond the clipping rectangle will be clipped out. Clipping is not used with filter blits.
/// ###
/// %unsigned 15 X 0x0
/// %% 1 # Stuffing bits...
/// %unsigned 15 Y 0x0
/// %% 1 # Stuffing bits...
/// @ 0x00164 AQDEClipBottomRight (RW)
/// ###
/// * Bottom right corner of the clipping rectangle defined in pixels. Clipping is always on and everything beyond the clipping rectangle will be clipped out. Clipping is not used with filter blits.
/// ###
/// %unsigned 15 X 0x0
/// %% 1 # Stuffing bits...
/// %unsigned 15 Y 0x0
/// %% 1 # Stuffing bits...
/// @ 0x00168 AQDEClearByteMask (RW)
/// ###
/// * Byte mask for the clear command
/// ###
/// %unsigned 8 VALUE 0x0
/// ###
/// * Byte mask for the clear command; defines which bytes to clear with value specified in GFX2D_AQDEClearPixelValueLow and GFX2D_AQDEClearPixelValueHigh registers.
/// ###
/// %% 24 # Stuffing bits...
/// @ 0x0016C AQDEClearPixelValueLow (RW)
/// ###
/// * Clear value for the clear command
/// ###
/// %unsigned 32 VALUE 0x0
/// ###
/// * Clear value for the clear command. The value is applied based on the mask defined in GFX2D_AQDEClearByteMask register.
/// ###
/// @ 0x00170 AQDEClearPixelValueHigh (RW)
/// ###
/// * Clear value for the clear command
/// ###
/// %unsigned 32 VALUE 0x0
/// ###
/// * Clear value for the clear command. The value is applied based on the mask defined in GFX2D_AQDEClearByteMask register.
/// ###
/// @ 0x00174 AQDESrcOriginFraction (RW)
/// ###
/// * Fraction for the source origin. Together with values in GFX2D_AQDESrcOrigin these values form signed 16.16 fixed point origin for the source rectangle. Fractions are only used in filter blit in split frame mode.
/// ###
/// %unsigned 16 X 0x0
/// %unsigned 16 Y 0x0
/// @ 0x00178 AQDEAlphaControl (RW)
/// ###
/// * Alpha blending controls register
/// ###
/// %unsigned 1 ENABLE 0x0
/// ###
/// * Enable alpha blending. When enabled, alpha blending substitutes the raster operation. While the ROP code is not used as the actual operation code, it still has to be programmed to an operation which uses both source and destination, but not pattern. Such code, for example, could be 0xEE, which is defined as SRCPAINT in MSDN.
/// * 0 => OFF
/// * 1 => ON
/// ###
/// %% 15 # Stuffing bits...
/// %unsigned 8 GLOBAL_SRC_ALPHA 0x0
/// %unsigned 8 GLOBAL_DST_ALPHA 0x0
/// @ 0x0017C AQDEAlphaModes (RW)
/// ###
/// * Alpha blending modes register.
/// ###
/// %unsigned 1 SRC_ALPHA 0x0
/// ###
/// * 0 => NORMAL
/// * 1 => INVERSE
/// ###
/// %% 3 # Stuffing bits...
/// %unsigned 1 DST_ALPHA 0x0
/// ###
/// * 0 => NORMAL
/// * 1 => INVERSED
/// ###
/// %% 3 # Stuffing bits...
/// %unsigned 2 GLOBAL_SRC_ALPHA 0x0
/// ###
/// * 0 => NORMAL
/// * 1 => GLOBAL
/// * 2 => SCALED
/// ###
/// %% 2 # Stuffing bits...
/// %unsigned 2 GLOBAL_DST_ALPHA 0x0
/// ###
/// * 0 => NORMAL
/// * 1 => GLOBAL
/// * 2 => SCALED
/// ###
/// %% 2 # Stuffing bits...
/// %unsigned 1 SRC_COLOR 0x0
/// ###
/// * Defines whether the source color should be used straight or premultiplied by the source alpha before the blending takes place.
/// * 0 => NORMAL
/// * 1 => MULTIPLY
/// ###
/// %% 3 # Stuffing bits...
/// %unsigned 1 DST_COLOR 0x0
/// ###
/// * Defines whether the destination color should be used straight or premultiplied by the destination alpha before the blending takes place.
/// * 0 => NORMAL
/// * 1 => MULTIPLY
/// ###
/// %% 3 # Stuffing bits...
/// %unsigned 2 SRC_BLENDING 0x0
/// ###
/// * Determines the source blending factor should be forced zero, forced one, normal or inversed.
/// * 0 => ZERO
/// * 1 => ONE
/// * 2 => NORMAL
/// * 3 => INVERSED
/// ###
/// %% 2 # Stuffing bits...
/// %unsigned 2 DST_BLENDING 0x0
/// ###
/// * Determines the destination blending factor should be forced zero, forced one, normal or inversed.
/// * 0 => ZERO
/// * 1 => ONE
/// * 2 => NORMAL
/// * 3 => INVERSED
/// ###
/// %% 2 # Stuffing bits...
/// @ 0x00180 AQDEWriteBackControl (RW)
/// ###
/// * Control register for write back options
/// ###
/// %% 28 # Stuffing bits...
/// %unsigned 2 WRITE_BACK_MODE 0x0
/// ###
/// * 0 => SINGLE
/// * 1 => DOUBLE
/// * 2 => QUAD
/// * 3 => FULL
/// ###
/// %% 2 # Stuffing bits...
/// @ 0x00184 AQ2DSpecialControl (RW)
/// ###
/// * Disable destination memory read access for COPY or CLEAR blit commands
/// ###
/// %unsigned 1 USE_DEST_OVERRIDE 0x0
/// ###
/// * Disable destination memory read access for COPY or CLEAR blit commands. This only works for the tile/cache line aligned block operation.
/// * 0 => DEFAULT
/// * 1 => ENABLE
/// ###
/// %% 31 # Stuffing bits...
/// @ 0x00188 (W-)
/// # # Stuffing bytes...
/// %% 9472
/// @ 0x00628 AQCmdBufferAddr (RW)
/// ###
/// * Command buffer address register
/// ###
/// %unsigned 28 ADDRESS 0x0
/// %unsigned 2 TYPE 0x0
/// ###
/// * 0 => INTERNAL
/// * 1 => EXTERNAL
/// * 2 => SYSTEM
/// * 3 => VIRTUAL_SYSTEM
/// ###
/// %% 2 # Stuffing bits...
/// @ 0x0062C AQCmdBufferCtrl (RW)
/// ###
/// * Command buffer control register
/// ###
/// %unsigned 16 PREFETCH 0x0
/// ###
/// * Number of instructions that are prefetchable, each instruction is 8bytes
/// ###
/// %unsigned 1 ENABLE 0x0
/// ###
/// * 0 => DISABLE
/// * 1 => ENABLE
/// ###
/// %% 15 # Stuffing bits...
/// @ 0x00630 (W-)
/// # # Stuffing bytes...
/// %% 85632
/// @ 0x03000 AQDEFilterKernel (RW)
/// ###
/// * Filter blit coefficient table, the table spans next 128 Double Word address starting from this address.
/// ###
/// %unsigned 16 COEFFICIENT0 0x0
/// %unsigned 16 COEFFICIENT1 0x0
/// @ 0x03004 (W-)
/// # # Stuffing bytes...
/// %% 8160
/// @ 0x03400 AQDEIndexColorTable (RW)
/// ###
/// * 256 color entries for the indexed color mode. Colors are assumed to be in the destination format and no color conversion is done on the values. The Table spans next 256 Double Word address starting from this address.
/// ###
/// %unsigned 8 BLUE 0x0
/// %unsigned 8 GREEN 0x0
/// %unsigned 8 RED 0x0
/// %unsigned 8 ALPHA 0x0
/// # # ----------------------------------------------------------
/// $ENDOFINTERFACE # size: 13316B, bits: 973b, padding: 0B
////////////////////////////////////////////////////////////
#ifndef h_GFX2D
#define h_GFX2D (){}
#define RA_GFX2D_AQIntrAcknowledge 0x0010
#define BA_GFX2D_AQIntrAcknowledge_INTR_VEC 0x0010
#define B16GFX2D_AQIntrAcknowledge_INTR_VEC 0x0010
#define LSb32GFX2D_AQIntrAcknowledge_INTR_VEC 0
#define LSb16GFX2D_AQIntrAcknowledge_INTR_VEC 0
#define bGFX2D_AQIntrAcknowledge_INTR_VEC 32
#define MSK32GFX2D_AQIntrAcknowledge_INTR_VEC 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQIntrEnbl 0x0014
#define BA_GFX2D_AQIntrEnbl_INTR_ENBL_VEC 0x0014
#define B16GFX2D_AQIntrEnbl_INTR_ENBL_VEC 0x0014
#define LSb32GFX2D_AQIntrEnbl_INTR_ENBL_VEC 0
#define LSb16GFX2D_AQIntrEnbl_INTR_ENBL_VEC 0
#define bGFX2D_AQIntrEnbl_INTR_ENBL_VEC 32
#define MSK32GFX2D_AQIntrEnbl_INTR_ENBL_VEC 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcAddress 0x0100
#define BA_GFX2D_AQDESrcAddress_ADDRESS 0x0100
#define B16GFX2D_AQDESrcAddress_ADDRESS 0x0100
#define LSb32GFX2D_AQDESrcAddress_ADDRESS 0
#define LSb16GFX2D_AQDESrcAddress_ADDRESS 0
#define bGFX2D_AQDESrcAddress_ADDRESS 28
#define MSK32GFX2D_AQDESrcAddress_ADDRESS 0x0FFFFFFF
#define BA_GFX2D_AQDESrcAddress_TYPE 0x0103
#define B16GFX2D_AQDESrcAddress_TYPE 0x0102
#define LSb32GFX2D_AQDESrcAddress_TYPE 30
#define LSb16GFX2D_AQDESrcAddress_TYPE 14
#define bGFX2D_AQDESrcAddress_TYPE 2
#define MSK32GFX2D_AQDESrcAddress_TYPE 0xC0000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcStride 0x0104
#define BA_GFX2D_AQDESrcStride_STRIDE 0x0104
#define B16GFX2D_AQDESrcStride_STRIDE 0x0104
#define LSb32GFX2D_AQDESrcStride_STRIDE 0
#define LSb16GFX2D_AQDESrcStride_STRIDE 0
#define bGFX2D_AQDESrcStride_STRIDE 18
#define MSK32GFX2D_AQDESrcStride_STRIDE 0x0003FFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcRotationConfig 0x0108
#define BA_GFX2D_AQDESrcRotationConfig_WIDTH 0x0108
#define B16GFX2D_AQDESrcRotationConfig_WIDTH 0x0108
#define LSb32GFX2D_AQDESrcRotationConfig_WIDTH 0
#define LSb16GFX2D_AQDESrcRotationConfig_WIDTH 0
#define bGFX2D_AQDESrcRotationConfig_WIDTH 16
#define MSK32GFX2D_AQDESrcRotationConfig_WIDTH 0x0000FFFF
#define BA_GFX2D_AQDESrcRotationConfig_ROTATION 0x010A
#define B16GFX2D_AQDESrcRotationConfig_ROTATION 0x010A
#define LSb32GFX2D_AQDESrcRotationConfig_ROTATION 16
#define LSb16GFX2D_AQDESrcRotationConfig_ROTATION 0
#define bGFX2D_AQDESrcRotationConfig_ROTATION 1
#define MSK32GFX2D_AQDESrcRotationConfig_ROTATION 0x00010000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcConfig 0x010C
#define BA_GFX2D_AQDESrcConfig_FORMAT 0x010C
#define B16GFX2D_AQDESrcConfig_FORMAT 0x010C
#define LSb32GFX2D_AQDESrcConfig_FORMAT 0
#define LSb16GFX2D_AQDESrcConfig_FORMAT 0
#define bGFX2D_AQDESrcConfig_FORMAT 4
#define MSK32GFX2D_AQDESrcConfig_FORMAT 0x0000000F
#define BA_GFX2D_AQDESrcConfig_TRANSPARENCY 0x010C
#define B16GFX2D_AQDESrcConfig_TRANSPARENCY 0x010C
#define LSb32GFX2D_AQDESrcConfig_TRANSPARENCY 4
#define LSb16GFX2D_AQDESrcConfig_TRANSPARENCY 4
#define bGFX2D_AQDESrcConfig_TRANSPARENCY 2
#define MSK32GFX2D_AQDESrcConfig_TRANSPARENCY 0x00000030
#define BA_GFX2D_AQDESrcConfig_SRC_RELATIVE 0x010C
#define B16GFX2D_AQDESrcConfig_SRC_RELATIVE 0x010C
#define LSb32GFX2D_AQDESrcConfig_SRC_RELATIVE 6
#define LSb16GFX2D_AQDESrcConfig_SRC_RELATIVE 6
#define bGFX2D_AQDESrcConfig_SRC_RELATIVE 1
#define MSK32GFX2D_AQDESrcConfig_SRC_RELATIVE 0x00000040
#define BA_GFX2D_AQDESrcConfig_LOCATION 0x010D
#define B16GFX2D_AQDESrcConfig_LOCATION 0x010C
#define LSb32GFX2D_AQDESrcConfig_LOCATION 8
#define LSb16GFX2D_AQDESrcConfig_LOCATION 8
#define bGFX2D_AQDESrcConfig_LOCATION 1
#define MSK32GFX2D_AQDESrcConfig_LOCATION 0x00000100
#define BA_GFX2D_AQDESrcConfig_PACK 0x010D
#define B16GFX2D_AQDESrcConfig_PACK 0x010C
#define LSb32GFX2D_AQDESrcConfig_PACK 12
#define LSb16GFX2D_AQDESrcConfig_PACK 12
#define bGFX2D_AQDESrcConfig_PACK 2
#define MSK32GFX2D_AQDESrcConfig_PACK 0x00003000
#define BA_GFX2D_AQDESrcConfig_MONO_TRANSPARENCY 0x010D
#define B16GFX2D_AQDESrcConfig_MONO_TRANSPARENCY 0x010C
#define LSb32GFX2D_AQDESrcConfig_MONO_TRANSPARENCY 15
#define LSb16GFX2D_AQDESrcConfig_MONO_TRANSPARENCY 15
#define bGFX2D_AQDESrcConfig_MONO_TRANSPARENCY 1
#define MSK32GFX2D_AQDESrcConfig_MONO_TRANSPARENCY 0x00008000
#define BA_GFX2D_AQDESrcConfig_COLOR_CONVERT 0x010E
#define B16GFX2D_AQDESrcConfig_COLOR_CONVERT 0x010E
#define LSb32GFX2D_AQDESrcConfig_COLOR_CONVERT 16
#define LSb16GFX2D_AQDESrcConfig_COLOR_CONVERT 0
#define bGFX2D_AQDESrcConfig_COLOR_CONVERT 1
#define MSK32GFX2D_AQDESrcConfig_COLOR_CONVERT 0x00010000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcOrigin 0x0110
#define BA_GFX2D_AQDESrcOrigin_X 0x0110
#define B16GFX2D_AQDESrcOrigin_X 0x0110
#define LSb32GFX2D_AQDESrcOrigin_X 0
#define LSb16GFX2D_AQDESrcOrigin_X 0
#define bGFX2D_AQDESrcOrigin_X 16
#define MSK32GFX2D_AQDESrcOrigin_X 0x0000FFFF
#define BA_GFX2D_AQDESrcOrigin_Y 0x0112
#define B16GFX2D_AQDESrcOrigin_Y 0x0112
#define LSb32GFX2D_AQDESrcOrigin_Y 16
#define LSb16GFX2D_AQDESrcOrigin_Y 0
#define bGFX2D_AQDESrcOrigin_Y 16
#define MSK32GFX2D_AQDESrcOrigin_Y 0xFFFF0000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcSize 0x0114
#define BA_GFX2D_AQDESrcSize_X 0x0114
#define B16GFX2D_AQDESrcSize_X 0x0114
#define LSb32GFX2D_AQDESrcSize_X 0
#define LSb16GFX2D_AQDESrcSize_X 0
#define bGFX2D_AQDESrcSize_X 16
#define MSK32GFX2D_AQDESrcSize_X 0x0000FFFF
#define BA_GFX2D_AQDESrcSize_Y 0x0116
#define B16GFX2D_AQDESrcSize_Y 0x0116
#define LSb32GFX2D_AQDESrcSize_Y 16
#define LSb16GFX2D_AQDESrcSize_Y 0
#define bGFX2D_AQDESrcSize_Y 16
#define MSK32GFX2D_AQDESrcSize_Y 0xFFFF0000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcColorBg 0x0118
#define BA_GFX2D_AQDESrcColorBg_BLUE 0x0118
#define B16GFX2D_AQDESrcColorBg_BLUE 0x0118
#define LSb32GFX2D_AQDESrcColorBg_BLUE 0
#define LSb16GFX2D_AQDESrcColorBg_BLUE 0
#define bGFX2D_AQDESrcColorBg_BLUE 8
#define MSK32GFX2D_AQDESrcColorBg_BLUE 0x000000FF
#define BA_GFX2D_AQDESrcColorBg_GREEN 0x0119
#define B16GFX2D_AQDESrcColorBg_GREEN 0x0118
#define LSb32GFX2D_AQDESrcColorBg_GREEN 8
#define LSb16GFX2D_AQDESrcColorBg_GREEN 8
#define bGFX2D_AQDESrcColorBg_GREEN 8
#define MSK32GFX2D_AQDESrcColorBg_GREEN 0x0000FF00
#define BA_GFX2D_AQDESrcColorBg_RED 0x011A
#define B16GFX2D_AQDESrcColorBg_RED 0x011A
#define LSb32GFX2D_AQDESrcColorBg_RED 16
#define LSb16GFX2D_AQDESrcColorBg_RED 0
#define bGFX2D_AQDESrcColorBg_RED 8
#define MSK32GFX2D_AQDESrcColorBg_RED 0x00FF0000
#define BA_GFX2D_AQDESrcColorBg_ALPHA 0x011B
#define B16GFX2D_AQDESrcColorBg_ALPHA 0x011A
#define LSb32GFX2D_AQDESrcColorBg_ALPHA 24
#define LSb16GFX2D_AQDESrcColorBg_ALPHA 8
#define bGFX2D_AQDESrcColorBg_ALPHA 8
#define MSK32GFX2D_AQDESrcColorBg_ALPHA 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcColorFg 0x011C
#define BA_GFX2D_AQDESrcColorFg_BLUE 0x011C
#define B16GFX2D_AQDESrcColorFg_BLUE 0x011C
#define LSb32GFX2D_AQDESrcColorFg_BLUE 0
#define LSb16GFX2D_AQDESrcColorFg_BLUE 0
#define bGFX2D_AQDESrcColorFg_BLUE 8
#define MSK32GFX2D_AQDESrcColorFg_BLUE 0x000000FF
#define BA_GFX2D_AQDESrcColorFg_GREEN 0x011D
#define B16GFX2D_AQDESrcColorFg_GREEN 0x011C
#define LSb32GFX2D_AQDESrcColorFg_GREEN 8
#define LSb16GFX2D_AQDESrcColorFg_GREEN 8
#define bGFX2D_AQDESrcColorFg_GREEN 8
#define MSK32GFX2D_AQDESrcColorFg_GREEN 0x0000FF00
#define BA_GFX2D_AQDESrcColorFg_RED 0x011E
#define B16GFX2D_AQDESrcColorFg_RED 0x011E
#define LSb32GFX2D_AQDESrcColorFg_RED 16
#define LSb16GFX2D_AQDESrcColorFg_RED 0
#define bGFX2D_AQDESrcColorFg_RED 8
#define MSK32GFX2D_AQDESrcColorFg_RED 0x00FF0000
#define BA_GFX2D_AQDESrcColorFg_ALPHA 0x011F
#define B16GFX2D_AQDESrcColorFg_ALPHA 0x011E
#define LSb32GFX2D_AQDESrcColorFg_ALPHA 24
#define LSb16GFX2D_AQDESrcColorFg_ALPHA 8
#define bGFX2D_AQDESrcColorFg_ALPHA 8
#define MSK32GFX2D_AQDESrcColorFg_ALPHA 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEStretchFactorLow 0x0120
#define BA_GFX2D_AQDEStretchFactorLow_X 0x0120
#define B16GFX2D_AQDEStretchFactorLow_X 0x0120
#define LSb32GFX2D_AQDEStretchFactorLow_X 0
#define LSb16GFX2D_AQDEStretchFactorLow_X 0
#define bGFX2D_AQDEStretchFactorLow_X 31
#define MSK32GFX2D_AQDEStretchFactorLow_X 0x7FFFFFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEStretchFactorHigh 0x0124
#define BA_GFX2D_AQDEStretchFactorHigh_Y 0x0124
#define B16GFX2D_AQDEStretchFactorHigh_Y 0x0124
#define LSb32GFX2D_AQDEStretchFactorHigh_Y 0
#define LSb16GFX2D_AQDEStretchFactorHigh_Y 0
#define bGFX2D_AQDEStretchFactorHigh_Y 31
#define MSK32GFX2D_AQDEStretchFactorHigh_Y 0x7FFFFFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEDestAddress 0x0128
#define BA_GFX2D_AQDEDestAddress_ADDRESS 0x0128
#define B16GFX2D_AQDEDestAddress_ADDRESS 0x0128
#define LSb32GFX2D_AQDEDestAddress_ADDRESS 0
#define LSb16GFX2D_AQDEDestAddress_ADDRESS 0
#define bGFX2D_AQDEDestAddress_ADDRESS 28
#define MSK32GFX2D_AQDEDestAddress_ADDRESS 0x0FFFFFFF
#define BA_GFX2D_AQDEDestAddress_TYPE 0x012B
#define B16GFX2D_AQDEDestAddress_TYPE 0x012A
#define LSb32GFX2D_AQDEDestAddress_TYPE 30
#define LSb16GFX2D_AQDEDestAddress_TYPE 14
#define bGFX2D_AQDEDestAddress_TYPE 2
#define MSK32GFX2D_AQDEDestAddress_TYPE 0xC0000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEDestStride 0x012C
#define BA_GFX2D_AQDEDestStride_STRIDE 0x012C
#define B16GFX2D_AQDEDestStride_STRIDE 0x012C
#define LSb32GFX2D_AQDEDestStride_STRIDE 0
#define LSb16GFX2D_AQDEDestStride_STRIDE 0
#define bGFX2D_AQDEDestStride_STRIDE 18
#define MSK32GFX2D_AQDEDestStride_STRIDE 0x0003FFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEDestRotationConfig 0x0130
#define BA_GFX2D_AQDEDestRotationConfig_WIDTH 0x0130
#define B16GFX2D_AQDEDestRotationConfig_WIDTH 0x0130
#define LSb32GFX2D_AQDEDestRotationConfig_WIDTH 0
#define LSb16GFX2D_AQDEDestRotationConfig_WIDTH 0
#define bGFX2D_AQDEDestRotationConfig_WIDTH 16
#define MSK32GFX2D_AQDEDestRotationConfig_WIDTH 0x0000FFFF
#define BA_GFX2D_AQDEDestRotationConfig_ROTATION 0x0132
#define B16GFX2D_AQDEDestRotationConfig_ROTATION 0x0132
#define LSb32GFX2D_AQDEDestRotationConfig_ROTATION 16
#define LSb16GFX2D_AQDEDestRotationConfig_ROTATION 0
#define bGFX2D_AQDEDestRotationConfig_ROTATION 1
#define MSK32GFX2D_AQDEDestRotationConfig_ROTATION 0x00010000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEDestConfig 0x0134
#define BA_GFX2D_AQDEDestConfig_FORMAT 0x0134
#define B16GFX2D_AQDEDestConfig_FORMAT 0x0134
#define LSb32GFX2D_AQDEDestConfig_FORMAT 0
#define LSb16GFX2D_AQDEDestConfig_FORMAT 0
#define bGFX2D_AQDEDestConfig_FORMAT 5
#define MSK32GFX2D_AQDEDestConfig_FORMAT 0x0000001F
#define BA_GFX2D_AQDEDestConfig_COMMAND 0x0135
#define B16GFX2D_AQDEDestConfig_COMMAND 0x0134
#define LSb32GFX2D_AQDEDestConfig_COMMAND 12
#define LSb16GFX2D_AQDEDestConfig_COMMAND 12
#define bGFX2D_AQDEDestConfig_COMMAND 3
#define MSK32GFX2D_AQDEDestConfig_COMMAND 0x00007000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternAddress 0x0138
#define BA_GFX2D_AQDEPatternAddress_ADDRESS 0x0138
#define B16GFX2D_AQDEPatternAddress_ADDRESS 0x0138
#define LSb32GFX2D_AQDEPatternAddress_ADDRESS 0
#define LSb16GFX2D_AQDEPatternAddress_ADDRESS 0
#define bGFX2D_AQDEPatternAddress_ADDRESS 28
#define MSK32GFX2D_AQDEPatternAddress_ADDRESS 0x0FFFFFFF
#define BA_GFX2D_AQDEPatternAddress_TYPE 0x013B
#define B16GFX2D_AQDEPatternAddress_TYPE 0x013A
#define LSb32GFX2D_AQDEPatternAddress_TYPE 30
#define LSb16GFX2D_AQDEPatternAddress_TYPE 14
#define bGFX2D_AQDEPatternAddress_TYPE 2
#define MSK32GFX2D_AQDEPatternAddress_TYPE 0xC0000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternConfig 0x013C
#define BA_GFX2D_AQDEPatternConfig_FORMAT 0x013C
#define B16GFX2D_AQDEPatternConfig_FORMAT 0x013C
#define LSb32GFX2D_AQDEPatternConfig_FORMAT 0
#define LSb16GFX2D_AQDEPatternConfig_FORMAT 0
#define bGFX2D_AQDEPatternConfig_FORMAT 4
#define MSK32GFX2D_AQDEPatternConfig_FORMAT 0x0000000F
#define BA_GFX2D_AQDEPatternConfig_TYPE 0x013C
#define B16GFX2D_AQDEPatternConfig_TYPE 0x013C
#define LSb32GFX2D_AQDEPatternConfig_TYPE 4
#define LSb16GFX2D_AQDEPatternConfig_TYPE 4
#define bGFX2D_AQDEPatternConfig_TYPE 1
#define MSK32GFX2D_AQDEPatternConfig_TYPE 0x00000010
#define BA_GFX2D_AQDEPatternConfig_COLOR_CONVERT 0x013C
#define B16GFX2D_AQDEPatternConfig_COLOR_CONVERT 0x013C
#define LSb32GFX2D_AQDEPatternConfig_COLOR_CONVERT 5
#define LSb16GFX2D_AQDEPatternConfig_COLOR_CONVERT 5
#define bGFX2D_AQDEPatternConfig_COLOR_CONVERT 1
#define MSK32GFX2D_AQDEPatternConfig_COLOR_CONVERT 0x00000020
#define BA_GFX2D_AQDEPatternConfig_INIT_TRIGGER 0x013C
#define B16GFX2D_AQDEPatternConfig_INIT_TRIGGER 0x013C
#define LSb32GFX2D_AQDEPatternConfig_INIT_TRIGGER 6
#define LSb16GFX2D_AQDEPatternConfig_INIT_TRIGGER 6
#define bGFX2D_AQDEPatternConfig_INIT_TRIGGER 2
#define MSK32GFX2D_AQDEPatternConfig_INIT_TRIGGER 0x000000C0
#define BA_GFX2D_AQDEPatternConfig_ORIGIN_X 0x013E
#define B16GFX2D_AQDEPatternConfig_ORIGIN_X 0x013E
#define LSb32GFX2D_AQDEPatternConfig_ORIGIN_X 17
#define LSb16GFX2D_AQDEPatternConfig_ORIGIN_X 1
#define bGFX2D_AQDEPatternConfig_ORIGIN_X 3
#define MSK32GFX2D_AQDEPatternConfig_ORIGIN_X 0x000E0000
#define BA_GFX2D_AQDEPatternConfig_ORIGIN_Y 0x013E
#define B16GFX2D_AQDEPatternConfig_ORIGIN_Y 0x013E
#define LSb32GFX2D_AQDEPatternConfig_ORIGIN_Y 20
#define LSb16GFX2D_AQDEPatternConfig_ORIGIN_Y 4
#define bGFX2D_AQDEPatternConfig_ORIGIN_Y 3
#define MSK32GFX2D_AQDEPatternConfig_ORIGIN_Y 0x00700000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternLow 0x0140
#define BA_GFX2D_AQDEPatternLow_ROW0 0x0140
#define B16GFX2D_AQDEPatternLow_ROW0 0x0140
#define LSb32GFX2D_AQDEPatternLow_ROW0 0
#define LSb16GFX2D_AQDEPatternLow_ROW0 0
#define bGFX2D_AQDEPatternLow_ROW0 8
#define MSK32GFX2D_AQDEPatternLow_ROW0 0x000000FF
#define BA_GFX2D_AQDEPatternLow_ROW1 0x0141
#define B16GFX2D_AQDEPatternLow_ROW1 0x0140
#define LSb32GFX2D_AQDEPatternLow_ROW1 8
#define LSb16GFX2D_AQDEPatternLow_ROW1 8
#define bGFX2D_AQDEPatternLow_ROW1 8
#define MSK32GFX2D_AQDEPatternLow_ROW1 0x0000FF00
#define BA_GFX2D_AQDEPatternLow_ROW2 0x0142
#define B16GFX2D_AQDEPatternLow_ROW2 0x0142
#define LSb32GFX2D_AQDEPatternLow_ROW2 16
#define LSb16GFX2D_AQDEPatternLow_ROW2 0
#define bGFX2D_AQDEPatternLow_ROW2 8
#define MSK32GFX2D_AQDEPatternLow_ROW2 0x00FF0000
#define BA_GFX2D_AQDEPatternLow_ROW3 0x0143
#define B16GFX2D_AQDEPatternLow_ROW3 0x0142
#define LSb32GFX2D_AQDEPatternLow_ROW3 24
#define LSb16GFX2D_AQDEPatternLow_ROW3 8
#define bGFX2D_AQDEPatternLow_ROW3 8
#define MSK32GFX2D_AQDEPatternLow_ROW3 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternHigh 0x0144
#define BA_GFX2D_AQDEPatternHigh_ROW4 0x0144
#define B16GFX2D_AQDEPatternHigh_ROW4 0x0144
#define LSb32GFX2D_AQDEPatternHigh_ROW4 0
#define LSb16GFX2D_AQDEPatternHigh_ROW4 0
#define bGFX2D_AQDEPatternHigh_ROW4 8
#define MSK32GFX2D_AQDEPatternHigh_ROW4 0x000000FF
#define BA_GFX2D_AQDEPatternHigh_ROW5 0x0145
#define B16GFX2D_AQDEPatternHigh_ROW5 0x0144
#define LSb32GFX2D_AQDEPatternHigh_ROW5 8
#define LSb16GFX2D_AQDEPatternHigh_ROW5 8
#define bGFX2D_AQDEPatternHigh_ROW5 8
#define MSK32GFX2D_AQDEPatternHigh_ROW5 0x0000FF00
#define BA_GFX2D_AQDEPatternHigh_ROW6 0x0146
#define B16GFX2D_AQDEPatternHigh_ROW6 0x0146
#define LSb32GFX2D_AQDEPatternHigh_ROW6 16
#define LSb16GFX2D_AQDEPatternHigh_ROW6 0
#define bGFX2D_AQDEPatternHigh_ROW6 8
#define MSK32GFX2D_AQDEPatternHigh_ROW6 0x00FF0000
#define BA_GFX2D_AQDEPatternHigh_ROW7 0x0147
#define B16GFX2D_AQDEPatternHigh_ROW7 0x0146
#define LSb32GFX2D_AQDEPatternHigh_ROW7 24
#define LSb16GFX2D_AQDEPatternHigh_ROW7 8
#define bGFX2D_AQDEPatternHigh_ROW7 8
#define MSK32GFX2D_AQDEPatternHigh_ROW7 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternMaskLow 0x0148
#define BA_GFX2D_AQDEPatternMaskLow_ROW0 0x0148
#define B16GFX2D_AQDEPatternMaskLow_ROW0 0x0148
#define LSb32GFX2D_AQDEPatternMaskLow_ROW0 0
#define LSb16GFX2D_AQDEPatternMaskLow_ROW0 0
#define bGFX2D_AQDEPatternMaskLow_ROW0 8
#define MSK32GFX2D_AQDEPatternMaskLow_ROW0 0x000000FF
#define BA_GFX2D_AQDEPatternMaskLow_ROW1 0x0149
#define B16GFX2D_AQDEPatternMaskLow_ROW1 0x0148
#define LSb32GFX2D_AQDEPatternMaskLow_ROW1 8
#define LSb16GFX2D_AQDEPatternMaskLow_ROW1 8
#define bGFX2D_AQDEPatternMaskLow_ROW1 8
#define MSK32GFX2D_AQDEPatternMaskLow_ROW1 0x0000FF00
#define BA_GFX2D_AQDEPatternMaskLow_ROW2 0x014A
#define B16GFX2D_AQDEPatternMaskLow_ROW2 0x014A
#define LSb32GFX2D_AQDEPatternMaskLow_ROW2 16
#define LSb16GFX2D_AQDEPatternMaskLow_ROW2 0
#define bGFX2D_AQDEPatternMaskLow_ROW2 8
#define MSK32GFX2D_AQDEPatternMaskLow_ROW2 0x00FF0000
#define BA_GFX2D_AQDEPatternMaskLow_ROW3 0x014B
#define B16GFX2D_AQDEPatternMaskLow_ROW3 0x014A
#define LSb32GFX2D_AQDEPatternMaskLow_ROW3 24
#define LSb16GFX2D_AQDEPatternMaskLow_ROW3 8
#define bGFX2D_AQDEPatternMaskLow_ROW3 8
#define MSK32GFX2D_AQDEPatternMaskLow_ROW3 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternMaskHigh 0x014C
#define BA_GFX2D_AQDEPatternMaskHigh_ROW4 0x014C
#define B16GFX2D_AQDEPatternMaskHigh_ROW4 0x014C
#define LSb32GFX2D_AQDEPatternMaskHigh_ROW4 0
#define LSb16GFX2D_AQDEPatternMaskHigh_ROW4 0
#define bGFX2D_AQDEPatternMaskHigh_ROW4 8
#define MSK32GFX2D_AQDEPatternMaskHigh_ROW4 0x000000FF
#define BA_GFX2D_AQDEPatternMaskHigh_ROW5 0x014D
#define B16GFX2D_AQDEPatternMaskHigh_ROW5 0x014C
#define LSb32GFX2D_AQDEPatternMaskHigh_ROW5 8
#define LSb16GFX2D_AQDEPatternMaskHigh_ROW5 8
#define bGFX2D_AQDEPatternMaskHigh_ROW5 8
#define MSK32GFX2D_AQDEPatternMaskHigh_ROW5 0x0000FF00
#define BA_GFX2D_AQDEPatternMaskHigh_ROW6 0x014E
#define B16GFX2D_AQDEPatternMaskHigh_ROW6 0x014E
#define LSb32GFX2D_AQDEPatternMaskHigh_ROW6 16
#define LSb16GFX2D_AQDEPatternMaskHigh_ROW6 0
#define bGFX2D_AQDEPatternMaskHigh_ROW6 8
#define MSK32GFX2D_AQDEPatternMaskHigh_ROW6 0x00FF0000
#define BA_GFX2D_AQDEPatternMaskHigh_ROW7 0x014F
#define B16GFX2D_AQDEPatternMaskHigh_ROW7 0x014E
#define LSb32GFX2D_AQDEPatternMaskHigh_ROW7 24
#define LSb16GFX2D_AQDEPatternMaskHigh_ROW7 8
#define bGFX2D_AQDEPatternMaskHigh_ROW7 8
#define MSK32GFX2D_AQDEPatternMaskHigh_ROW7 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternBgColor 0x0150
#define BA_GFX2D_AQDEPatternBgColor_BLUE 0x0150
#define B16GFX2D_AQDEPatternBgColor_BLUE 0x0150
#define LSb32GFX2D_AQDEPatternBgColor_BLUE 0
#define LSb16GFX2D_AQDEPatternBgColor_BLUE 0
#define bGFX2D_AQDEPatternBgColor_BLUE 8
#define MSK32GFX2D_AQDEPatternBgColor_BLUE 0x000000FF
#define BA_GFX2D_AQDEPatternBgColor_GREEN 0x0151
#define B16GFX2D_AQDEPatternBgColor_GREEN 0x0150
#define LSb32GFX2D_AQDEPatternBgColor_GREEN 8
#define LSb16GFX2D_AQDEPatternBgColor_GREEN 8
#define bGFX2D_AQDEPatternBgColor_GREEN 8
#define MSK32GFX2D_AQDEPatternBgColor_GREEN 0x0000FF00
#define BA_GFX2D_AQDEPatternBgColor_RED 0x0152
#define B16GFX2D_AQDEPatternBgColor_RED 0x0152
#define LSb32GFX2D_AQDEPatternBgColor_RED 16
#define LSb16GFX2D_AQDEPatternBgColor_RED 0
#define bGFX2D_AQDEPatternBgColor_RED 8
#define MSK32GFX2D_AQDEPatternBgColor_RED 0x00FF0000
#define BA_GFX2D_AQDEPatternBgColor_ALPHA 0x0153
#define B16GFX2D_AQDEPatternBgColor_ALPHA 0x0152
#define LSb32GFX2D_AQDEPatternBgColor_ALPHA 24
#define LSb16GFX2D_AQDEPatternBgColor_ALPHA 8
#define bGFX2D_AQDEPatternBgColor_ALPHA 8
#define MSK32GFX2D_AQDEPatternBgColor_ALPHA 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEPatternFgColor 0x0154
#define BA_GFX2D_AQDEPatternFgColor_BLUE 0x0154
#define B16GFX2D_AQDEPatternFgColor_BLUE 0x0154
#define LSb32GFX2D_AQDEPatternFgColor_BLUE 0
#define LSb16GFX2D_AQDEPatternFgColor_BLUE 0
#define bGFX2D_AQDEPatternFgColor_BLUE 8
#define MSK32GFX2D_AQDEPatternFgColor_BLUE 0x000000FF
#define BA_GFX2D_AQDEPatternFgColor_GREEN 0x0155
#define B16GFX2D_AQDEPatternFgColor_GREEN 0x0154
#define LSb32GFX2D_AQDEPatternFgColor_GREEN 8
#define LSb16GFX2D_AQDEPatternFgColor_GREEN 8
#define bGFX2D_AQDEPatternFgColor_GREEN 8
#define MSK32GFX2D_AQDEPatternFgColor_GREEN 0x0000FF00
#define BA_GFX2D_AQDEPatternFgColor_RED 0x0156
#define B16GFX2D_AQDEPatternFgColor_RED 0x0156
#define LSb32GFX2D_AQDEPatternFgColor_RED 16
#define LSb16GFX2D_AQDEPatternFgColor_RED 0
#define bGFX2D_AQDEPatternFgColor_RED 8
#define MSK32GFX2D_AQDEPatternFgColor_RED 0x00FF0000
#define BA_GFX2D_AQDEPatternFgColor_ALPHA 0x0157
#define B16GFX2D_AQDEPatternFgColor_ALPHA 0x0156
#define LSb32GFX2D_AQDEPatternFgColor_ALPHA 24
#define LSb16GFX2D_AQDEPatternFgColor_ALPHA 8
#define bGFX2D_AQDEPatternFgColor_ALPHA 8
#define MSK32GFX2D_AQDEPatternFgColor_ALPHA 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEFilterBlit 0x0158
#define BA_GFX2D_AQDEFilterBlit_KERNEL_SIZE 0x0158
#define B16GFX2D_AQDEFilterBlit_KERNEL_SIZE 0x0158
#define LSb32GFX2D_AQDEFilterBlit_KERNEL_SIZE 0
#define LSb16GFX2D_AQDEFilterBlit_KERNEL_SIZE 0
#define bGFX2D_AQDEFilterBlit_KERNEL_SIZE 4
#define MSK32GFX2D_AQDEFilterBlit_KERNEL_SIZE 0x0000000F
#define BA_GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE 0x0158
#define B16GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE 0x0158
#define LSb32GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE 4
#define LSb16GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE 4
#define bGFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE 1
#define MSK32GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE 0x00000010
#define BA_GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE 0x0158
#define B16GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE 0x0158
#define LSb32GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE 5
#define LSb16GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE 5
#define bGFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE 1
#define MSK32GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE 0x00000020
#define BA_GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE 0x0158
#define B16GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE 0x0158
#define LSb32GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE 6
#define LSb16GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE 6
#define bGFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE 1
#define MSK32GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE 0x00000040
#define BA_GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE 0x0158
#define B16GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE 0x0158
#define LSb32GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE 7
#define LSb16GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE 7
#define bGFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE 1
#define MSK32GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE 0x00000080
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDERop 0x015C
#define BA_GFX2D_AQDERop_ROP_FG 0x015C
#define B16GFX2D_AQDERop_ROP_FG 0x015C
#define LSb32GFX2D_AQDERop_ROP_FG 0
#define LSb16GFX2D_AQDERop_ROP_FG 0
#define bGFX2D_AQDERop_ROP_FG 8
#define MSK32GFX2D_AQDERop_ROP_FG 0x000000FF
#define BA_GFX2D_AQDERop_ROP_BG 0x015D
#define B16GFX2D_AQDERop_ROP_BG 0x015C
#define LSb32GFX2D_AQDERop_ROP_BG 8
#define LSb16GFX2D_AQDERop_ROP_BG 8
#define bGFX2D_AQDERop_ROP_BG 8
#define MSK32GFX2D_AQDERop_ROP_BG 0x0000FF00
#define BA_GFX2D_AQDERop_TYPE 0x015E
#define B16GFX2D_AQDERop_TYPE 0x015E
#define LSb32GFX2D_AQDERop_TYPE 20
#define LSb16GFX2D_AQDERop_TYPE 4
#define bGFX2D_AQDERop_TYPE 2
#define MSK32GFX2D_AQDERop_TYPE 0x00300000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEClipTopLeft 0x0160
#define BA_GFX2D_AQDEClipTopLeft_X 0x0160
#define B16GFX2D_AQDEClipTopLeft_X 0x0160
#define LSb32GFX2D_AQDEClipTopLeft_X 0
#define LSb16GFX2D_AQDEClipTopLeft_X 0
#define bGFX2D_AQDEClipTopLeft_X 15
#define MSK32GFX2D_AQDEClipTopLeft_X 0x00007FFF
#define BA_GFX2D_AQDEClipTopLeft_Y 0x0162
#define B16GFX2D_AQDEClipTopLeft_Y 0x0162
#define LSb32GFX2D_AQDEClipTopLeft_Y 16
#define LSb16GFX2D_AQDEClipTopLeft_Y 0
#define bGFX2D_AQDEClipTopLeft_Y 15
#define MSK32GFX2D_AQDEClipTopLeft_Y 0x7FFF0000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEClipBottomRight 0x0164
#define BA_GFX2D_AQDEClipBottomRight_X 0x0164
#define B16GFX2D_AQDEClipBottomRight_X 0x0164
#define LSb32GFX2D_AQDEClipBottomRight_X 0
#define LSb16GFX2D_AQDEClipBottomRight_X 0
#define bGFX2D_AQDEClipBottomRight_X 15
#define MSK32GFX2D_AQDEClipBottomRight_X 0x00007FFF
#define BA_GFX2D_AQDEClipBottomRight_Y 0x0166
#define B16GFX2D_AQDEClipBottomRight_Y 0x0166
#define LSb32GFX2D_AQDEClipBottomRight_Y 16
#define LSb16GFX2D_AQDEClipBottomRight_Y 0
#define bGFX2D_AQDEClipBottomRight_Y 15
#define MSK32GFX2D_AQDEClipBottomRight_Y 0x7FFF0000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEClearByteMask 0x0168
#define BA_GFX2D_AQDEClearByteMask_VALUE 0x0168
#define B16GFX2D_AQDEClearByteMask_VALUE 0x0168
#define LSb32GFX2D_AQDEClearByteMask_VALUE 0
#define LSb16GFX2D_AQDEClearByteMask_VALUE 0
#define bGFX2D_AQDEClearByteMask_VALUE 8
#define MSK32GFX2D_AQDEClearByteMask_VALUE 0x000000FF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEClearPixelValueLow 0x016C
#define BA_GFX2D_AQDEClearPixelValueLow_VALUE 0x016C
#define B16GFX2D_AQDEClearPixelValueLow_VALUE 0x016C
#define LSb32GFX2D_AQDEClearPixelValueLow_VALUE 0
#define LSb16GFX2D_AQDEClearPixelValueLow_VALUE 0
#define bGFX2D_AQDEClearPixelValueLow_VALUE 32
#define MSK32GFX2D_AQDEClearPixelValueLow_VALUE 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEClearPixelValueHigh 0x0170
#define BA_GFX2D_AQDEClearPixelValueHigh_VALUE 0x0170
#define B16GFX2D_AQDEClearPixelValueHigh_VALUE 0x0170
#define LSb32GFX2D_AQDEClearPixelValueHigh_VALUE 0
#define LSb16GFX2D_AQDEClearPixelValueHigh_VALUE 0
#define bGFX2D_AQDEClearPixelValueHigh_VALUE 32
#define MSK32GFX2D_AQDEClearPixelValueHigh_VALUE 0xFFFFFFFF
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDESrcOriginFraction 0x0174
#define BA_GFX2D_AQDESrcOriginFraction_X 0x0174
#define B16GFX2D_AQDESrcOriginFraction_X 0x0174
#define LSb32GFX2D_AQDESrcOriginFraction_X 0
#define LSb16GFX2D_AQDESrcOriginFraction_X 0
#define bGFX2D_AQDESrcOriginFraction_X 16
#define MSK32GFX2D_AQDESrcOriginFraction_X 0x0000FFFF
#define BA_GFX2D_AQDESrcOriginFraction_Y 0x0176
#define B16GFX2D_AQDESrcOriginFraction_Y 0x0176
#define LSb32GFX2D_AQDESrcOriginFraction_Y 16
#define LSb16GFX2D_AQDESrcOriginFraction_Y 0
#define bGFX2D_AQDESrcOriginFraction_Y 16
#define MSK32GFX2D_AQDESrcOriginFraction_Y 0xFFFF0000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEAlphaControl 0x0178
#define BA_GFX2D_AQDEAlphaControl_ENABLE 0x0178
#define B16GFX2D_AQDEAlphaControl_ENABLE 0x0178
#define LSb32GFX2D_AQDEAlphaControl_ENABLE 0
#define LSb16GFX2D_AQDEAlphaControl_ENABLE 0
#define bGFX2D_AQDEAlphaControl_ENABLE 1
#define MSK32GFX2D_AQDEAlphaControl_ENABLE 0x00000001
#define BA_GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA 0x017A
#define B16GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA 0x017A
#define LSb32GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA 16
#define LSb16GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA 0
#define bGFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA 8
#define MSK32GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA 0x00FF0000
#define BA_GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA 0x017B
#define B16GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA 0x017A
#define LSb32GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA 24
#define LSb16GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA 8
#define bGFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA 8
#define MSK32GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA 0xFF000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEAlphaModes 0x017C
#define BA_GFX2D_AQDEAlphaModes_SRC_ALPHA 0x017C
#define B16GFX2D_AQDEAlphaModes_SRC_ALPHA 0x017C
#define LSb32GFX2D_AQDEAlphaModes_SRC_ALPHA 0
#define LSb16GFX2D_AQDEAlphaModes_SRC_ALPHA 0
#define bGFX2D_AQDEAlphaModes_SRC_ALPHA 1
#define MSK32GFX2D_AQDEAlphaModes_SRC_ALPHA 0x00000001
#define BA_GFX2D_AQDEAlphaModes_DST_ALPHA 0x017C
#define B16GFX2D_AQDEAlphaModes_DST_ALPHA 0x017C
#define LSb32GFX2D_AQDEAlphaModes_DST_ALPHA 4
#define LSb16GFX2D_AQDEAlphaModes_DST_ALPHA 4
#define bGFX2D_AQDEAlphaModes_DST_ALPHA 1
#define MSK32GFX2D_AQDEAlphaModes_DST_ALPHA 0x00000010
#define BA_GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA 0x017D
#define B16GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA 0x017C
#define LSb32GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA 8
#define LSb16GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA 8
#define bGFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA 2
#define MSK32GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA 0x00000300
#define BA_GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA 0x017D
#define B16GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA 0x017C
#define LSb32GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA 12
#define LSb16GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA 12
#define bGFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA 2
#define MSK32GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA 0x00003000
#define BA_GFX2D_AQDEAlphaModes_SRC_COLOR 0x017E
#define B16GFX2D_AQDEAlphaModes_SRC_COLOR 0x017E
#define LSb32GFX2D_AQDEAlphaModes_SRC_COLOR 16
#define LSb16GFX2D_AQDEAlphaModes_SRC_COLOR 0
#define bGFX2D_AQDEAlphaModes_SRC_COLOR 1
#define MSK32GFX2D_AQDEAlphaModes_SRC_COLOR 0x00010000
#define BA_GFX2D_AQDEAlphaModes_DST_COLOR 0x017E
#define B16GFX2D_AQDEAlphaModes_DST_COLOR 0x017E
#define LSb32GFX2D_AQDEAlphaModes_DST_COLOR 20
#define LSb16GFX2D_AQDEAlphaModes_DST_COLOR 4
#define bGFX2D_AQDEAlphaModes_DST_COLOR 1
#define MSK32GFX2D_AQDEAlphaModes_DST_COLOR 0x00100000
#define BA_GFX2D_AQDEAlphaModes_SRC_BLENDING 0x017F
#define B16GFX2D_AQDEAlphaModes_SRC_BLENDING 0x017E
#define LSb32GFX2D_AQDEAlphaModes_SRC_BLENDING 24
#define LSb16GFX2D_AQDEAlphaModes_SRC_BLENDING 8
#define bGFX2D_AQDEAlphaModes_SRC_BLENDING 2
#define MSK32GFX2D_AQDEAlphaModes_SRC_BLENDING 0x03000000
#define BA_GFX2D_AQDEAlphaModes_DST_BLENDING 0x017F
#define B16GFX2D_AQDEAlphaModes_DST_BLENDING 0x017E
#define LSb32GFX2D_AQDEAlphaModes_DST_BLENDING 28
#define LSb16GFX2D_AQDEAlphaModes_DST_BLENDING 12
#define bGFX2D_AQDEAlphaModes_DST_BLENDING 2
#define MSK32GFX2D_AQDEAlphaModes_DST_BLENDING 0x30000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEWriteBackControl 0x0180
#define BA_GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE 0x0183
#define B16GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE 0x0182
#define LSb32GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE 28
#define LSb16GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE 12
#define bGFX2D_AQDEWriteBackControl_WRITE_BACK_MODE 2
#define MSK32GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE 0x30000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQ2DSpecialControl 0x0184
#define BA_GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE 0x0184
#define B16GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE 0x0184
#define LSb32GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE 0
#define LSb16GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE 0
#define bGFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE 1
#define MSK32GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE 0x00000001
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQCmdBufferAddr 0x0628
#define BA_GFX2D_AQCmdBufferAddr_ADDRESS 0x0628
#define B16GFX2D_AQCmdBufferAddr_ADDRESS 0x0628
#define LSb32GFX2D_AQCmdBufferAddr_ADDRESS 0
#define LSb16GFX2D_AQCmdBufferAddr_ADDRESS 0
#define bGFX2D_AQCmdBufferAddr_ADDRESS 28
#define MSK32GFX2D_AQCmdBufferAddr_ADDRESS 0x0FFFFFFF
#define BA_GFX2D_AQCmdBufferAddr_TYPE 0x062B
#define B16GFX2D_AQCmdBufferAddr_TYPE 0x062A
#define LSb32GFX2D_AQCmdBufferAddr_TYPE 28
#define LSb16GFX2D_AQCmdBufferAddr_TYPE 12
#define bGFX2D_AQCmdBufferAddr_TYPE 2
#define MSK32GFX2D_AQCmdBufferAddr_TYPE 0x30000000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQCmdBufferCtrl 0x062C
#define BA_GFX2D_AQCmdBufferCtrl_PREFETCH 0x062C
#define B16GFX2D_AQCmdBufferCtrl_PREFETCH 0x062C
#define LSb32GFX2D_AQCmdBufferCtrl_PREFETCH 0
#define LSb16GFX2D_AQCmdBufferCtrl_PREFETCH 0
#define bGFX2D_AQCmdBufferCtrl_PREFETCH 16
#define MSK32GFX2D_AQCmdBufferCtrl_PREFETCH 0x0000FFFF
#define BA_GFX2D_AQCmdBufferCtrl_ENABLE 0x062E
#define B16GFX2D_AQCmdBufferCtrl_ENABLE 0x062E
#define LSb32GFX2D_AQCmdBufferCtrl_ENABLE 16
#define LSb16GFX2D_AQCmdBufferCtrl_ENABLE 0
#define bGFX2D_AQCmdBufferCtrl_ENABLE 1
#define MSK32GFX2D_AQCmdBufferCtrl_ENABLE 0x00010000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEFilterKernel 0x3000
#define BA_GFX2D_AQDEFilterKernel_COEFFICIENT0 0x3000
#define B16GFX2D_AQDEFilterKernel_COEFFICIENT0 0x3000
#define LSb32GFX2D_AQDEFilterKernel_COEFFICIENT0 0
#define LSb16GFX2D_AQDEFilterKernel_COEFFICIENT0 0
#define bGFX2D_AQDEFilterKernel_COEFFICIENT0 16
#define MSK32GFX2D_AQDEFilterKernel_COEFFICIENT0 0x0000FFFF
#define BA_GFX2D_AQDEFilterKernel_COEFFICIENT1 0x3002
#define B16GFX2D_AQDEFilterKernel_COEFFICIENT1 0x3002
#define LSb32GFX2D_AQDEFilterKernel_COEFFICIENT1 16
#define LSb16GFX2D_AQDEFilterKernel_COEFFICIENT1 0
#define bGFX2D_AQDEFilterKernel_COEFFICIENT1 16
#define MSK32GFX2D_AQDEFilterKernel_COEFFICIENT1 0xFFFF0000
///////////////////////////////////////////////////////////
#define RA_GFX2D_AQDEIndexColorTable 0x3400
#define BA_GFX2D_AQDEIndexColorTable_BLUE 0x3400
#define B16GFX2D_AQDEIndexColorTable_BLUE 0x3400
#define LSb32GFX2D_AQDEIndexColorTable_BLUE 0
#define LSb16GFX2D_AQDEIndexColorTable_BLUE 0
#define bGFX2D_AQDEIndexColorTable_BLUE 8
#define MSK32GFX2D_AQDEIndexColorTable_BLUE 0x000000FF
#define BA_GFX2D_AQDEIndexColorTable_GREEN 0x3401
#define B16GFX2D_AQDEIndexColorTable_GREEN 0x3400
#define LSb32GFX2D_AQDEIndexColorTable_GREEN 8
#define LSb16GFX2D_AQDEIndexColorTable_GREEN 8
#define bGFX2D_AQDEIndexColorTable_GREEN 8
#define MSK32GFX2D_AQDEIndexColorTable_GREEN 0x0000FF00
#define BA_GFX2D_AQDEIndexColorTable_RED 0x3402
#define B16GFX2D_AQDEIndexColorTable_RED 0x3402
#define LSb32GFX2D_AQDEIndexColorTable_RED 16
#define LSb16GFX2D_AQDEIndexColorTable_RED 0
#define bGFX2D_AQDEIndexColorTable_RED 8
#define MSK32GFX2D_AQDEIndexColorTable_RED 0x00FF0000
#define BA_GFX2D_AQDEIndexColorTable_ALPHA 0x3403
#define B16GFX2D_AQDEIndexColorTable_ALPHA 0x3402
#define LSb32GFX2D_AQDEIndexColorTable_ALPHA 24
#define LSb16GFX2D_AQDEIndexColorTable_ALPHA 8
#define bGFX2D_AQDEIndexColorTable_ALPHA 8
#define MSK32GFX2D_AQDEIndexColorTable_ALPHA 0xFF000000
///////////////////////////////////////////////////////////
typedef struct SIE_GFX2D {
///////////////////////////////////////////////////////////
UNSG8 RSVDx0 [16];
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQIntrAcknowledge_INTR_VEC(r32) _BFGET_(r32,31, 0)
#define SET32GFX2D_AQIntrAcknowledge_INTR_VEC(r32,v) _BFSET_(r32,31, 0,v)
#define w32GFX2D_AQIntrAcknowledge {\
UNSG32 uAQIntrAcknowledge_INTR_VEC : 32;\
}
union { UNSG32 u32GFX2D_AQIntrAcknowledge;
struct w32GFX2D_AQIntrAcknowledge;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQIntrEnbl_INTR_ENBL_VEC(r32) _BFGET_(r32,31, 0)
#define SET32GFX2D_AQIntrEnbl_INTR_ENBL_VEC(r32,v) _BFSET_(r32,31, 0,v)
#define w32GFX2D_AQIntrEnbl {\
UNSG32 uAQIntrEnbl_INTR_ENBL_VEC : 32;\
}
union { UNSG32 u32GFX2D_AQIntrEnbl;
struct w32GFX2D_AQIntrEnbl;
};
///////////////////////////////////////////////////////////
UNSG8 RSVDx18 [232];
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcAddress_ADDRESS(r32) _BFGET_(r32,27, 0)
#define SET32GFX2D_AQDESrcAddress_ADDRESS(r32,v) _BFSET_(r32,27, 0,v)
#define GET32GFX2D_AQDESrcAddress_TYPE(r32) _BFGET_(r32,31,30)
#define SET32GFX2D_AQDESrcAddress_TYPE(r32,v) _BFSET_(r32,31,30,v)
#define GET16GFX2D_AQDESrcAddress_TYPE(r16) _BFGET_(r16,15,14)
#define SET16GFX2D_AQDESrcAddress_TYPE(r16,v) _BFSET_(r16,15,14,v)
#define w32GFX2D_AQDESrcAddress {\
UNSG32 uAQDESrcAddress_ADDRESS : 28;\
UNSG32 RSVDx100_b28 : 2;\
UNSG32 uAQDESrcAddress_TYPE : 2;\
}
union { UNSG32 u32GFX2D_AQDESrcAddress;
struct w32GFX2D_AQDESrcAddress;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcStride_STRIDE(r32) _BFGET_(r32,17, 0)
#define SET32GFX2D_AQDESrcStride_STRIDE(r32,v) _BFSET_(r32,17, 0,v)
#define w32GFX2D_AQDESrcStride {\
UNSG32 uAQDESrcStride_STRIDE : 18;\
UNSG32 RSVDx104_b18 : 14;\
}
union { UNSG32 u32GFX2D_AQDESrcStride;
struct w32GFX2D_AQDESrcStride;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcRotationConfig_WIDTH(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQDESrcRotationConfig_WIDTH(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQDESrcRotationConfig_WIDTH(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcRotationConfig_WIDTH(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQDESrcRotationConfig_ROTATION(r32) _BFGET_(r32,16,16)
#define SET32GFX2D_AQDESrcRotationConfig_ROTATION(r32,v) _BFSET_(r32,16,16,v)
#define GET16GFX2D_AQDESrcRotationConfig_ROTATION(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQDESrcRotationConfig_ROTATION(r16,v) _BFSET_(r16, 0, 0,v)
#define w32GFX2D_AQDESrcRotationConfig {\
UNSG32 uAQDESrcRotationConfig_WIDTH : 16;\
UNSG32 uAQDESrcRotationConfig_ROTATION : 1;\
UNSG32 RSVDx108_b17 : 15;\
}
union { UNSG32 u32GFX2D_AQDESrcRotationConfig;
struct w32GFX2D_AQDESrcRotationConfig;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcConfig_FORMAT(r32) _BFGET_(r32, 3, 0)
#define SET32GFX2D_AQDESrcConfig_FORMAT(r32,v) _BFSET_(r32, 3, 0,v)
#define GET16GFX2D_AQDESrcConfig_FORMAT(r16) _BFGET_(r16, 3, 0)
#define SET16GFX2D_AQDESrcConfig_FORMAT(r16,v) _BFSET_(r16, 3, 0,v)
#define GET32GFX2D_AQDESrcConfig_TRANSPARENCY(r32) _BFGET_(r32, 5, 4)
#define SET32GFX2D_AQDESrcConfig_TRANSPARENCY(r32,v) _BFSET_(r32, 5, 4,v)
#define GET16GFX2D_AQDESrcConfig_TRANSPARENCY(r16) _BFGET_(r16, 5, 4)
#define SET16GFX2D_AQDESrcConfig_TRANSPARENCY(r16,v) _BFSET_(r16, 5, 4,v)
#define GET32GFX2D_AQDESrcConfig_SRC_RELATIVE(r32) _BFGET_(r32, 6, 6)
#define SET32GFX2D_AQDESrcConfig_SRC_RELATIVE(r32,v) _BFSET_(r32, 6, 6,v)
#define GET16GFX2D_AQDESrcConfig_SRC_RELATIVE(r16) _BFGET_(r16, 6, 6)
#define SET16GFX2D_AQDESrcConfig_SRC_RELATIVE(r16,v) _BFSET_(r16, 6, 6,v)
#define GET32GFX2D_AQDESrcConfig_LOCATION(r32) _BFGET_(r32, 8, 8)
#define SET32GFX2D_AQDESrcConfig_LOCATION(r32,v) _BFSET_(r32, 8, 8,v)
#define GET16GFX2D_AQDESrcConfig_LOCATION(r16) _BFGET_(r16, 8, 8)
#define SET16GFX2D_AQDESrcConfig_LOCATION(r16,v) _BFSET_(r16, 8, 8,v)
#define GET32GFX2D_AQDESrcConfig_PACK(r32) _BFGET_(r32,13,12)
#define SET32GFX2D_AQDESrcConfig_PACK(r32,v) _BFSET_(r32,13,12,v)
#define GET16GFX2D_AQDESrcConfig_PACK(r16) _BFGET_(r16,13,12)
#define SET16GFX2D_AQDESrcConfig_PACK(r16,v) _BFSET_(r16,13,12,v)
#define GET32GFX2D_AQDESrcConfig_MONO_TRANSPARENCY(r32) _BFGET_(r32,15,15)
#define SET32GFX2D_AQDESrcConfig_MONO_TRANSPARENCY(r32,v) _BFSET_(r32,15,15,v)
#define GET16GFX2D_AQDESrcConfig_MONO_TRANSPARENCY(r16) _BFGET_(r16,15,15)
#define SET16GFX2D_AQDESrcConfig_MONO_TRANSPARENCY(r16,v) _BFSET_(r16,15,15,v)
#define GET32GFX2D_AQDESrcConfig_COLOR_CONVERT(r32) _BFGET_(r32,16,16)
#define SET32GFX2D_AQDESrcConfig_COLOR_CONVERT(r32,v) _BFSET_(r32,16,16,v)
#define GET16GFX2D_AQDESrcConfig_COLOR_CONVERT(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQDESrcConfig_COLOR_CONVERT(r16,v) _BFSET_(r16, 0, 0,v)
#define w32GFX2D_AQDESrcConfig {\
UNSG32 uAQDESrcConfig_FORMAT : 4;\
UNSG32 uAQDESrcConfig_TRANSPARENCY : 2;\
UNSG32 uAQDESrcConfig_SRC_RELATIVE : 1;\
UNSG32 RSVDx10C_b7 : 1;\
UNSG32 uAQDESrcConfig_LOCATION : 1;\
UNSG32 RSVDx10C_b9 : 3;\
UNSG32 uAQDESrcConfig_PACK : 2;\
UNSG32 RSVDx10C_b14 : 1;\
UNSG32 uAQDESrcConfig_MONO_TRANSPARENCY : 1;\
UNSG32 uAQDESrcConfig_COLOR_CONVERT : 1;\
UNSG32 RSVDx10C_b17 : 15;\
}
union { UNSG32 u32GFX2D_AQDESrcConfig;
struct w32GFX2D_AQDESrcConfig;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcOrigin_X(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQDESrcOrigin_X(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQDESrcOrigin_X(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcOrigin_X(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQDESrcOrigin_Y(r32) _BFGET_(r32,31,16)
#define SET32GFX2D_AQDESrcOrigin_Y(r32,v) _BFSET_(r32,31,16,v)
#define GET16GFX2D_AQDESrcOrigin_Y(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcOrigin_Y(r16,v) _BFSET_(r16,15, 0,v)
#define w32GFX2D_AQDESrcOrigin {\
UNSG32 uAQDESrcOrigin_X : 16;\
UNSG32 uAQDESrcOrigin_Y : 16;\
}
union { UNSG32 u32GFX2D_AQDESrcOrigin;
struct w32GFX2D_AQDESrcOrigin;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcSize_X(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQDESrcSize_X(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQDESrcSize_X(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcSize_X(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQDESrcSize_Y(r32) _BFGET_(r32,31,16)
#define SET32GFX2D_AQDESrcSize_Y(r32,v) _BFSET_(r32,31,16,v)
#define GET16GFX2D_AQDESrcSize_Y(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcSize_Y(r16,v) _BFSET_(r16,15, 0,v)
#define w32GFX2D_AQDESrcSize {\
UNSG32 uAQDESrcSize_X : 16;\
UNSG32 uAQDESrcSize_Y : 16;\
}
union { UNSG32 u32GFX2D_AQDESrcSize;
struct w32GFX2D_AQDESrcSize;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcColorBg_BLUE(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDESrcColorBg_BLUE(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDESrcColorBg_BLUE(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDESrcColorBg_BLUE(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDESrcColorBg_GREEN(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDESrcColorBg_GREEN(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDESrcColorBg_GREEN(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDESrcColorBg_GREEN(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDESrcColorBg_RED(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDESrcColorBg_RED(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDESrcColorBg_RED(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDESrcColorBg_RED(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDESrcColorBg_ALPHA(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDESrcColorBg_ALPHA(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDESrcColorBg_ALPHA(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDESrcColorBg_ALPHA(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDESrcColorBg {\
UNSG32 uAQDESrcColorBg_BLUE : 8;\
UNSG32 uAQDESrcColorBg_GREEN : 8;\
UNSG32 uAQDESrcColorBg_RED : 8;\
UNSG32 uAQDESrcColorBg_ALPHA : 8;\
}
union { UNSG32 u32GFX2D_AQDESrcColorBg;
struct w32GFX2D_AQDESrcColorBg;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcColorFg_BLUE(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDESrcColorFg_BLUE(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDESrcColorFg_BLUE(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDESrcColorFg_BLUE(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDESrcColorFg_GREEN(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDESrcColorFg_GREEN(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDESrcColorFg_GREEN(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDESrcColorFg_GREEN(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDESrcColorFg_RED(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDESrcColorFg_RED(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDESrcColorFg_RED(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDESrcColorFg_RED(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDESrcColorFg_ALPHA(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDESrcColorFg_ALPHA(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDESrcColorFg_ALPHA(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDESrcColorFg_ALPHA(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDESrcColorFg {\
UNSG32 uAQDESrcColorFg_BLUE : 8;\
UNSG32 uAQDESrcColorFg_GREEN : 8;\
UNSG32 uAQDESrcColorFg_RED : 8;\
UNSG32 uAQDESrcColorFg_ALPHA : 8;\
}
union { UNSG32 u32GFX2D_AQDESrcColorFg;
struct w32GFX2D_AQDESrcColorFg;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEStretchFactorLow_X(r32) _BFGET_(r32,30, 0)
#define SET32GFX2D_AQDEStretchFactorLow_X(r32,v) _BFSET_(r32,30, 0,v)
#define w32GFX2D_AQDEStretchFactorLow {\
UNSG32 uAQDEStretchFactorLow_X : 31;\
UNSG32 RSVDx120_b31 : 1;\
}
union { UNSG32 u32GFX2D_AQDEStretchFactorLow;
struct w32GFX2D_AQDEStretchFactorLow;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEStretchFactorHigh_Y(r32) _BFGET_(r32,30, 0)
#define SET32GFX2D_AQDEStretchFactorHigh_Y(r32,v) _BFSET_(r32,30, 0,v)
#define w32GFX2D_AQDEStretchFactorHigh {\
UNSG32 uAQDEStretchFactorHigh_Y : 31;\
UNSG32 RSVDx124_b31 : 1;\
}
union { UNSG32 u32GFX2D_AQDEStretchFactorHigh;
struct w32GFX2D_AQDEStretchFactorHigh;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEDestAddress_ADDRESS(r32) _BFGET_(r32,27, 0)
#define SET32GFX2D_AQDEDestAddress_ADDRESS(r32,v) _BFSET_(r32,27, 0,v)
#define GET32GFX2D_AQDEDestAddress_TYPE(r32) _BFGET_(r32,31,30)
#define SET32GFX2D_AQDEDestAddress_TYPE(r32,v) _BFSET_(r32,31,30,v)
#define GET16GFX2D_AQDEDestAddress_TYPE(r16) _BFGET_(r16,15,14)
#define SET16GFX2D_AQDEDestAddress_TYPE(r16,v) _BFSET_(r16,15,14,v)
#define w32GFX2D_AQDEDestAddress {\
UNSG32 uAQDEDestAddress_ADDRESS : 28;\
UNSG32 RSVDx128_b28 : 2;\
UNSG32 uAQDEDestAddress_TYPE : 2;\
}
union { UNSG32 u32GFX2D_AQDEDestAddress;
struct w32GFX2D_AQDEDestAddress;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEDestStride_STRIDE(r32) _BFGET_(r32,17, 0)
#define SET32GFX2D_AQDEDestStride_STRIDE(r32,v) _BFSET_(r32,17, 0,v)
#define w32GFX2D_AQDEDestStride {\
UNSG32 uAQDEDestStride_STRIDE : 18;\
UNSG32 RSVDx12C_b18 : 14;\
}
union { UNSG32 u32GFX2D_AQDEDestStride;
struct w32GFX2D_AQDEDestStride;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEDestRotationConfig_WIDTH(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQDEDestRotationConfig_WIDTH(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQDEDestRotationConfig_WIDTH(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDEDestRotationConfig_WIDTH(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQDEDestRotationConfig_ROTATION(r32) _BFGET_(r32,16,16)
#define SET32GFX2D_AQDEDestRotationConfig_ROTATION(r32,v) _BFSET_(r32,16,16,v)
#define GET16GFX2D_AQDEDestRotationConfig_ROTATION(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQDEDestRotationConfig_ROTATION(r16,v) _BFSET_(r16, 0, 0,v)
#define w32GFX2D_AQDEDestRotationConfig {\
UNSG32 uAQDEDestRotationConfig_WIDTH : 16;\
UNSG32 uAQDEDestRotationConfig_ROTATION : 1;\
UNSG32 RSVDx130_b17 : 15;\
}
union { UNSG32 u32GFX2D_AQDEDestRotationConfig;
struct w32GFX2D_AQDEDestRotationConfig;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEDestConfig_FORMAT(r32) _BFGET_(r32, 4, 0)
#define SET32GFX2D_AQDEDestConfig_FORMAT(r32,v) _BFSET_(r32, 4, 0,v)
#define GET16GFX2D_AQDEDestConfig_FORMAT(r16) _BFGET_(r16, 4, 0)
#define SET16GFX2D_AQDEDestConfig_FORMAT(r16,v) _BFSET_(r16, 4, 0,v)
#define GET32GFX2D_AQDEDestConfig_COMMAND(r32) _BFGET_(r32,14,12)
#define SET32GFX2D_AQDEDestConfig_COMMAND(r32,v) _BFSET_(r32,14,12,v)
#define GET16GFX2D_AQDEDestConfig_COMMAND(r16) _BFGET_(r16,14,12)
#define SET16GFX2D_AQDEDestConfig_COMMAND(r16,v) _BFSET_(r16,14,12,v)
#define w32GFX2D_AQDEDestConfig {\
UNSG32 uAQDEDestConfig_FORMAT : 5;\
UNSG32 RSVDx134_b5 : 7;\
UNSG32 uAQDEDestConfig_COMMAND : 3;\
UNSG32 RSVDx134_b15 : 17;\
}
union { UNSG32 u32GFX2D_AQDEDestConfig;
struct w32GFX2D_AQDEDestConfig;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternAddress_ADDRESS(r32) _BFGET_(r32,27, 0)
#define SET32GFX2D_AQDEPatternAddress_ADDRESS(r32,v) _BFSET_(r32,27, 0,v)
#define GET32GFX2D_AQDEPatternAddress_TYPE(r32) _BFGET_(r32,31,30)
#define SET32GFX2D_AQDEPatternAddress_TYPE(r32,v) _BFSET_(r32,31,30,v)
#define GET16GFX2D_AQDEPatternAddress_TYPE(r16) _BFGET_(r16,15,14)
#define SET16GFX2D_AQDEPatternAddress_TYPE(r16,v) _BFSET_(r16,15,14,v)
#define w32GFX2D_AQDEPatternAddress {\
UNSG32 uAQDEPatternAddress_ADDRESS : 28;\
UNSG32 RSVDx138_b28 : 2;\
UNSG32 uAQDEPatternAddress_TYPE : 2;\
}
union { UNSG32 u32GFX2D_AQDEPatternAddress;
struct w32GFX2D_AQDEPatternAddress;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternConfig_FORMAT(r32) _BFGET_(r32, 3, 0)
#define SET32GFX2D_AQDEPatternConfig_FORMAT(r32,v) _BFSET_(r32, 3, 0,v)
#define GET16GFX2D_AQDEPatternConfig_FORMAT(r16) _BFGET_(r16, 3, 0)
#define SET16GFX2D_AQDEPatternConfig_FORMAT(r16,v) _BFSET_(r16, 3, 0,v)
#define GET32GFX2D_AQDEPatternConfig_TYPE(r32) _BFGET_(r32, 4, 4)
#define SET32GFX2D_AQDEPatternConfig_TYPE(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16GFX2D_AQDEPatternConfig_TYPE(r16) _BFGET_(r16, 4, 4)
#define SET16GFX2D_AQDEPatternConfig_TYPE(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32GFX2D_AQDEPatternConfig_COLOR_CONVERT(r32) _BFGET_(r32, 5, 5)
#define SET32GFX2D_AQDEPatternConfig_COLOR_CONVERT(r32,v) _BFSET_(r32, 5, 5,v)
#define GET16GFX2D_AQDEPatternConfig_COLOR_CONVERT(r16) _BFGET_(r16, 5, 5)
#define SET16GFX2D_AQDEPatternConfig_COLOR_CONVERT(r16,v) _BFSET_(r16, 5, 5,v)
#define GET32GFX2D_AQDEPatternConfig_INIT_TRIGGER(r32) _BFGET_(r32, 7, 6)
#define SET32GFX2D_AQDEPatternConfig_INIT_TRIGGER(r32,v) _BFSET_(r32, 7, 6,v)
#define GET16GFX2D_AQDEPatternConfig_INIT_TRIGGER(r16) _BFGET_(r16, 7, 6)
#define SET16GFX2D_AQDEPatternConfig_INIT_TRIGGER(r16,v) _BFSET_(r16, 7, 6,v)
#define GET32GFX2D_AQDEPatternConfig_ORIGIN_X(r32) _BFGET_(r32,19,17)
#define SET32GFX2D_AQDEPatternConfig_ORIGIN_X(r32,v) _BFSET_(r32,19,17,v)
#define GET16GFX2D_AQDEPatternConfig_ORIGIN_X(r16) _BFGET_(r16, 3, 1)
#define SET16GFX2D_AQDEPatternConfig_ORIGIN_X(r16,v) _BFSET_(r16, 3, 1,v)
#define GET32GFX2D_AQDEPatternConfig_ORIGIN_Y(r32) _BFGET_(r32,22,20)
#define SET32GFX2D_AQDEPatternConfig_ORIGIN_Y(r32,v) _BFSET_(r32,22,20,v)
#define GET16GFX2D_AQDEPatternConfig_ORIGIN_Y(r16) _BFGET_(r16, 6, 4)
#define SET16GFX2D_AQDEPatternConfig_ORIGIN_Y(r16,v) _BFSET_(r16, 6, 4,v)
#define w32GFX2D_AQDEPatternConfig {\
UNSG32 uAQDEPatternConfig_FORMAT : 4;\
UNSG32 uAQDEPatternConfig_TYPE : 1;\
UNSG32 uAQDEPatternConfig_COLOR_CONVERT : 1;\
UNSG32 uAQDEPatternConfig_INIT_TRIGGER : 2;\
UNSG32 RSVDx13C_b8 : 9;\
UNSG32 uAQDEPatternConfig_ORIGIN_X : 3;\
UNSG32 uAQDEPatternConfig_ORIGIN_Y : 3;\
UNSG32 RSVDx13C_b23 : 9;\
}
union { UNSG32 u32GFX2D_AQDEPatternConfig;
struct w32GFX2D_AQDEPatternConfig;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternLow_ROW0(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEPatternLow_ROW0(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEPatternLow_ROW0(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternLow_ROW0(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternLow_ROW1(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEPatternLow_ROW1(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEPatternLow_ROW1(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternLow_ROW1(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEPatternLow_ROW2(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEPatternLow_ROW2(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEPatternLow_ROW2(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternLow_ROW2(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternLow_ROW3(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEPatternLow_ROW3(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEPatternLow_ROW3(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternLow_ROW3(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEPatternLow {\
UNSG32 uAQDEPatternLow_ROW0 : 8;\
UNSG32 uAQDEPatternLow_ROW1 : 8;\
UNSG32 uAQDEPatternLow_ROW2 : 8;\
UNSG32 uAQDEPatternLow_ROW3 : 8;\
}
union { UNSG32 u32GFX2D_AQDEPatternLow;
struct w32GFX2D_AQDEPatternLow;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternHigh_ROW4(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEPatternHigh_ROW4(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEPatternHigh_ROW4(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternHigh_ROW4(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternHigh_ROW5(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEPatternHigh_ROW5(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEPatternHigh_ROW5(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternHigh_ROW5(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEPatternHigh_ROW6(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEPatternHigh_ROW6(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEPatternHigh_ROW6(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternHigh_ROW6(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternHigh_ROW7(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEPatternHigh_ROW7(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEPatternHigh_ROW7(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternHigh_ROW7(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEPatternHigh {\
UNSG32 uAQDEPatternHigh_ROW4 : 8;\
UNSG32 uAQDEPatternHigh_ROW5 : 8;\
UNSG32 uAQDEPatternHigh_ROW6 : 8;\
UNSG32 uAQDEPatternHigh_ROW7 : 8;\
}
union { UNSG32 u32GFX2D_AQDEPatternHigh;
struct w32GFX2D_AQDEPatternHigh;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternMaskLow_ROW0(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEPatternMaskLow_ROW0(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEPatternMaskLow_ROW0(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternMaskLow_ROW0(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternMaskLow_ROW1(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEPatternMaskLow_ROW1(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEPatternMaskLow_ROW1(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternMaskLow_ROW1(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEPatternMaskLow_ROW2(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEPatternMaskLow_ROW2(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEPatternMaskLow_ROW2(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternMaskLow_ROW2(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternMaskLow_ROW3(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEPatternMaskLow_ROW3(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEPatternMaskLow_ROW3(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternMaskLow_ROW3(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEPatternMaskLow {\
UNSG32 uAQDEPatternMaskLow_ROW0 : 8;\
UNSG32 uAQDEPatternMaskLow_ROW1 : 8;\
UNSG32 uAQDEPatternMaskLow_ROW2 : 8;\
UNSG32 uAQDEPatternMaskLow_ROW3 : 8;\
}
union { UNSG32 u32GFX2D_AQDEPatternMaskLow;
struct w32GFX2D_AQDEPatternMaskLow;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternMaskHigh_ROW4(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEPatternMaskHigh_ROW4(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEPatternMaskHigh_ROW4(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternMaskHigh_ROW4(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternMaskHigh_ROW5(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEPatternMaskHigh_ROW5(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEPatternMaskHigh_ROW5(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternMaskHigh_ROW5(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEPatternMaskHigh_ROW6(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEPatternMaskHigh_ROW6(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEPatternMaskHigh_ROW6(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternMaskHigh_ROW6(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternMaskHigh_ROW7(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEPatternMaskHigh_ROW7(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEPatternMaskHigh_ROW7(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternMaskHigh_ROW7(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEPatternMaskHigh {\
UNSG32 uAQDEPatternMaskHigh_ROW4 : 8;\
UNSG32 uAQDEPatternMaskHigh_ROW5 : 8;\
UNSG32 uAQDEPatternMaskHigh_ROW6 : 8;\
UNSG32 uAQDEPatternMaskHigh_ROW7 : 8;\
}
union { UNSG32 u32GFX2D_AQDEPatternMaskHigh;
struct w32GFX2D_AQDEPatternMaskHigh;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternBgColor_BLUE(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEPatternBgColor_BLUE(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEPatternBgColor_BLUE(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternBgColor_BLUE(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternBgColor_GREEN(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEPatternBgColor_GREEN(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEPatternBgColor_GREEN(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternBgColor_GREEN(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEPatternBgColor_RED(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEPatternBgColor_RED(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEPatternBgColor_RED(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternBgColor_RED(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternBgColor_ALPHA(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEPatternBgColor_ALPHA(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEPatternBgColor_ALPHA(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternBgColor_ALPHA(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEPatternBgColor {\
UNSG32 uAQDEPatternBgColor_BLUE : 8;\
UNSG32 uAQDEPatternBgColor_GREEN : 8;\
UNSG32 uAQDEPatternBgColor_RED : 8;\
UNSG32 uAQDEPatternBgColor_ALPHA : 8;\
}
union { UNSG32 u32GFX2D_AQDEPatternBgColor;
struct w32GFX2D_AQDEPatternBgColor;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEPatternFgColor_BLUE(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEPatternFgColor_BLUE(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEPatternFgColor_BLUE(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternFgColor_BLUE(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternFgColor_GREEN(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEPatternFgColor_GREEN(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEPatternFgColor_GREEN(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternFgColor_GREEN(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEPatternFgColor_RED(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEPatternFgColor_RED(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEPatternFgColor_RED(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEPatternFgColor_RED(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEPatternFgColor_ALPHA(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEPatternFgColor_ALPHA(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEPatternFgColor_ALPHA(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEPatternFgColor_ALPHA(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEPatternFgColor {\
UNSG32 uAQDEPatternFgColor_BLUE : 8;\
UNSG32 uAQDEPatternFgColor_GREEN : 8;\
UNSG32 uAQDEPatternFgColor_RED : 8;\
UNSG32 uAQDEPatternFgColor_ALPHA : 8;\
}
union { UNSG32 u32GFX2D_AQDEPatternFgColor;
struct w32GFX2D_AQDEPatternFgColor;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEFilterBlit_KERNEL_SIZE(r32) _BFGET_(r32, 3, 0)
#define SET32GFX2D_AQDEFilterBlit_KERNEL_SIZE(r32,v) _BFSET_(r32, 3, 0,v)
#define GET16GFX2D_AQDEFilterBlit_KERNEL_SIZE(r16) _BFGET_(r16, 3, 0)
#define SET16GFX2D_AQDEFilterBlit_KERNEL_SIZE(r16,v) _BFSET_(r16, 3, 0,v)
#define GET32GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE(r32) _BFGET_(r32, 4, 4)
#define SET32GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE(r16) _BFGET_(r16, 4, 4)
#define SET16GFX2D_AQDEFilterBlit_IGNORE_BOTTOM_EDGE(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE(r32) _BFGET_(r32, 5, 5)
#define SET32GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE(r32,v) _BFSET_(r32, 5, 5,v)
#define GET16GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE(r16) _BFGET_(r16, 5, 5)
#define SET16GFX2D_AQDEFilterBlit_IGNORE_RIGHT_EDGE(r16,v) _BFSET_(r16, 5, 5,v)
#define GET32GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE(r32) _BFGET_(r32, 6, 6)
#define SET32GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE(r32,v) _BFSET_(r32, 6, 6,v)
#define GET16GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE(r16) _BFGET_(r16, 6, 6)
#define SET16GFX2D_AQDEFilterBlit_IGNORE_TOP_EDGE(r16,v) _BFSET_(r16, 6, 6,v)
#define GET32GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE(r32) _BFGET_(r32, 7, 7)
#define SET32GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE(r32,v) _BFSET_(r32, 7, 7,v)
#define GET16GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE(r16) _BFGET_(r16, 7, 7)
#define SET16GFX2D_AQDEFilterBlit_IGNORE_LEFT_EDGE(r16,v) _BFSET_(r16, 7, 7,v)
#define w32GFX2D_AQDEFilterBlit {\
UNSG32 uAQDEFilterBlit_KERNEL_SIZE : 4;\
UNSG32 uAQDEFilterBlit_IGNORE_BOTTOM_EDGE : 1;\
UNSG32 uAQDEFilterBlit_IGNORE_RIGHT_EDGE : 1;\
UNSG32 uAQDEFilterBlit_IGNORE_TOP_EDGE : 1;\
UNSG32 uAQDEFilterBlit_IGNORE_LEFT_EDGE : 1;\
UNSG32 RSVDx158_b8 : 24;\
}
union { UNSG32 u32GFX2D_AQDEFilterBlit;
struct w32GFX2D_AQDEFilterBlit;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDERop_ROP_FG(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDERop_ROP_FG(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDERop_ROP_FG(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDERop_ROP_FG(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDERop_ROP_BG(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDERop_ROP_BG(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDERop_ROP_BG(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDERop_ROP_BG(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDERop_TYPE(r32) _BFGET_(r32,21,20)
#define SET32GFX2D_AQDERop_TYPE(r32,v) _BFSET_(r32,21,20,v)
#define GET16GFX2D_AQDERop_TYPE(r16) _BFGET_(r16, 5, 4)
#define SET16GFX2D_AQDERop_TYPE(r16,v) _BFSET_(r16, 5, 4,v)
#define w32GFX2D_AQDERop {\
UNSG32 uAQDERop_ROP_FG : 8;\
UNSG32 uAQDERop_ROP_BG : 8;\
UNSG32 RSVDx15C_b16 : 4;\
UNSG32 uAQDERop_TYPE : 2;\
UNSG32 RSVDx15C_b22 : 10;\
}
union { UNSG32 u32GFX2D_AQDERop;
struct w32GFX2D_AQDERop;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEClipTopLeft_X(r32) _BFGET_(r32,14, 0)
#define SET32GFX2D_AQDEClipTopLeft_X(r32,v) _BFSET_(r32,14, 0,v)
#define GET16GFX2D_AQDEClipTopLeft_X(r16) _BFGET_(r16,14, 0)
#define SET16GFX2D_AQDEClipTopLeft_X(r16,v) _BFSET_(r16,14, 0,v)
#define GET32GFX2D_AQDEClipTopLeft_Y(r32) _BFGET_(r32,30,16)
#define SET32GFX2D_AQDEClipTopLeft_Y(r32,v) _BFSET_(r32,30,16,v)
#define GET16GFX2D_AQDEClipTopLeft_Y(r16) _BFGET_(r16,14, 0)
#define SET16GFX2D_AQDEClipTopLeft_Y(r16,v) _BFSET_(r16,14, 0,v)
#define w32GFX2D_AQDEClipTopLeft {\
UNSG32 uAQDEClipTopLeft_X : 15;\
UNSG32 RSVDx160_b15 : 1;\
UNSG32 uAQDEClipTopLeft_Y : 15;\
UNSG32 RSVDx160_b31 : 1;\
}
union { UNSG32 u32GFX2D_AQDEClipTopLeft;
struct w32GFX2D_AQDEClipTopLeft;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEClipBottomRight_X(r32) _BFGET_(r32,14, 0)
#define SET32GFX2D_AQDEClipBottomRight_X(r32,v) _BFSET_(r32,14, 0,v)
#define GET16GFX2D_AQDEClipBottomRight_X(r16) _BFGET_(r16,14, 0)
#define SET16GFX2D_AQDEClipBottomRight_X(r16,v) _BFSET_(r16,14, 0,v)
#define GET32GFX2D_AQDEClipBottomRight_Y(r32) _BFGET_(r32,30,16)
#define SET32GFX2D_AQDEClipBottomRight_Y(r32,v) _BFSET_(r32,30,16,v)
#define GET16GFX2D_AQDEClipBottomRight_Y(r16) _BFGET_(r16,14, 0)
#define SET16GFX2D_AQDEClipBottomRight_Y(r16,v) _BFSET_(r16,14, 0,v)
#define w32GFX2D_AQDEClipBottomRight {\
UNSG32 uAQDEClipBottomRight_X : 15;\
UNSG32 RSVDx164_b15 : 1;\
UNSG32 uAQDEClipBottomRight_Y : 15;\
UNSG32 RSVDx164_b31 : 1;\
}
union { UNSG32 u32GFX2D_AQDEClipBottomRight;
struct w32GFX2D_AQDEClipBottomRight;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEClearByteMask_VALUE(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEClearByteMask_VALUE(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEClearByteMask_VALUE(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEClearByteMask_VALUE(r16,v) _BFSET_(r16, 7, 0,v)
#define w32GFX2D_AQDEClearByteMask {\
UNSG32 uAQDEClearByteMask_VALUE : 8;\
UNSG32 RSVDx168_b8 : 24;\
}
union { UNSG32 u32GFX2D_AQDEClearByteMask;
struct w32GFX2D_AQDEClearByteMask;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEClearPixelValueLow_VALUE(r32) _BFGET_(r32,31, 0)
#define SET32GFX2D_AQDEClearPixelValueLow_VALUE(r32,v) _BFSET_(r32,31, 0,v)
#define w32GFX2D_AQDEClearPixelValueLow {\
UNSG32 uAQDEClearPixelValueLow_VALUE : 32;\
}
union { UNSG32 u32GFX2D_AQDEClearPixelValueLow;
struct w32GFX2D_AQDEClearPixelValueLow;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEClearPixelValueHigh_VALUE(r32) _BFGET_(r32,31, 0)
#define SET32GFX2D_AQDEClearPixelValueHigh_VALUE(r32,v) _BFSET_(r32,31, 0,v)
#define w32GFX2D_AQDEClearPixelValueHigh {\
UNSG32 uAQDEClearPixelValueHigh_VALUE : 32;\
}
union { UNSG32 u32GFX2D_AQDEClearPixelValueHigh;
struct w32GFX2D_AQDEClearPixelValueHigh;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDESrcOriginFraction_X(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQDESrcOriginFraction_X(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQDESrcOriginFraction_X(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcOriginFraction_X(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQDESrcOriginFraction_Y(r32) _BFGET_(r32,31,16)
#define SET32GFX2D_AQDESrcOriginFraction_Y(r32,v) _BFSET_(r32,31,16,v)
#define GET16GFX2D_AQDESrcOriginFraction_Y(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDESrcOriginFraction_Y(r16,v) _BFSET_(r16,15, 0,v)
#define w32GFX2D_AQDESrcOriginFraction {\
UNSG32 uAQDESrcOriginFraction_X : 16;\
UNSG32 uAQDESrcOriginFraction_Y : 16;\
}
union { UNSG32 u32GFX2D_AQDESrcOriginFraction;
struct w32GFX2D_AQDESrcOriginFraction;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEAlphaControl_ENABLE(r32) _BFGET_(r32, 0, 0)
#define SET32GFX2D_AQDEAlphaControl_ENABLE(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16GFX2D_AQDEAlphaControl_ENABLE(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQDEAlphaControl_ENABLE(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEAlphaControl_GLOBAL_SRC_ALPHA(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEAlphaControl_GLOBAL_DST_ALPHA(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEAlphaControl {\
UNSG32 uAQDEAlphaControl_ENABLE : 1;\
UNSG32 RSVDx178_b1 : 15;\
UNSG32 uAQDEAlphaControl_GLOBAL_SRC_ALPHA : 8;\
UNSG32 uAQDEAlphaControl_GLOBAL_DST_ALPHA : 8;\
}
union { UNSG32 u32GFX2D_AQDEAlphaControl;
struct w32GFX2D_AQDEAlphaControl;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEAlphaModes_SRC_ALPHA(r32) _BFGET_(r32, 0, 0)
#define SET32GFX2D_AQDEAlphaModes_SRC_ALPHA(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16GFX2D_AQDEAlphaModes_SRC_ALPHA(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQDEAlphaModes_SRC_ALPHA(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32GFX2D_AQDEAlphaModes_DST_ALPHA(r32) _BFGET_(r32, 4, 4)
#define SET32GFX2D_AQDEAlphaModes_DST_ALPHA(r32,v) _BFSET_(r32, 4, 4,v)
#define GET16GFX2D_AQDEAlphaModes_DST_ALPHA(r16) _BFGET_(r16, 4, 4)
#define SET16GFX2D_AQDEAlphaModes_DST_ALPHA(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA(r32) _BFGET_(r32, 9, 8)
#define SET32GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA(r32,v) _BFSET_(r32, 9, 8,v)
#define GET16GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA(r16) _BFGET_(r16, 9, 8)
#define SET16GFX2D_AQDEAlphaModes_GLOBAL_SRC_ALPHA(r16,v) _BFSET_(r16, 9, 8,v)
#define GET32GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA(r32) _BFGET_(r32,13,12)
#define SET32GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA(r32,v) _BFSET_(r32,13,12,v)
#define GET16GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA(r16) _BFGET_(r16,13,12)
#define SET16GFX2D_AQDEAlphaModes_GLOBAL_DST_ALPHA(r16,v) _BFSET_(r16,13,12,v)
#define GET32GFX2D_AQDEAlphaModes_SRC_COLOR(r32) _BFGET_(r32,16,16)
#define SET32GFX2D_AQDEAlphaModes_SRC_COLOR(r32,v) _BFSET_(r32,16,16,v)
#define GET16GFX2D_AQDEAlphaModes_SRC_COLOR(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQDEAlphaModes_SRC_COLOR(r16,v) _BFSET_(r16, 0, 0,v)
#define GET32GFX2D_AQDEAlphaModes_DST_COLOR(r32) _BFGET_(r32,20,20)
#define SET32GFX2D_AQDEAlphaModes_DST_COLOR(r32,v) _BFSET_(r32,20,20,v)
#define GET16GFX2D_AQDEAlphaModes_DST_COLOR(r16) _BFGET_(r16, 4, 4)
#define SET16GFX2D_AQDEAlphaModes_DST_COLOR(r16,v) _BFSET_(r16, 4, 4,v)
#define GET32GFX2D_AQDEAlphaModes_SRC_BLENDING(r32) _BFGET_(r32,25,24)
#define SET32GFX2D_AQDEAlphaModes_SRC_BLENDING(r32,v) _BFSET_(r32,25,24,v)
#define GET16GFX2D_AQDEAlphaModes_SRC_BLENDING(r16) _BFGET_(r16, 9, 8)
#define SET16GFX2D_AQDEAlphaModes_SRC_BLENDING(r16,v) _BFSET_(r16, 9, 8,v)
#define GET32GFX2D_AQDEAlphaModes_DST_BLENDING(r32) _BFGET_(r32,29,28)
#define SET32GFX2D_AQDEAlphaModes_DST_BLENDING(r32,v) _BFSET_(r32,29,28,v)
#define GET16GFX2D_AQDEAlphaModes_DST_BLENDING(r16) _BFGET_(r16,13,12)
#define SET16GFX2D_AQDEAlphaModes_DST_BLENDING(r16,v) _BFSET_(r16,13,12,v)
#define w32GFX2D_AQDEAlphaModes {\
UNSG32 uAQDEAlphaModes_SRC_ALPHA : 1;\
UNSG32 RSVDx17C_b1 : 3;\
UNSG32 uAQDEAlphaModes_DST_ALPHA : 1;\
UNSG32 RSVDx17C_b5 : 3;\
UNSG32 uAQDEAlphaModes_GLOBAL_SRC_ALPHA : 2;\
UNSG32 RSVDx17C_b10 : 2;\
UNSG32 uAQDEAlphaModes_GLOBAL_DST_ALPHA : 2;\
UNSG32 RSVDx17C_b14 : 2;\
UNSG32 uAQDEAlphaModes_SRC_COLOR : 1;\
UNSG32 RSVDx17C_b17 : 3;\
UNSG32 uAQDEAlphaModes_DST_COLOR : 1;\
UNSG32 RSVDx17C_b21 : 3;\
UNSG32 uAQDEAlphaModes_SRC_BLENDING : 2;\
UNSG32 RSVDx17C_b26 : 2;\
UNSG32 uAQDEAlphaModes_DST_BLENDING : 2;\
UNSG32 RSVDx17C_b30 : 2;\
}
union { UNSG32 u32GFX2D_AQDEAlphaModes;
struct w32GFX2D_AQDEAlphaModes;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE(r32) _BFGET_(r32,29,28)
#define SET32GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE(r32,v) _BFSET_(r32,29,28,v)
#define GET16GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE(r16) _BFGET_(r16,13,12)
#define SET16GFX2D_AQDEWriteBackControl_WRITE_BACK_MODE(r16,v) _BFSET_(r16,13,12,v)
#define w32GFX2D_AQDEWriteBackControl {\
UNSG32 RSVDx180 : 28;\
UNSG32 uAQDEWriteBackControl_WRITE_BACK_MODE : 2;\
UNSG32 RSVDx180_b30 : 2;\
}
union { UNSG32 u32GFX2D_AQDEWriteBackControl;
struct w32GFX2D_AQDEWriteBackControl;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE(r32) _BFGET_(r32, 0, 0)
#define SET32GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE(r32,v) _BFSET_(r32, 0, 0,v)
#define GET16GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQ2DSpecialControl_USE_DEST_OVERRIDE(r16,v) _BFSET_(r16, 0, 0,v)
#define w32GFX2D_AQ2DSpecialControl {\
UNSG32 uAQ2DSpecialControl_USE_DEST_OVERRIDE : 1;\
UNSG32 RSVDx184_b1 : 31;\
}
union { UNSG32 u32GFX2D_AQ2DSpecialControl;
struct w32GFX2D_AQ2DSpecialControl;
};
///////////////////////////////////////////////////////////
UNSG8 RSVDx188 [1184];
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQCmdBufferAddr_ADDRESS(r32) _BFGET_(r32,27, 0)
#define SET32GFX2D_AQCmdBufferAddr_ADDRESS(r32,v) _BFSET_(r32,27, 0,v)
#define GET32GFX2D_AQCmdBufferAddr_TYPE(r32) _BFGET_(r32,29,28)
#define SET32GFX2D_AQCmdBufferAddr_TYPE(r32,v) _BFSET_(r32,29,28,v)
#define GET16GFX2D_AQCmdBufferAddr_TYPE(r16) _BFGET_(r16,13,12)
#define SET16GFX2D_AQCmdBufferAddr_TYPE(r16,v) _BFSET_(r16,13,12,v)
#define w32GFX2D_AQCmdBufferAddr {\
UNSG32 uAQCmdBufferAddr_ADDRESS : 28;\
UNSG32 uAQCmdBufferAddr_TYPE : 2;\
UNSG32 RSVDx628_b30 : 2;\
}
union { UNSG32 u32GFX2D_AQCmdBufferAddr;
struct w32GFX2D_AQCmdBufferAddr;
};
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQCmdBufferCtrl_PREFETCH(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQCmdBufferCtrl_PREFETCH(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQCmdBufferCtrl_PREFETCH(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQCmdBufferCtrl_PREFETCH(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQCmdBufferCtrl_ENABLE(r32) _BFGET_(r32,16,16)
#define SET32GFX2D_AQCmdBufferCtrl_ENABLE(r32,v) _BFSET_(r32,16,16,v)
#define GET16GFX2D_AQCmdBufferCtrl_ENABLE(r16) _BFGET_(r16, 0, 0)
#define SET16GFX2D_AQCmdBufferCtrl_ENABLE(r16,v) _BFSET_(r16, 0, 0,v)
#define w32GFX2D_AQCmdBufferCtrl {\
UNSG32 uAQCmdBufferCtrl_PREFETCH : 16;\
UNSG32 uAQCmdBufferCtrl_ENABLE : 1;\
UNSG32 RSVDx62C_b17 : 15;\
}
union { UNSG32 u32GFX2D_AQCmdBufferCtrl;
struct w32GFX2D_AQCmdBufferCtrl;
};
///////////////////////////////////////////////////////////
UNSG8 RSVDx630 [10704];
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEFilterKernel_COEFFICIENT0(r32) _BFGET_(r32,15, 0)
#define SET32GFX2D_AQDEFilterKernel_COEFFICIENT0(r32,v) _BFSET_(r32,15, 0,v)
#define GET16GFX2D_AQDEFilterKernel_COEFFICIENT0(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDEFilterKernel_COEFFICIENT0(r16,v) _BFSET_(r16,15, 0,v)
#define GET32GFX2D_AQDEFilterKernel_COEFFICIENT1(r32) _BFGET_(r32,31,16)
#define SET32GFX2D_AQDEFilterKernel_COEFFICIENT1(r32,v) _BFSET_(r32,31,16,v)
#define GET16GFX2D_AQDEFilterKernel_COEFFICIENT1(r16) _BFGET_(r16,15, 0)
#define SET16GFX2D_AQDEFilterKernel_COEFFICIENT1(r16,v) _BFSET_(r16,15, 0,v)
#define w32GFX2D_AQDEFilterKernel {\
UNSG32 uAQDEFilterKernel_COEFFICIENT0 : 16;\
UNSG32 uAQDEFilterKernel_COEFFICIENT1 : 16;\
}
union { UNSG32 u32GFX2D_AQDEFilterKernel;
struct w32GFX2D_AQDEFilterKernel;
};
///////////////////////////////////////////////////////////
UNSG8 RSVDx3004 [1020];
///////////////////////////////////////////////////////////
#define GET32GFX2D_AQDEIndexColorTable_BLUE(r32) _BFGET_(r32, 7, 0)
#define SET32GFX2D_AQDEIndexColorTable_BLUE(r32,v) _BFSET_(r32, 7, 0,v)
#define GET16GFX2D_AQDEIndexColorTable_BLUE(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEIndexColorTable_BLUE(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEIndexColorTable_GREEN(r32) _BFGET_(r32,15, 8)
#define SET32GFX2D_AQDEIndexColorTable_GREEN(r32,v) _BFSET_(r32,15, 8,v)
#define GET16GFX2D_AQDEIndexColorTable_GREEN(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEIndexColorTable_GREEN(r16,v) _BFSET_(r16,15, 8,v)
#define GET32GFX2D_AQDEIndexColorTable_RED(r32) _BFGET_(r32,23,16)
#define SET32GFX2D_AQDEIndexColorTable_RED(r32,v) _BFSET_(r32,23,16,v)
#define GET16GFX2D_AQDEIndexColorTable_RED(r16) _BFGET_(r16, 7, 0)
#define SET16GFX2D_AQDEIndexColorTable_RED(r16,v) _BFSET_(r16, 7, 0,v)
#define GET32GFX2D_AQDEIndexColorTable_ALPHA(r32) _BFGET_(r32,31,24)
#define SET32GFX2D_AQDEIndexColorTable_ALPHA(r32,v) _BFSET_(r32,31,24,v)
#define GET16GFX2D_AQDEIndexColorTable_ALPHA(r16) _BFGET_(r16,15, 8)
#define SET16GFX2D_AQDEIndexColorTable_ALPHA(r16,v) _BFSET_(r16,15, 8,v)
#define w32GFX2D_AQDEIndexColorTable {\
UNSG32 uAQDEIndexColorTable_BLUE : 8;\
UNSG32 uAQDEIndexColorTable_GREEN : 8;\
UNSG32 uAQDEIndexColorTable_RED : 8;\
UNSG32 uAQDEIndexColorTable_ALPHA : 8;\
}
union { UNSG32 u32GFX2D_AQDEIndexColorTable;
struct w32GFX2D_AQDEIndexColorTable;
};
///////////////////////////////////////////////////////////
} SIE_GFX2D;
typedef union T32GFX2D_AQIntrAcknowledge
{ UNSG32 u32;
struct w32GFX2D_AQIntrAcknowledge;
} T32GFX2D_AQIntrAcknowledge;
typedef union T32GFX2D_AQIntrEnbl
{ UNSG32 u32;
struct w32GFX2D_AQIntrEnbl;
} T32GFX2D_AQIntrEnbl;
typedef union T32GFX2D_AQDESrcAddress
{ UNSG32 u32;
struct w32GFX2D_AQDESrcAddress;
} T32GFX2D_AQDESrcAddress;
typedef union T32GFX2D_AQDESrcStride
{ UNSG32 u32;
struct w32GFX2D_AQDESrcStride;
} T32GFX2D_AQDESrcStride;
typedef union T32GFX2D_AQDESrcRotationConfig
{ UNSG32 u32;
struct w32GFX2D_AQDESrcRotationConfig;
} T32GFX2D_AQDESrcRotationConfig;
typedef union T32GFX2D_AQDESrcConfig
{ UNSG32 u32;
struct w32GFX2D_AQDESrcConfig;
} T32GFX2D_AQDESrcConfig;
typedef union T32GFX2D_AQDESrcOrigin
{ UNSG32 u32;
struct w32GFX2D_AQDESrcOrigin;
} T32GFX2D_AQDESrcOrigin;
typedef union T32GFX2D_AQDESrcSize
{ UNSG32 u32;
struct w32GFX2D_AQDESrcSize;
} T32GFX2D_AQDESrcSize;
typedef union T32GFX2D_AQDESrcColorBg
{ UNSG32 u32;
struct w32GFX2D_AQDESrcColorBg;
} T32GFX2D_AQDESrcColorBg;
typedef union T32GFX2D_AQDESrcColorFg
{ UNSG32 u32;
struct w32GFX2D_AQDESrcColorFg;
} T32GFX2D_AQDESrcColorFg;
typedef union T32GFX2D_AQDEStretchFactorLow
{ UNSG32 u32;
struct w32GFX2D_AQDEStretchFactorLow;
} T32GFX2D_AQDEStretchFactorLow;
typedef union T32GFX2D_AQDEStretchFactorHigh
{ UNSG32 u32;
struct w32GFX2D_AQDEStretchFactorHigh;
} T32GFX2D_AQDEStretchFactorHigh;
typedef union T32GFX2D_AQDEDestAddress
{ UNSG32 u32;
struct w32GFX2D_AQDEDestAddress;
} T32GFX2D_AQDEDestAddress;
typedef union T32GFX2D_AQDEDestStride
{ UNSG32 u32;
struct w32GFX2D_AQDEDestStride;
} T32GFX2D_AQDEDestStride;
typedef union T32GFX2D_AQDEDestRotationConfig
{ UNSG32 u32;
struct w32GFX2D_AQDEDestRotationConfig;
} T32GFX2D_AQDEDestRotationConfig;
typedef union T32GFX2D_AQDEDestConfig
{ UNSG32 u32;
struct w32GFX2D_AQDEDestConfig;
} T32GFX2D_AQDEDestConfig;
typedef union T32GFX2D_AQDEPatternAddress
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternAddress;
} T32GFX2D_AQDEPatternAddress;
typedef union T32GFX2D_AQDEPatternConfig
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternConfig;
} T32GFX2D_AQDEPatternConfig;
typedef union T32GFX2D_AQDEPatternLow
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternLow;
} T32GFX2D_AQDEPatternLow;
typedef union T32GFX2D_AQDEPatternHigh
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternHigh;
} T32GFX2D_AQDEPatternHigh;
typedef union T32GFX2D_AQDEPatternMaskLow
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternMaskLow;
} T32GFX2D_AQDEPatternMaskLow;
typedef union T32GFX2D_AQDEPatternMaskHigh
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternMaskHigh;
} T32GFX2D_AQDEPatternMaskHigh;
typedef union T32GFX2D_AQDEPatternBgColor
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternBgColor;
} T32GFX2D_AQDEPatternBgColor;
typedef union T32GFX2D_AQDEPatternFgColor
{ UNSG32 u32;
struct w32GFX2D_AQDEPatternFgColor;
} T32GFX2D_AQDEPatternFgColor;
typedef union T32GFX2D_AQDEFilterBlit
{ UNSG32 u32;
struct w32GFX2D_AQDEFilterBlit;
} T32GFX2D_AQDEFilterBlit;
typedef union T32GFX2D_AQDERop
{ UNSG32 u32;
struct w32GFX2D_AQDERop;
} T32GFX2D_AQDERop;
typedef union T32GFX2D_AQDEClipTopLeft
{ UNSG32 u32;
struct w32GFX2D_AQDEClipTopLeft;
} T32GFX2D_AQDEClipTopLeft;
typedef union T32GFX2D_AQDEClipBottomRight
{ UNSG32 u32;
struct w32GFX2D_AQDEClipBottomRight;
} T32GFX2D_AQDEClipBottomRight;
typedef union T32GFX2D_AQDEClearByteMask
{ UNSG32 u32;
struct w32GFX2D_AQDEClearByteMask;
} T32GFX2D_AQDEClearByteMask;
typedef union T32GFX2D_AQDEClearPixelValueLow
{ UNSG32 u32;
struct w32GFX2D_AQDEClearPixelValueLow;
} T32GFX2D_AQDEClearPixelValueLow;
typedef union T32GFX2D_AQDEClearPixelValueHigh
{ UNSG32 u32;
struct w32GFX2D_AQDEClearPixelValueHigh;
} T32GFX2D_AQDEClearPixelValueHigh;
typedef union T32GFX2D_AQDESrcOriginFraction
{ UNSG32 u32;
struct w32GFX2D_AQDESrcOriginFraction;
} T32GFX2D_AQDESrcOriginFraction;
typedef union T32GFX2D_AQDEAlphaControl
{ UNSG32 u32;
struct w32GFX2D_AQDEAlphaControl;
} T32GFX2D_AQDEAlphaControl;
typedef union T32GFX2D_AQDEAlphaModes
{ UNSG32 u32;
struct w32GFX2D_AQDEAlphaModes;
} T32GFX2D_AQDEAlphaModes;
typedef union T32GFX2D_AQDEWriteBackControl
{ UNSG32 u32;
struct w32GFX2D_AQDEWriteBackControl;
} T32GFX2D_AQDEWriteBackControl;
typedef union T32GFX2D_AQ2DSpecialControl
{ UNSG32 u32;
struct w32GFX2D_AQ2DSpecialControl;
} T32GFX2D_AQ2DSpecialControl;
typedef union T32GFX2D_AQCmdBufferAddr
{ UNSG32 u32;
struct w32GFX2D_AQCmdBufferAddr;
} T32GFX2D_AQCmdBufferAddr;
typedef union T32GFX2D_AQCmdBufferCtrl
{ UNSG32 u32;
struct w32GFX2D_AQCmdBufferCtrl;
} T32GFX2D_AQCmdBufferCtrl;
typedef union T32GFX2D_AQDEFilterKernel
{ UNSG32 u32;
struct w32GFX2D_AQDEFilterKernel;
} T32GFX2D_AQDEFilterKernel;
typedef union T32GFX2D_AQDEIndexColorTable
{ UNSG32 u32;
struct w32GFX2D_AQDEIndexColorTable;
} T32GFX2D_AQDEIndexColorTable;
///////////////////////////////////////////////////////////
typedef union TGFX2D_AQIntrAcknowledge
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQIntrAcknowledge;
};
} TGFX2D_AQIntrAcknowledge;
typedef union TGFX2D_AQIntrEnbl
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQIntrEnbl;
};
} TGFX2D_AQIntrEnbl;
typedef union TGFX2D_AQDESrcAddress
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcAddress;
};
} TGFX2D_AQDESrcAddress;
typedef union TGFX2D_AQDESrcStride
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcStride;
};
} TGFX2D_AQDESrcStride;
typedef union TGFX2D_AQDESrcRotationConfig
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcRotationConfig;
};
} TGFX2D_AQDESrcRotationConfig;
typedef union TGFX2D_AQDESrcConfig
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcConfig;
};
} TGFX2D_AQDESrcConfig;
typedef union TGFX2D_AQDESrcOrigin
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcOrigin;
};
} TGFX2D_AQDESrcOrigin;
typedef union TGFX2D_AQDESrcSize
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcSize;
};
} TGFX2D_AQDESrcSize;
typedef union TGFX2D_AQDESrcColorBg
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcColorBg;
};
} TGFX2D_AQDESrcColorBg;
typedef union TGFX2D_AQDESrcColorFg
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcColorFg;
};
} TGFX2D_AQDESrcColorFg;
typedef union TGFX2D_AQDEStretchFactorLow
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEStretchFactorLow;
};
} TGFX2D_AQDEStretchFactorLow;
typedef union TGFX2D_AQDEStretchFactorHigh
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEStretchFactorHigh;
};
} TGFX2D_AQDEStretchFactorHigh;
typedef union TGFX2D_AQDEDestAddress
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEDestAddress;
};
} TGFX2D_AQDEDestAddress;
typedef union TGFX2D_AQDEDestStride
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEDestStride;
};
} TGFX2D_AQDEDestStride;
typedef union TGFX2D_AQDEDestRotationConfig
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEDestRotationConfig;
};
} TGFX2D_AQDEDestRotationConfig;
typedef union TGFX2D_AQDEDestConfig
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEDestConfig;
};
} TGFX2D_AQDEDestConfig;
typedef union TGFX2D_AQDEPatternAddress
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternAddress;
};
} TGFX2D_AQDEPatternAddress;
typedef union TGFX2D_AQDEPatternConfig
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternConfig;
};
} TGFX2D_AQDEPatternConfig;
typedef union TGFX2D_AQDEPatternLow
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternLow;
};
} TGFX2D_AQDEPatternLow;
typedef union TGFX2D_AQDEPatternHigh
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternHigh;
};
} TGFX2D_AQDEPatternHigh;
typedef union TGFX2D_AQDEPatternMaskLow
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternMaskLow;
};
} TGFX2D_AQDEPatternMaskLow;
typedef union TGFX2D_AQDEPatternMaskHigh
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternMaskHigh;
};
} TGFX2D_AQDEPatternMaskHigh;
typedef union TGFX2D_AQDEPatternBgColor
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternBgColor;
};
} TGFX2D_AQDEPatternBgColor;
typedef union TGFX2D_AQDEPatternFgColor
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEPatternFgColor;
};
} TGFX2D_AQDEPatternFgColor;
typedef union TGFX2D_AQDEFilterBlit
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEFilterBlit;
};
} TGFX2D_AQDEFilterBlit;
typedef union TGFX2D_AQDERop
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDERop;
};
} TGFX2D_AQDERop;
typedef union TGFX2D_AQDEClipTopLeft
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEClipTopLeft;
};
} TGFX2D_AQDEClipTopLeft;
typedef union TGFX2D_AQDEClipBottomRight
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEClipBottomRight;
};
} TGFX2D_AQDEClipBottomRight;
typedef union TGFX2D_AQDEClearByteMask
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEClearByteMask;
};
} TGFX2D_AQDEClearByteMask;
typedef union TGFX2D_AQDEClearPixelValueLow
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEClearPixelValueLow;
};
} TGFX2D_AQDEClearPixelValueLow;
typedef union TGFX2D_AQDEClearPixelValueHigh
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEClearPixelValueHigh;
};
} TGFX2D_AQDEClearPixelValueHigh;
typedef union TGFX2D_AQDESrcOriginFraction
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDESrcOriginFraction;
};
} TGFX2D_AQDESrcOriginFraction;
typedef union TGFX2D_AQDEAlphaControl
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEAlphaControl;
};
} TGFX2D_AQDEAlphaControl;
typedef union TGFX2D_AQDEAlphaModes
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEAlphaModes;
};
} TGFX2D_AQDEAlphaModes;
typedef union TGFX2D_AQDEWriteBackControl
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEWriteBackControl;
};
} TGFX2D_AQDEWriteBackControl;
typedef union TGFX2D_AQ2DSpecialControl
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQ2DSpecialControl;
};
} TGFX2D_AQ2DSpecialControl;
typedef union TGFX2D_AQCmdBufferAddr
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQCmdBufferAddr;
};
} TGFX2D_AQCmdBufferAddr;
typedef union TGFX2D_AQCmdBufferCtrl
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQCmdBufferCtrl;
};
} TGFX2D_AQCmdBufferCtrl;
typedef union TGFX2D_AQDEFilterKernel
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEFilterKernel;
};
} TGFX2D_AQDEFilterKernel;
typedef union TGFX2D_AQDEIndexColorTable
{ UNSG32 u32[1];
struct {
struct w32GFX2D_AQDEIndexColorTable;
};
} TGFX2D_AQDEIndexColorTable;
///////////////////////////////////////////////////////////
SIGN32 GFX2D_drvrd(SIE_GFX2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
SIGN32 GFX2D_drvwr(SIE_GFX2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
void GFX2D_reset(SIE_GFX2D *p);
SIGN32 GFX2D_cmp (SIE_GFX2D *p, SIE_GFX2D *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
#define GFX2D_check(p,pie,pfx,hLOG) GFX2D_cmp(p,pie,pfx,(void*)(hLOG),0,0)
#define GFX2D_print(p, pfx,hLOG) GFX2D_cmp(p,0, pfx,(void*)(hLOG),0,0)
#endif
//////
/// ENDOFINTERFACE: GFX2D
////////////////////////////////////////////////////////////
#ifdef __cplusplus
}
#endif
#pragma pack()
#endif
//////
/// ENDOFFILE: gfx2D.h
////////////////////////////////////////////////////////////