| /******************************************************************************** |
| * Marvell GPL License Option |
| * |
| * If you received this File from Marvell, you may opt to use, redistribute and/or |
| * modify this File in accordance with the terms and conditions of the General |
| * Public License Version 2, June 1991 (the "GPL License"), a copy of which is |
| * available along with the File in the license.txt file or by writing to the Free |
| * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or |
| * on the worldwide web at http://www.gnu.org/licenses/gpl.txt. |
| * |
| * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY |
| * DISCLAIMED. The GPL License provides additional details about this warranty |
| * disclaimer. |
| ******************************************************************************/ |
| |
| ////// |
| /// don't edit! auto-generated by docc: usb3Host.h |
| //////////////////////////////////////////////////////////// |
| #ifndef usb3Host_h |
| #define usb3Host_h (){} |
| |
| |
| #include "ctypes.h" |
| |
| #pragma pack(1) |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| #ifndef _DOCC_H_BITOPS_ |
| #define _DOCC_H_BITOPS_ (){} |
| |
| #define _bSETMASK_(b) ((b)<32 ? (1<<((b)&31)) : 0) |
| #define _NSETMASK_(msb,lsb) (_bSETMASK_((msb)+1)-_bSETMASK_(lsb)) |
| #define _bCLRMASK_(b) (~_bSETMASK_(b)) |
| #define _NCLRMASK_(msb,lsb) (~_NSETMASK_(msb,lsb)) |
| #define _BFGET_(r,msb,lsb) (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb))) |
| #define _BFSET_(r,msb,lsb,v) do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0) |
| |
| #endif |
| |
| |
| |
| ////// |
| /// |
| /// $INTERFACE USB3_Reg (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 PIN_PIPE_SEL (P) |
| /// %unsigned 1 PIN_PIPE_SEL 0x1 |
| /// ### |
| /// * USB3 PIPE interface select |
| /// * 0: COMPHY_M interface |
| /// * 1: USB3 PIPE interface |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00004 CORE_RST_N (P) |
| /// %unsigned 1 CORE_RST_N 0x1 |
| /// ### |
| /// * CORE_RST_N |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00008 PIN_IDDQ (P) |
| /// %unsigned 1 PIN_IDDQ 0x0 |
| /// ### |
| /// * IDDQ Mode |
| /// * 0 : Normal mode |
| /// * 1 : IDDQ mode |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0000C PIN_RX_ACJTAG_EN (P) |
| /// %unsigned 1 PIN_RX_ACJTAG_EN 0x0 |
| /// ### |
| /// * Receiver ACJTAG/Beacon Enable |
| /// * This is a power up control for ACJTAG/Beacon |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00010 PIN_RX_ACJTAG_MODE (P) |
| /// %unsigned 1 PIN_RX_ACJTAG_MODE 0x0 |
| /// ### |
| /// * ACJTAG/Beacon Select |
| /// * 0: Beacon mode |
| /// * 1: ACJTAG mode |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00014 PIN_RX_ACJTAG_AC (P) |
| /// %unsigned 1 PIN_RX_ACJTAG_AC 0x0 |
| /// ### |
| /// * Receiver ACJTAG/Beacon AC/DC Couple Select |
| /// * 0: DC mode |
| /// * 1: AC mode |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00018 PIN_RX_ACJTAG_HYST (P) |
| /// %unsigned 3 PIN_RX_ACJTAG_HYST 0x0 |
| /// ### |
| /// * Receiver ACJTAG/Beacon Hysteresis Control |
| /// * 000: 20mV [ACJTAG_MODE=0] |
| /// * 001: 40mV |
| /// * 010: 60mV [ACJTAG_MODE=1] |
| /// * 011: 80mV |
| /// * 100: 100mV |
| /// * 101: 120mV |
| /// * 110: 140mV |
| /// * 111: 160mV |
| /// * It is turned off during DC mode. |
| /// ### |
| /// %% 29 # Stuffing bits... |
| /// @ 0x0001C PHY_RESERVED_IN (P) |
| /// %unsigned 8 PHY_RESERVED_IN 0x0 |
| /// %% 24 # Stuffing bits... |
| /// @ 0x00020 PHY_RESERVED_OUT (R-) |
| /// %unsigned 8 PHY_RESERVED_OUT 0x0 |
| /// %% 24 # Stuffing bits... |
| /// @ 0x00024 PHY_DIG_TEST_BUS (R-) |
| /// %unsigned 8 PHY_DIG_TEST_BUS |
| /// %% 24 # Stuffing bits... |
| /// @ 0x00028 MAC_PHY_CLK_REQ_N (P) |
| /// %unsigned 1 MAC_PHY_CLK_REQ_N 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0002C MAC_PHY_TXCOMPLIANCE (P) |
| /// %unsigned 2 MAC_PHY_TXCOMPLIANCE 0x0 |
| /// %% 30 # Stuffing bits... |
| /// @ 0x00030 MAC_PHY_RXEIDETECT_DIS (P) |
| /// %unsigned 1 MAC_PHY_RXEIDETECT_DIS 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00034 MAC_PHY_TXCMN_MODE_DIS (P) |
| /// %unsigned 1 MAC_PHY_TXCMN_MODE_DIS 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00038 PHY_MAC_CLK_ACK_N (R-) |
| /// %unsigned 1 PHY_MAC_CLK_ACK_N 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0003C PHY_PAD_CLKREQ_EN_N (R-) |
| /// %unsigned 1 PHY_PAD_CLKREQ_EN_N 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00040 PHY_RCB_REFCLK_RX_EN (R-) |
| /// %unsigned 1 PHY_RCB_REFCLK_RX_EN 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00044 LANE_ALIGN_REFCLK (P) |
| /// %unsigned 1 LANE_ALIGN_REFCLK 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00048 LANE_ALIGN_REFCLK_SOURCE (R-) |
| /// %unsigned 1 LANE_ALIGN_REFCLK_SOURCE 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0004C fladj (P) |
| /// %unsigned 6 fladj 0x0 |
| /// ### |
| /// * This parameter is from PCIe configuration registers (see xHCI 5.2.4). |
| /// ### |
| /// %% 26 # Stuffing bits... |
| /// @ 0x00050 txdetectrx_sys (R-) |
| /// %unsigned 1 txdetectrx_sys 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00054 port_ss_power_en (R-) |
| /// %unsigned 1 port_ss_power_en 0x0 |
| /// ### |
| /// * This is SuperSpeed power on indication |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00058 port_hs_power_en (R-) |
| /// %unsigned 1 port_hs_power_en 0x0 |
| /// ### |
| /// * This is USB2 power on indication |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0005C (W-) |
| /// # # Stuffing bytes... |
| /// %% 32 |
| /// @ 0x00060 wakeup (R-) |
| /// %unsigned 1 wakeup 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00064 device_int (R-) |
| /// %unsigned 1 device_int 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00068 powerdown_p3_wp (R-) |
| /// %unsigned 2 powerdown_p3_wp 0x0 |
| /// %% 30 # Stuffing bits... |
| /// @ 0x0006C (W-) |
| /// # # Stuffing bytes... |
| /// %% 32 |
| /// @ 0x00070 msi_msg_sent (P) |
| /// %unsigned 1 msi_msg_sent 0x0 |
| /// ### |
| /// * This signal is used for PCIe to indicate interrupt massage has been send out and it will clear internal |
| /// * Interrupt signal once it is asserted. For non PCIe, The SoC needs to set this signal by one cycle to indicate |
| /// * When interrupt handling is done. |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00074 bridge_rstn (R-) |
| /// %unsigned 1 bridge_rstn 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00078 dbg_dis_ss_in_burst (P) |
| /// %unsigned 1 dbg_dis_ss_in_burst 0x0 |
| /// ### |
| /// * This is for debugging. We suggest you make it a programmable bit, or a GPIO pin. Default is 0. |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0007C USB3_PIN_PHY_GEN_RX (P) |
| /// %unsigned 4 USB3_PIN_PHY_GEN_RX 0x1 |
| /// %% 28 # Stuffing bits... |
| /// @ 0x00080 USB3_PIN_PHY_GEN_TX (P) |
| /// %unsigned 4 USB3_PIN_PHY_GEN_TX 0x1 |
| /// %% 28 # Stuffing bits... |
| /// @ 0x00084 USB3_PIN_PU_PLL (P) |
| /// %unsigned 1 USB3_PIN_PU_PLL 0x1 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00088 USB3_PIN_PU_RX (P) |
| /// %unsigned 1 USB3_PIN_PU_RX 0x1 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0008C USB3_PIN_PU_TX (P) |
| /// %unsigned 1 USB3_PIN_PU_TX 0x1 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00090 USB3_PIN_ICC50UA_BYPASS (P) |
| /// %unsigned 1 USB3_PIN_ICC50UA_BYPASS 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00094 USB3_PIN_IPP50UA_BYPASS (P) |
| /// %unsigned 1 USB3_PIN_IPP50UA_BYPASS 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00098 USB3_PIN_IPTAT20UA_BYPASS (P) |
| /// %unsigned 1 USB3_PIN_IPTAT20UA_BYPASS 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0009C USB3_PIN_REFCLK_DIS (P) |
| /// %unsigned 1 USB3_PIN_REFCLK_DIS 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000A0 USB3_PIN_PU_IVREF (P) |
| /// %unsigned 1 USB3_PIN_PU_IVREF 0x1 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000A4 USB3_PIN_RX_ACJTAG_RXP (R-) |
| /// %unsigned 1 USB3_PIN_RX_ACJTAG_RXP |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000A8 USB3_PIN_RX_ACJTAG_RXN (R-) |
| /// %unsigned 1 USB3_PIN_RX_ACJTAG_RXN |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000AC USB3_PIN_CID_REV (P) |
| /// %unsigned 8 USB3_PIN_CID_REV 0x0 |
| /// %% 24 # Stuffing bits... |
| /// @ 0x000B0 USB3_PHY_RESERVED_INPUT_32 (P) |
| /// %unsigned 32 USB3_RESERVED_INPUT_32 0x0 |
| /// @ 0x000B4 USB3_PHY_RESERVED_INPUT_64 (P) |
| /// %unsigned 32 USB3_RESERVED_INPUT_64 0x0 |
| /// @ 0x000B8 USB3_PHY_RESERVED_OUTPUT (R-) |
| /// %unsigned 16 USB3_RESERVED_OUTPUT |
| /// %% 16 # Stuffing bits... |
| /// @ 0x000BC USB3_PIN_RESET (P) |
| /// %unsigned 1 USB3_PIN_RESET 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000C0 USB3_PIN_RESET_CORE (P) |
| /// %unsigned 1 USB3_PIN_RESET_CORE 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000C4 USB3_PIN_RX_INIT (P) |
| /// %unsigned 1 USB3_PIN_RESET_INIT 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000C8 USB3_PIN_RX_INIT_DONE (R-) |
| /// %unsigned 1 USB3_PIN_RESET_INIT_DONE |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000CC USB3_PIN_RXDATA_LSB (R-) |
| /// %unsigned 20 USB3_PIN_RXDATA_LSB |
| /// %% 12 # Stuffing bits... |
| /// @ 0x000D0 USB3_PIN_RXDATA_MSB (R-) |
| /// %unsigned 20 USB3_PIN_RXDATA_MSB |
| /// %% 12 # Stuffing bits... |
| /// @ 0x000D4 USB3_PIN_SNRZ_MODE (P) |
| /// %unsigned 1 USB3_PIN_SNRZ_MODE 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000D8 USB3_PIN_SNRZ_RXD (R-) |
| /// %unsigned 20 USB3_PIN_SNRZ_RXD |
| /// %% 12 # Stuffing bits... |
| /// @ 0x000DC USB3_PIN_SNRZ_TXD (P) |
| /// %unsigned 20 USB3_PIN_SNRZ_TXD 0x0 |
| /// %% 12 # Stuffing bits... |
| /// @ 0x000E0 USB3_PIN_SQ_DETECTED (R-) |
| /// %unsigned 1 USB3_PIN_SQ_DETECTED |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000E4 USB3_PIN_SYNC_FOUND (R-) |
| /// %unsigned 1 USB3_PIN_SYNC_FOUND |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000E8 USB3_PIN_TX_IDLE (P) |
| /// %unsigned 1 USB3_PIN_TX_IDLE 0x1 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x000EC USB3_PIN_TXDATA_LSB (P) |
| /// %unsigned 20 USB3_PIN_TXDATA_LSB 0x0 |
| /// %% 12 # Stuffing bits... |
| /// @ 0x000F0 USB3_PIN_TXDATA_MSB (P) |
| /// %unsigned 20 USB3_PIN_TXDATA_MSB 0x0 |
| /// %% 12 # Stuffing bits... |
| /// @ 0x000F4 USB3_SPARE_0 (P) |
| /// %unsigned 32 USB3_SPARE_0 0x0 |
| /// @ 0x000F8 USB3_SPARE_1 (P) |
| /// %unsigned 32 USB3_SPARE_1 0x0 |
| /// @ 0x000FC USB3_SPARE_2 (P) |
| /// %unsigned 32 USB3_SPARE_2 0x0 |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 256B, bits: 389b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_USB3_Reg |
| #define h_USB3_Reg (){} |
| |
| #define RA_USB3_Reg_PIN_PIPE_SEL 0x0000 |
| |
| #define BA_USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL 0x0000 |
| #define B16USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL 0x0000 |
| #define LSb32USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL 0 |
| #define LSb16USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL 0 |
| #define bUSB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL 1 |
| #define MSK32USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_CORE_RST_N 0x0004 |
| |
| #define BA_USB3_Reg_CORE_RST_N_CORE_RST_N 0x0004 |
| #define B16USB3_Reg_CORE_RST_N_CORE_RST_N 0x0004 |
| #define LSb32USB3_Reg_CORE_RST_N_CORE_RST_N 0 |
| #define LSb16USB3_Reg_CORE_RST_N_CORE_RST_N 0 |
| #define bUSB3_Reg_CORE_RST_N_CORE_RST_N 1 |
| #define MSK32USB3_Reg_CORE_RST_N_CORE_RST_N 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PIN_IDDQ 0x0008 |
| |
| #define BA_USB3_Reg_PIN_IDDQ_PIN_IDDQ 0x0008 |
| #define B16USB3_Reg_PIN_IDDQ_PIN_IDDQ 0x0008 |
| #define LSb32USB3_Reg_PIN_IDDQ_PIN_IDDQ 0 |
| #define LSb16USB3_Reg_PIN_IDDQ_PIN_IDDQ 0 |
| #define bUSB3_Reg_PIN_IDDQ_PIN_IDDQ 1 |
| #define MSK32USB3_Reg_PIN_IDDQ_PIN_IDDQ 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PIN_RX_ACJTAG_EN 0x000C |
| |
| #define BA_USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN 0x000C |
| #define B16USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN 0x000C |
| #define LSb32USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN 0 |
| #define LSb16USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN 0 |
| #define bUSB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN 1 |
| #define MSK32USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PIN_RX_ACJTAG_MODE 0x0010 |
| |
| #define BA_USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE 0x0010 |
| #define B16USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE 0x0010 |
| #define LSb32USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE 0 |
| #define LSb16USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE 0 |
| #define bUSB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE 1 |
| #define MSK32USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PIN_RX_ACJTAG_AC 0x0014 |
| |
| #define BA_USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC 0x0014 |
| #define B16USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC 0x0014 |
| #define LSb32USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC 0 |
| #define LSb16USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC 0 |
| #define bUSB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC 1 |
| #define MSK32USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PIN_RX_ACJTAG_HYST 0x0018 |
| |
| #define BA_USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST 0x0018 |
| #define B16USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST 0x0018 |
| #define LSb32USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST 0 |
| #define LSb16USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST 0 |
| #define bUSB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST 3 |
| #define MSK32USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST 0x00000007 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PHY_RESERVED_IN 0x001C |
| |
| #define BA_USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN 0x001C |
| #define B16USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN 0x001C |
| #define LSb32USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN 0 |
| #define LSb16USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN 0 |
| #define bUSB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN 8 |
| #define MSK32USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN 0x000000FF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PHY_RESERVED_OUT 0x0020 |
| |
| #define BA_USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT 0x0020 |
| #define B16USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT 0x0020 |
| #define LSb32USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT 0 |
| #define LSb16USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT 0 |
| #define bUSB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT 8 |
| #define MSK32USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT 0x000000FF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PHY_DIG_TEST_BUS 0x0024 |
| |
| #define BA_USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS 0x0024 |
| #define B16USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS 0x0024 |
| #define LSb32USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS 0 |
| #define LSb16USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS 0 |
| #define bUSB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS 8 |
| #define MSK32USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS 0x000000FF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_MAC_PHY_CLK_REQ_N 0x0028 |
| |
| #define BA_USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N 0x0028 |
| #define B16USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N 0x0028 |
| #define LSb32USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N 0 |
| #define LSb16USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N 0 |
| #define bUSB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N 1 |
| #define MSK32USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_MAC_PHY_TXCOMPLIANCE 0x002C |
| |
| #define BA_USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE 0x002C |
| #define B16USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE 0x002C |
| #define LSb32USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE 0 |
| #define LSb16USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE 0 |
| #define bUSB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE 2 |
| #define MSK32USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE 0x00000003 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_MAC_PHY_RXEIDETECT_DIS 0x0030 |
| |
| #define BA_USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS 0x0030 |
| #define B16USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS 0x0030 |
| #define LSb32USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS 0 |
| #define LSb16USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS 0 |
| #define bUSB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS 1 |
| #define MSK32USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_MAC_PHY_TXCMN_MODE_DIS 0x0034 |
| |
| #define BA_USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS 0x0034 |
| #define B16USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS 0x0034 |
| #define LSb32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS 0 |
| #define LSb16USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS 0 |
| #define bUSB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS 1 |
| #define MSK32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PHY_MAC_CLK_ACK_N 0x0038 |
| |
| #define BA_USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N 0x0038 |
| #define B16USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N 0x0038 |
| #define LSb32USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N 0 |
| #define LSb16USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N 0 |
| #define bUSB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N 1 |
| #define MSK32USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PHY_PAD_CLKREQ_EN_N 0x003C |
| |
| #define BA_USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N 0x003C |
| #define B16USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N 0x003C |
| #define LSb32USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N 0 |
| #define LSb16USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N 0 |
| #define bUSB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N 1 |
| #define MSK32USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_PHY_RCB_REFCLK_RX_EN 0x0040 |
| |
| #define BA_USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN 0x0040 |
| #define B16USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN 0x0040 |
| #define LSb32USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN 0 |
| #define LSb16USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN 0 |
| #define bUSB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN 1 |
| #define MSK32USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_LANE_ALIGN_REFCLK 0x0044 |
| |
| #define BA_USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK 0x0044 |
| #define B16USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK 0x0044 |
| #define LSb32USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK 0 |
| #define LSb16USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK 0 |
| #define bUSB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK 1 |
| #define MSK32USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_LANE_ALIGN_REFCLK_SOURCE 0x0048 |
| |
| #define BA_USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE 0x0048 |
| #define B16USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE 0x0048 |
| #define LSb32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE 0 |
| #define LSb16USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE 0 |
| #define bUSB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE 1 |
| #define MSK32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_fladj 0x004C |
| |
| #define BA_USB3_Reg_fladj_fladj 0x004C |
| #define B16USB3_Reg_fladj_fladj 0x004C |
| #define LSb32USB3_Reg_fladj_fladj 0 |
| #define LSb16USB3_Reg_fladj_fladj 0 |
| #define bUSB3_Reg_fladj_fladj 6 |
| #define MSK32USB3_Reg_fladj_fladj 0x0000003F |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_txdetectrx_sys 0x0050 |
| |
| #define BA_USB3_Reg_txdetectrx_sys_txdetectrx_sys 0x0050 |
| #define B16USB3_Reg_txdetectrx_sys_txdetectrx_sys 0x0050 |
| #define LSb32USB3_Reg_txdetectrx_sys_txdetectrx_sys 0 |
| #define LSb16USB3_Reg_txdetectrx_sys_txdetectrx_sys 0 |
| #define bUSB3_Reg_txdetectrx_sys_txdetectrx_sys 1 |
| #define MSK32USB3_Reg_txdetectrx_sys_txdetectrx_sys 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_port_ss_power_en 0x0054 |
| |
| #define BA_USB3_Reg_port_ss_power_en_port_ss_power_en 0x0054 |
| #define B16USB3_Reg_port_ss_power_en_port_ss_power_en 0x0054 |
| #define LSb32USB3_Reg_port_ss_power_en_port_ss_power_en 0 |
| #define LSb16USB3_Reg_port_ss_power_en_port_ss_power_en 0 |
| #define bUSB3_Reg_port_ss_power_en_port_ss_power_en 1 |
| #define MSK32USB3_Reg_port_ss_power_en_port_ss_power_en 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_port_hs_power_en 0x0058 |
| |
| #define BA_USB3_Reg_port_hs_power_en_port_hs_power_en 0x0058 |
| #define B16USB3_Reg_port_hs_power_en_port_hs_power_en 0x0058 |
| #define LSb32USB3_Reg_port_hs_power_en_port_hs_power_en 0 |
| #define LSb16USB3_Reg_port_hs_power_en_port_hs_power_en 0 |
| #define bUSB3_Reg_port_hs_power_en_port_hs_power_en 1 |
| #define MSK32USB3_Reg_port_hs_power_en_port_hs_power_en 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_wakeup 0x0060 |
| |
| #define BA_USB3_Reg_wakeup_wakeup 0x0060 |
| #define B16USB3_Reg_wakeup_wakeup 0x0060 |
| #define LSb32USB3_Reg_wakeup_wakeup 0 |
| #define LSb16USB3_Reg_wakeup_wakeup 0 |
| #define bUSB3_Reg_wakeup_wakeup 1 |
| #define MSK32USB3_Reg_wakeup_wakeup 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_device_int 0x0064 |
| |
| #define BA_USB3_Reg_device_int_device_int 0x0064 |
| #define B16USB3_Reg_device_int_device_int 0x0064 |
| #define LSb32USB3_Reg_device_int_device_int 0 |
| #define LSb16USB3_Reg_device_int_device_int 0 |
| #define bUSB3_Reg_device_int_device_int 1 |
| #define MSK32USB3_Reg_device_int_device_int 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_powerdown_p3_wp 0x0068 |
| |
| #define BA_USB3_Reg_powerdown_p3_wp_powerdown_p3_wp 0x0068 |
| #define B16USB3_Reg_powerdown_p3_wp_powerdown_p3_wp 0x0068 |
| #define LSb32USB3_Reg_powerdown_p3_wp_powerdown_p3_wp 0 |
| #define LSb16USB3_Reg_powerdown_p3_wp_powerdown_p3_wp 0 |
| #define bUSB3_Reg_powerdown_p3_wp_powerdown_p3_wp 2 |
| #define MSK32USB3_Reg_powerdown_p3_wp_powerdown_p3_wp 0x00000003 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_msi_msg_sent 0x0070 |
| |
| #define BA_USB3_Reg_msi_msg_sent_msi_msg_sent 0x0070 |
| #define B16USB3_Reg_msi_msg_sent_msi_msg_sent 0x0070 |
| #define LSb32USB3_Reg_msi_msg_sent_msi_msg_sent 0 |
| #define LSb16USB3_Reg_msi_msg_sent_msi_msg_sent 0 |
| #define bUSB3_Reg_msi_msg_sent_msi_msg_sent 1 |
| #define MSK32USB3_Reg_msi_msg_sent_msi_msg_sent 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_bridge_rstn 0x0074 |
| |
| #define BA_USB3_Reg_bridge_rstn_bridge_rstn 0x0074 |
| #define B16USB3_Reg_bridge_rstn_bridge_rstn 0x0074 |
| #define LSb32USB3_Reg_bridge_rstn_bridge_rstn 0 |
| #define LSb16USB3_Reg_bridge_rstn_bridge_rstn 0 |
| #define bUSB3_Reg_bridge_rstn_bridge_rstn 1 |
| #define MSK32USB3_Reg_bridge_rstn_bridge_rstn 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_dbg_dis_ss_in_burst 0x0078 |
| |
| #define BA_USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst 0x0078 |
| #define B16USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst 0x0078 |
| #define LSb32USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst 0 |
| #define LSb16USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst 0 |
| #define bUSB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst 1 |
| #define MSK32USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_PHY_GEN_RX 0x007C |
| |
| #define BA_USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX 0x007C |
| #define B16USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX 0x007C |
| #define LSb32USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX 0 |
| #define LSb16USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX 0 |
| #define bUSB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX 4 |
| #define MSK32USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX 0x0000000F |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_PHY_GEN_TX 0x0080 |
| |
| #define BA_USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX 0x0080 |
| #define B16USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX 0x0080 |
| #define LSb32USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX 0 |
| #define LSb16USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX 0 |
| #define bUSB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX 4 |
| #define MSK32USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX 0x0000000F |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_PU_PLL 0x0084 |
| |
| #define BA_USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL 0x0084 |
| #define B16USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL 0x0084 |
| #define LSb32USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL 0 |
| #define LSb16USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL 0 |
| #define bUSB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL 1 |
| #define MSK32USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_PU_RX 0x0088 |
| |
| #define BA_USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX 0x0088 |
| #define B16USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX 0x0088 |
| #define LSb32USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX 0 |
| #define LSb16USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX 0 |
| #define bUSB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX 1 |
| #define MSK32USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_PU_TX 0x008C |
| |
| #define BA_USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX 0x008C |
| #define B16USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX 0x008C |
| #define LSb32USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX 0 |
| #define LSb16USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX 0 |
| #define bUSB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX 1 |
| #define MSK32USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_ICC50UA_BYPASS 0x0090 |
| |
| #define BA_USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS 0x0090 |
| #define B16USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS 0x0090 |
| #define LSb32USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS 0 |
| #define LSb16USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS 0 |
| #define bUSB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS 1 |
| #define MSK32USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_IPP50UA_BYPASS 0x0094 |
| |
| #define BA_USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS 0x0094 |
| #define B16USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS 0x0094 |
| #define LSb32USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS 0 |
| #define LSb16USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS 0 |
| #define bUSB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS 1 |
| #define MSK32USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS 0x0098 |
| |
| #define BA_USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS 0x0098 |
| #define B16USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS 0x0098 |
| #define LSb32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS 0 |
| #define LSb16USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS 0 |
| #define bUSB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS 1 |
| #define MSK32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_REFCLK_DIS 0x009C |
| |
| #define BA_USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS 0x009C |
| #define B16USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS 0x009C |
| #define LSb32USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS 0 |
| #define LSb16USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS 0 |
| #define bUSB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS 1 |
| #define MSK32USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_PU_IVREF 0x00A0 |
| |
| #define BA_USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF 0x00A0 |
| #define B16USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF 0x00A0 |
| #define LSb32USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF 0 |
| #define LSb16USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF 0 |
| #define bUSB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF 1 |
| #define MSK32USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RX_ACJTAG_RXP 0x00A4 |
| |
| #define BA_USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP 0x00A4 |
| #define B16USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP 0x00A4 |
| #define LSb32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP 0 |
| #define LSb16USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP 0 |
| #define bUSB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP 1 |
| #define MSK32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RX_ACJTAG_RXN 0x00A8 |
| |
| #define BA_USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN 0x00A8 |
| #define B16USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN 0x00A8 |
| #define LSb32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN 0 |
| #define LSb16USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN 0 |
| #define bUSB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN 1 |
| #define MSK32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_CID_REV 0x00AC |
| |
| #define BA_USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV 0x00AC |
| #define B16USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV 0x00AC |
| #define LSb32USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV 0 |
| #define LSb16USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV 0 |
| #define bUSB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV 8 |
| #define MSK32USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV 0x000000FF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PHY_RESERVED_INPUT_32 0x00B0 |
| |
| #define BA_USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 0x00B0 |
| #define B16USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 0x00B0 |
| #define LSb32USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 0 |
| #define LSb16USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 0 |
| #define bUSB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 32 |
| #define MSK32USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PHY_RESERVED_INPUT_64 0x00B4 |
| |
| #define BA_USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 0x00B4 |
| #define B16USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 0x00B4 |
| #define LSb32USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 0 |
| #define LSb16USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 0 |
| #define bUSB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 32 |
| #define MSK32USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PHY_RESERVED_OUTPUT 0x00B8 |
| |
| #define BA_USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT 0x00B8 |
| #define B16USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT 0x00B8 |
| #define LSb32USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT 0 |
| #define LSb16USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT 0 |
| #define bUSB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT 16 |
| #define MSK32USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT 0x0000FFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RESET 0x00BC |
| |
| #define BA_USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET 0x00BC |
| #define B16USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET 0x00BC |
| #define LSb32USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET 0 |
| #define LSb16USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET 0 |
| #define bUSB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET 1 |
| #define MSK32USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RESET_CORE 0x00C0 |
| |
| #define BA_USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE 0x00C0 |
| #define B16USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE 0x00C0 |
| #define LSb32USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE 0 |
| #define LSb16USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE 0 |
| #define bUSB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE 1 |
| #define MSK32USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RX_INIT 0x00C4 |
| |
| #define BA_USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT 0x00C4 |
| #define B16USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT 0x00C4 |
| #define LSb32USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT 0 |
| #define LSb16USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT 0 |
| #define bUSB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT 1 |
| #define MSK32USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RX_INIT_DONE 0x00C8 |
| |
| #define BA_USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE 0x00C8 |
| #define B16USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE 0x00C8 |
| #define LSb32USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE 0 |
| #define LSb16USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE 0 |
| #define bUSB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE 1 |
| #define MSK32USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RXDATA_LSB 0x00CC |
| |
| #define BA_USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB 0x00CC |
| #define B16USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB 0x00CC |
| #define LSb32USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB 0 |
| #define LSb16USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB 0 |
| #define bUSB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB 20 |
| #define MSK32USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB 0x000FFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_RXDATA_MSB 0x00D0 |
| |
| #define BA_USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB 0x00D0 |
| #define B16USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB 0x00D0 |
| #define LSb32USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB 0 |
| #define LSb16USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB 0 |
| #define bUSB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB 20 |
| #define MSK32USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB 0x000FFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_SNRZ_MODE 0x00D4 |
| |
| #define BA_USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE 0x00D4 |
| #define B16USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE 0x00D4 |
| #define LSb32USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE 0 |
| #define LSb16USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE 0 |
| #define bUSB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE 1 |
| #define MSK32USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_SNRZ_RXD 0x00D8 |
| |
| #define BA_USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD 0x00D8 |
| #define B16USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD 0x00D8 |
| #define LSb32USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD 0 |
| #define LSb16USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD 0 |
| #define bUSB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD 20 |
| #define MSK32USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD 0x000FFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_SNRZ_TXD 0x00DC |
| |
| #define BA_USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD 0x00DC |
| #define B16USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD 0x00DC |
| #define LSb32USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD 0 |
| #define LSb16USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD 0 |
| #define bUSB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD 20 |
| #define MSK32USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD 0x000FFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_SQ_DETECTED 0x00E0 |
| |
| #define BA_USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED 0x00E0 |
| #define B16USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED 0x00E0 |
| #define LSb32USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED 0 |
| #define LSb16USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED 0 |
| #define bUSB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED 1 |
| #define MSK32USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_SYNC_FOUND 0x00E4 |
| |
| #define BA_USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND 0x00E4 |
| #define B16USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND 0x00E4 |
| #define LSb32USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND 0 |
| #define LSb16USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND 0 |
| #define bUSB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND 1 |
| #define MSK32USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_TX_IDLE 0x00E8 |
| |
| #define BA_USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE 0x00E8 |
| #define B16USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE 0x00E8 |
| #define LSb32USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE 0 |
| #define LSb16USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE 0 |
| #define bUSB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE 1 |
| #define MSK32USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_TXDATA_LSB 0x00EC |
| |
| #define BA_USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB 0x00EC |
| #define B16USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB 0x00EC |
| #define LSb32USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB 0 |
| #define LSb16USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB 0 |
| #define bUSB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB 20 |
| #define MSK32USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB 0x000FFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_PIN_TXDATA_MSB 0x00F0 |
| |
| #define BA_USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB 0x00F0 |
| #define B16USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB 0x00F0 |
| #define LSb32USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB 0 |
| #define LSb16USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB 0 |
| #define bUSB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB 20 |
| #define MSK32USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB 0x000FFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_SPARE_0 0x00F4 |
| |
| #define BA_USB3_Reg_USB3_SPARE_0_USB3_SPARE_0 0x00F4 |
| #define B16USB3_Reg_USB3_SPARE_0_USB3_SPARE_0 0x00F4 |
| #define LSb32USB3_Reg_USB3_SPARE_0_USB3_SPARE_0 0 |
| #define LSb16USB3_Reg_USB3_SPARE_0_USB3_SPARE_0 0 |
| #define bUSB3_Reg_USB3_SPARE_0_USB3_SPARE_0 32 |
| #define MSK32USB3_Reg_USB3_SPARE_0_USB3_SPARE_0 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_SPARE_1 0x00F8 |
| |
| #define BA_USB3_Reg_USB3_SPARE_1_USB3_SPARE_1 0x00F8 |
| #define B16USB3_Reg_USB3_SPARE_1_USB3_SPARE_1 0x00F8 |
| #define LSb32USB3_Reg_USB3_SPARE_1_USB3_SPARE_1 0 |
| #define LSb16USB3_Reg_USB3_SPARE_1_USB3_SPARE_1 0 |
| #define bUSB3_Reg_USB3_SPARE_1_USB3_SPARE_1 32 |
| #define MSK32USB3_Reg_USB3_SPARE_1_USB3_SPARE_1 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB3_Reg_USB3_SPARE_2 0x00FC |
| |
| #define BA_USB3_Reg_USB3_SPARE_2_USB3_SPARE_2 0x00FC |
| #define B16USB3_Reg_USB3_SPARE_2_USB3_SPARE_2 0x00FC |
| #define LSb32USB3_Reg_USB3_SPARE_2_USB3_SPARE_2 0 |
| #define LSb16USB3_Reg_USB3_SPARE_2_USB3_SPARE_2 0 |
| #define bUSB3_Reg_USB3_SPARE_2_USB3_SPARE_2 32 |
| #define MSK32USB3_Reg_USB3_SPARE_2_USB3_SPARE_2 0xFFFFFFFF |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_USB3_Reg { |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PIN_PIPE_SEL_PIN_PIPE_SEL(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PIN_PIPE_SEL {\ |
| UNSG32 uPIN_PIPE_SEL_PIN_PIPE_SEL : 1;\ |
| UNSG32 RSVDx0_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PIN_PIPE_SEL; |
| struct w32USB3_Reg_PIN_PIPE_SEL; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_CORE_RST_N_CORE_RST_N(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_CORE_RST_N_CORE_RST_N(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_CORE_RST_N_CORE_RST_N(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_CORE_RST_N_CORE_RST_N(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_CORE_RST_N {\ |
| UNSG32 uCORE_RST_N_CORE_RST_N : 1;\ |
| UNSG32 RSVDx4_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_CORE_RST_N; |
| struct w32USB3_Reg_CORE_RST_N; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PIN_IDDQ_PIN_IDDQ(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PIN_IDDQ_PIN_IDDQ(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PIN_IDDQ_PIN_IDDQ(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PIN_IDDQ_PIN_IDDQ(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PIN_IDDQ {\ |
| UNSG32 uPIN_IDDQ_PIN_IDDQ : 1;\ |
| UNSG32 RSVDx8_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PIN_IDDQ; |
| struct w32USB3_Reg_PIN_IDDQ; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PIN_RX_ACJTAG_EN {\ |
| UNSG32 uPIN_RX_ACJTAG_EN_PIN_RX_ACJTAG_EN : 1;\ |
| UNSG32 RSVDxC_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PIN_RX_ACJTAG_EN; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_EN; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PIN_RX_ACJTAG_MODE {\ |
| UNSG32 uPIN_RX_ACJTAG_MODE_PIN_RX_ACJTAG_MODE : 1;\ |
| UNSG32 RSVDx10_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PIN_RX_ACJTAG_MODE; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_MODE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PIN_RX_ACJTAG_AC {\ |
| UNSG32 uPIN_RX_ACJTAG_AC_PIN_RX_ACJTAG_AC : 1;\ |
| UNSG32 RSVDx14_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PIN_RX_ACJTAG_AC; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_AC; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST(r32) _BFGET_(r32, 2, 0) |
| #define SET32USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST(r32,v) _BFSET_(r32, 2, 0,v) |
| #define GET16USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST(r16) _BFGET_(r16, 2, 0) |
| #define SET16USB3_Reg_PIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST(r16,v) _BFSET_(r16, 2, 0,v) |
| |
| #define w32USB3_Reg_PIN_RX_ACJTAG_HYST {\ |
| UNSG32 uPIN_RX_ACJTAG_HYST_PIN_RX_ACJTAG_HYST : 3;\ |
| UNSG32 RSVDx18_b3 : 29;\ |
| } |
| union { UNSG32 u32USB3_Reg_PIN_RX_ACJTAG_HYST; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_HYST; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN(r32) _BFGET_(r32, 7, 0) |
| #define SET32USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN(r16) _BFGET_(r16, 7, 0) |
| #define SET16USB3_Reg_PHY_RESERVED_IN_PHY_RESERVED_IN(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define w32USB3_Reg_PHY_RESERVED_IN {\ |
| UNSG32 uPHY_RESERVED_IN_PHY_RESERVED_IN : 8;\ |
| UNSG32 RSVDx1C_b8 : 24;\ |
| } |
| union { UNSG32 u32USB3_Reg_PHY_RESERVED_IN; |
| struct w32USB3_Reg_PHY_RESERVED_IN; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT(r32) _BFGET_(r32, 7, 0) |
| #define SET32USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT(r16) _BFGET_(r16, 7, 0) |
| #define SET16USB3_Reg_PHY_RESERVED_OUT_PHY_RESERVED_OUT(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define w32USB3_Reg_PHY_RESERVED_OUT {\ |
| UNSG32 uPHY_RESERVED_OUT_PHY_RESERVED_OUT : 8;\ |
| UNSG32 RSVDx20_b8 : 24;\ |
| } |
| union { UNSG32 u32USB3_Reg_PHY_RESERVED_OUT; |
| struct w32USB3_Reg_PHY_RESERVED_OUT; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS(r32) _BFGET_(r32, 7, 0) |
| #define SET32USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS(r16) _BFGET_(r16, 7, 0) |
| #define SET16USB3_Reg_PHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define w32USB3_Reg_PHY_DIG_TEST_BUS {\ |
| UNSG32 uPHY_DIG_TEST_BUS_PHY_DIG_TEST_BUS : 8;\ |
| UNSG32 RSVDx24_b8 : 24;\ |
| } |
| union { UNSG32 u32USB3_Reg_PHY_DIG_TEST_BUS; |
| struct w32USB3_Reg_PHY_DIG_TEST_BUS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_MAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_MAC_PHY_CLK_REQ_N {\ |
| UNSG32 uMAC_PHY_CLK_REQ_N_MAC_PHY_CLK_REQ_N : 1;\ |
| UNSG32 RSVDx28_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_MAC_PHY_CLK_REQ_N; |
| struct w32USB3_Reg_MAC_PHY_CLK_REQ_N; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE(r32) _BFGET_(r32, 1, 0) |
| #define SET32USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE(r32,v) _BFSET_(r32, 1, 0,v) |
| #define GET16USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE(r16) _BFGET_(r16, 1, 0) |
| #define SET16USB3_Reg_MAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE(r16,v) _BFSET_(r16, 1, 0,v) |
| |
| #define w32USB3_Reg_MAC_PHY_TXCOMPLIANCE {\ |
| UNSG32 uMAC_PHY_TXCOMPLIANCE_MAC_PHY_TXCOMPLIANCE : 2;\ |
| UNSG32 RSVDx2C_b2 : 30;\ |
| } |
| union { UNSG32 u32USB3_Reg_MAC_PHY_TXCOMPLIANCE; |
| struct w32USB3_Reg_MAC_PHY_TXCOMPLIANCE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_MAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_MAC_PHY_RXEIDETECT_DIS {\ |
| UNSG32 uMAC_PHY_RXEIDETECT_DIS_MAC_PHY_RXEIDETECT_DIS : 1;\ |
| UNSG32 RSVDx30_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_MAC_PHY_RXEIDETECT_DIS; |
| struct w32USB3_Reg_MAC_PHY_RXEIDETECT_DIS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_MAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS {\ |
| UNSG32 uMAC_PHY_TXCMN_MODE_DIS_MAC_PHY_TXCMN_MODE_DIS : 1;\ |
| UNSG32 RSVDx34_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS; |
| struct w32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PHY_MAC_CLK_ACK_N {\ |
| UNSG32 uPHY_MAC_CLK_ACK_N_PHY_MAC_CLK_ACK_N : 1;\ |
| UNSG32 RSVDx38_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PHY_MAC_CLK_ACK_N; |
| struct w32USB3_Reg_PHY_MAC_CLK_ACK_N; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PHY_PAD_CLKREQ_EN_N {\ |
| UNSG32 uPHY_PAD_CLKREQ_EN_N_PHY_PAD_CLKREQ_EN_N : 1;\ |
| UNSG32 RSVDx3C_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PHY_PAD_CLKREQ_EN_N; |
| struct w32USB3_Reg_PHY_PAD_CLKREQ_EN_N; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_PHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_PHY_RCB_REFCLK_RX_EN {\ |
| UNSG32 uPHY_RCB_REFCLK_RX_EN_PHY_RCB_REFCLK_RX_EN : 1;\ |
| UNSG32 RSVDx40_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_PHY_RCB_REFCLK_RX_EN; |
| struct w32USB3_Reg_PHY_RCB_REFCLK_RX_EN; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_LANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_LANE_ALIGN_REFCLK {\ |
| UNSG32 uLANE_ALIGN_REFCLK_LANE_ALIGN_REFCLK : 1;\ |
| UNSG32 RSVDx44_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_LANE_ALIGN_REFCLK; |
| struct w32USB3_Reg_LANE_ALIGN_REFCLK; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_LANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE {\ |
| UNSG32 uLANE_ALIGN_REFCLK_SOURCE_LANE_ALIGN_REFCLK_SOURCE : 1;\ |
| UNSG32 RSVDx48_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE; |
| struct w32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_fladj_fladj(r32) _BFGET_(r32, 5, 0) |
| #define SET32USB3_Reg_fladj_fladj(r32,v) _BFSET_(r32, 5, 0,v) |
| #define GET16USB3_Reg_fladj_fladj(r16) _BFGET_(r16, 5, 0) |
| #define SET16USB3_Reg_fladj_fladj(r16,v) _BFSET_(r16, 5, 0,v) |
| |
| #define w32USB3_Reg_fladj {\ |
| UNSG32 ufladj_fladj : 6;\ |
| UNSG32 RSVDx4C_b6 : 26;\ |
| } |
| union { UNSG32 u32USB3_Reg_fladj; |
| struct w32USB3_Reg_fladj; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_txdetectrx_sys_txdetectrx_sys(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_txdetectrx_sys_txdetectrx_sys(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_txdetectrx_sys_txdetectrx_sys(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_txdetectrx_sys_txdetectrx_sys(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_txdetectrx_sys {\ |
| UNSG32 utxdetectrx_sys_txdetectrx_sys : 1;\ |
| UNSG32 RSVDx50_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_txdetectrx_sys; |
| struct w32USB3_Reg_txdetectrx_sys; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_port_ss_power_en_port_ss_power_en(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_port_ss_power_en_port_ss_power_en(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_port_ss_power_en_port_ss_power_en(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_port_ss_power_en_port_ss_power_en(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_port_ss_power_en {\ |
| UNSG32 uport_ss_power_en_port_ss_power_en : 1;\ |
| UNSG32 RSVDx54_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_port_ss_power_en; |
| struct w32USB3_Reg_port_ss_power_en; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_port_hs_power_en_port_hs_power_en(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_port_hs_power_en_port_hs_power_en(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_port_hs_power_en_port_hs_power_en(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_port_hs_power_en_port_hs_power_en(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_port_hs_power_en {\ |
| UNSG32 uport_hs_power_en_port_hs_power_en : 1;\ |
| UNSG32 RSVDx58_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_port_hs_power_en; |
| struct w32USB3_Reg_port_hs_power_en; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDx5C [4]; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_wakeup_wakeup(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_wakeup_wakeup(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_wakeup_wakeup(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_wakeup_wakeup(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_wakeup {\ |
| UNSG32 uwakeup_wakeup : 1;\ |
| UNSG32 RSVDx60_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_wakeup; |
| struct w32USB3_Reg_wakeup; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_device_int_device_int(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_device_int_device_int(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_device_int_device_int(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_device_int_device_int(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_device_int {\ |
| UNSG32 udevice_int_device_int : 1;\ |
| UNSG32 RSVDx64_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_device_int; |
| struct w32USB3_Reg_device_int; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_powerdown_p3_wp_powerdown_p3_wp(r32) _BFGET_(r32, 1, 0) |
| #define SET32USB3_Reg_powerdown_p3_wp_powerdown_p3_wp(r32,v) _BFSET_(r32, 1, 0,v) |
| #define GET16USB3_Reg_powerdown_p3_wp_powerdown_p3_wp(r16) _BFGET_(r16, 1, 0) |
| #define SET16USB3_Reg_powerdown_p3_wp_powerdown_p3_wp(r16,v) _BFSET_(r16, 1, 0,v) |
| |
| #define w32USB3_Reg_powerdown_p3_wp {\ |
| UNSG32 upowerdown_p3_wp_powerdown_p3_wp : 2;\ |
| UNSG32 RSVDx68_b2 : 30;\ |
| } |
| union { UNSG32 u32USB3_Reg_powerdown_p3_wp; |
| struct w32USB3_Reg_powerdown_p3_wp; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDx6C [4]; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_msi_msg_sent_msi_msg_sent(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_msi_msg_sent_msi_msg_sent(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_msi_msg_sent_msi_msg_sent(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_msi_msg_sent_msi_msg_sent(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_msi_msg_sent {\ |
| UNSG32 umsi_msg_sent_msi_msg_sent : 1;\ |
| UNSG32 RSVDx70_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_msi_msg_sent; |
| struct w32USB3_Reg_msi_msg_sent; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_bridge_rstn_bridge_rstn(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_bridge_rstn_bridge_rstn(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_bridge_rstn_bridge_rstn(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_bridge_rstn_bridge_rstn(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_bridge_rstn {\ |
| UNSG32 ubridge_rstn_bridge_rstn : 1;\ |
| UNSG32 RSVDx74_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_bridge_rstn; |
| struct w32USB3_Reg_bridge_rstn; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_dbg_dis_ss_in_burst_dbg_dis_ss_in_burst(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_dbg_dis_ss_in_burst {\ |
| UNSG32 udbg_dis_ss_in_burst_dbg_dis_ss_in_burst : 1;\ |
| UNSG32 RSVDx78_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_dbg_dis_ss_in_burst; |
| struct w32USB3_Reg_dbg_dis_ss_in_burst; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX(r32) _BFGET_(r32, 3, 0) |
| #define SET32USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX(r32,v) _BFSET_(r32, 3, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX(r16) _BFGET_(r16, 3, 0) |
| #define SET16USB3_Reg_USB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX(r16,v) _BFSET_(r16, 3, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_PHY_GEN_RX {\ |
| UNSG32 uUSB3_PIN_PHY_GEN_RX_USB3_PIN_PHY_GEN_RX : 4;\ |
| UNSG32 RSVDx7C_b4 : 28;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_PHY_GEN_RX; |
| struct w32USB3_Reg_USB3_PIN_PHY_GEN_RX; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX(r32) _BFGET_(r32, 3, 0) |
| #define SET32USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX(r32,v) _BFSET_(r32, 3, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX(r16) _BFGET_(r16, 3, 0) |
| #define SET16USB3_Reg_USB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX(r16,v) _BFSET_(r16, 3, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_PHY_GEN_TX {\ |
| UNSG32 uUSB3_PIN_PHY_GEN_TX_USB3_PIN_PHY_GEN_TX : 4;\ |
| UNSG32 RSVDx80_b4 : 28;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_PHY_GEN_TX; |
| struct w32USB3_Reg_USB3_PIN_PHY_GEN_TX; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_PU_PLL_USB3_PIN_PU_PLL(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_PU_PLL {\ |
| UNSG32 uUSB3_PIN_PU_PLL_USB3_PIN_PU_PLL : 1;\ |
| UNSG32 RSVDx84_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_PU_PLL; |
| struct w32USB3_Reg_USB3_PIN_PU_PLL; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_PU_RX_USB3_PIN_PU_RX(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_PU_RX {\ |
| UNSG32 uUSB3_PIN_PU_RX_USB3_PIN_PU_RX : 1;\ |
| UNSG32 RSVDx88_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_PU_RX; |
| struct w32USB3_Reg_USB3_PIN_PU_RX; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_PU_TX_USB3_PIN_PU_TX(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_PU_TX {\ |
| UNSG32 uUSB3_PIN_PU_TX_USB3_PIN_PU_TX : 1;\ |
| UNSG32 RSVDx8C_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_PU_TX; |
| struct w32USB3_Reg_USB3_PIN_PU_TX; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_ICC50UA_BYPASS {\ |
| UNSG32 uUSB3_PIN_ICC50UA_BYPASS_USB3_PIN_ICC50UA_BYPASS : 1;\ |
| UNSG32 RSVDx90_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_ICC50UA_BYPASS; |
| struct w32USB3_Reg_USB3_PIN_ICC50UA_BYPASS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_IPP50UA_BYPASS {\ |
| UNSG32 uUSB3_PIN_IPP50UA_BYPASS_USB3_PIN_IPP50UA_BYPASS : 1;\ |
| UNSG32 RSVDx94_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_IPP50UA_BYPASS; |
| struct w32USB3_Reg_USB3_PIN_IPP50UA_BYPASS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS {\ |
| UNSG32 uUSB3_PIN_IPTAT20UA_BYPASS_USB3_PIN_IPTAT20UA_BYPASS : 1;\ |
| UNSG32 RSVDx98_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS; |
| struct w32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_REFCLK_DIS {\ |
| UNSG32 uUSB3_PIN_REFCLK_DIS_USB3_PIN_REFCLK_DIS : 1;\ |
| UNSG32 RSVDx9C_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_REFCLK_DIS; |
| struct w32USB3_Reg_USB3_PIN_REFCLK_DIS; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_PU_IVREF {\ |
| UNSG32 uUSB3_PIN_PU_IVREF_USB3_PIN_PU_IVREF : 1;\ |
| UNSG32 RSVDxA0_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_PU_IVREF; |
| struct w32USB3_Reg_USB3_PIN_PU_IVREF; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP {\ |
| UNSG32 uUSB3_PIN_RX_ACJTAG_RXP_USB3_PIN_RX_ACJTAG_RXP : 1;\ |
| UNSG32 RSVDxA4_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP; |
| struct w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN {\ |
| UNSG32 uUSB3_PIN_RX_ACJTAG_RXN_USB3_PIN_RX_ACJTAG_RXN : 1;\ |
| UNSG32 RSVDxA8_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN; |
| struct w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV(r32) _BFGET_(r32, 7, 0) |
| #define SET32USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV(r16) _BFGET_(r16, 7, 0) |
| #define SET16USB3_Reg_USB3_PIN_CID_REV_USB3_PIN_CID_REV(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_CID_REV {\ |
| UNSG32 uUSB3_PIN_CID_REV_USB3_PIN_CID_REV : 8;\ |
| UNSG32 RSVDxAC_b8 : 24;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_CID_REV; |
| struct w32USB3_Reg_USB3_PIN_CID_REV; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32(r32) _BFGET_(r32,31, 0) |
| #define SET32USB3_Reg_USB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32USB3_Reg_USB3_PHY_RESERVED_INPUT_32 {\ |
| UNSG32 uUSB3_PHY_RESERVED_INPUT_32_USB3_RESERVED_INPUT_32 : 32;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PHY_RESERVED_INPUT_32; |
| struct w32USB3_Reg_USB3_PHY_RESERVED_INPUT_32; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64(r32) _BFGET_(r32,31, 0) |
| #define SET32USB3_Reg_USB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32USB3_Reg_USB3_PHY_RESERVED_INPUT_64 {\ |
| UNSG32 uUSB3_PHY_RESERVED_INPUT_64_USB3_RESERVED_INPUT_64 : 32;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PHY_RESERVED_INPUT_64; |
| struct w32USB3_Reg_USB3_PHY_RESERVED_INPUT_64; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT(r32) _BFGET_(r32,15, 0) |
| #define SET32USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT(r16) _BFGET_(r16,15, 0) |
| #define SET16USB3_Reg_USB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define w32USB3_Reg_USB3_PHY_RESERVED_OUTPUT {\ |
| UNSG32 uUSB3_PHY_RESERVED_OUTPUT_USB3_RESERVED_OUTPUT : 16;\ |
| UNSG32 RSVDxB8_b16 : 16;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PHY_RESERVED_OUTPUT; |
| struct w32USB3_Reg_USB3_PHY_RESERVED_OUTPUT; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_RESET_USB3_PIN_RESET(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RESET {\ |
| UNSG32 uUSB3_PIN_RESET_USB3_PIN_RESET : 1;\ |
| UNSG32 RSVDxBC_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RESET; |
| struct w32USB3_Reg_USB3_PIN_RESET; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RESET_CORE {\ |
| UNSG32 uUSB3_PIN_RESET_CORE_USB3_PIN_RESET_CORE : 1;\ |
| UNSG32 RSVDxC0_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RESET_CORE; |
| struct w32USB3_Reg_USB3_PIN_RESET_CORE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_RX_INIT_USB3_PIN_RESET_INIT(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RX_INIT {\ |
| UNSG32 uUSB3_PIN_RX_INIT_USB3_PIN_RESET_INIT : 1;\ |
| UNSG32 RSVDxC4_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RX_INIT; |
| struct w32USB3_Reg_USB3_PIN_RX_INIT; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RX_INIT_DONE {\ |
| UNSG32 uUSB3_PIN_RX_INIT_DONE_USB3_PIN_RESET_INIT_DONE : 1;\ |
| UNSG32 RSVDxC8_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RX_INIT_DONE; |
| struct w32USB3_Reg_USB3_PIN_RX_INIT_DONE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB(r32) _BFGET_(r32,19, 0) |
| #define SET32USB3_Reg_USB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB(r32,v) _BFSET_(r32,19, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RXDATA_LSB {\ |
| UNSG32 uUSB3_PIN_RXDATA_LSB_USB3_PIN_RXDATA_LSB : 20;\ |
| UNSG32 RSVDxCC_b20 : 12;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RXDATA_LSB; |
| struct w32USB3_Reg_USB3_PIN_RXDATA_LSB; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB(r32) _BFGET_(r32,19, 0) |
| #define SET32USB3_Reg_USB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB(r32,v) _BFSET_(r32,19, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_RXDATA_MSB {\ |
| UNSG32 uUSB3_PIN_RXDATA_MSB_USB3_PIN_RXDATA_MSB : 20;\ |
| UNSG32 RSVDxD0_b20 : 12;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_RXDATA_MSB; |
| struct w32USB3_Reg_USB3_PIN_RXDATA_MSB; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_SNRZ_MODE {\ |
| UNSG32 uUSB3_PIN_SNRZ_MODE_USB3_PIN_SNRZ_MODE : 1;\ |
| UNSG32 RSVDxD4_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_SNRZ_MODE; |
| struct w32USB3_Reg_USB3_PIN_SNRZ_MODE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD(r32) _BFGET_(r32,19, 0) |
| #define SET32USB3_Reg_USB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD(r32,v) _BFSET_(r32,19, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_SNRZ_RXD {\ |
| UNSG32 uUSB3_PIN_SNRZ_RXD_USB3_PIN_SNRZ_RXD : 20;\ |
| UNSG32 RSVDxD8_b20 : 12;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_SNRZ_RXD; |
| struct w32USB3_Reg_USB3_PIN_SNRZ_RXD; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD(r32) _BFGET_(r32,19, 0) |
| #define SET32USB3_Reg_USB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD(r32,v) _BFSET_(r32,19, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_SNRZ_TXD {\ |
| UNSG32 uUSB3_PIN_SNRZ_TXD_USB3_PIN_SNRZ_TXD : 20;\ |
| UNSG32 RSVDxDC_b20 : 12;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_SNRZ_TXD; |
| struct w32USB3_Reg_USB3_PIN_SNRZ_TXD; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_SQ_DETECTED {\ |
| UNSG32 uUSB3_PIN_SQ_DETECTED_USB3_PIN_SQ_DETECTED : 1;\ |
| UNSG32 RSVDxE0_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_SQ_DETECTED; |
| struct w32USB3_Reg_USB3_PIN_SQ_DETECTED; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_SYNC_FOUND {\ |
| UNSG32 uUSB3_PIN_SYNC_FOUND_USB3_PIN_SYNC_FOUND : 1;\ |
| UNSG32 RSVDxE4_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_SYNC_FOUND; |
| struct w32USB3_Reg_USB3_PIN_SYNC_FOUND; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB3_Reg_USB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_TX_IDLE {\ |
| UNSG32 uUSB3_PIN_TX_IDLE_USB3_PIN_TX_IDLE : 1;\ |
| UNSG32 RSVDxE8_b1 : 31;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_TX_IDLE; |
| struct w32USB3_Reg_USB3_PIN_TX_IDLE; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB(r32) _BFGET_(r32,19, 0) |
| #define SET32USB3_Reg_USB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB(r32,v) _BFSET_(r32,19, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_TXDATA_LSB {\ |
| UNSG32 uUSB3_PIN_TXDATA_LSB_USB3_PIN_TXDATA_LSB : 20;\ |
| UNSG32 RSVDxEC_b20 : 12;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_TXDATA_LSB; |
| struct w32USB3_Reg_USB3_PIN_TXDATA_LSB; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB(r32) _BFGET_(r32,19, 0) |
| #define SET32USB3_Reg_USB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB(r32,v) _BFSET_(r32,19, 0,v) |
| |
| #define w32USB3_Reg_USB3_PIN_TXDATA_MSB {\ |
| UNSG32 uUSB3_PIN_TXDATA_MSB_USB3_PIN_TXDATA_MSB : 20;\ |
| UNSG32 RSVDxF0_b20 : 12;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_PIN_TXDATA_MSB; |
| struct w32USB3_Reg_USB3_PIN_TXDATA_MSB; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_SPARE_0_USB3_SPARE_0(r32) _BFGET_(r32,31, 0) |
| #define SET32USB3_Reg_USB3_SPARE_0_USB3_SPARE_0(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32USB3_Reg_USB3_SPARE_0 {\ |
| UNSG32 uUSB3_SPARE_0_USB3_SPARE_0 : 32;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_SPARE_0; |
| struct w32USB3_Reg_USB3_SPARE_0; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_SPARE_1_USB3_SPARE_1(r32) _BFGET_(r32,31, 0) |
| #define SET32USB3_Reg_USB3_SPARE_1_USB3_SPARE_1(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32USB3_Reg_USB3_SPARE_1 {\ |
| UNSG32 uUSB3_SPARE_1_USB3_SPARE_1 : 32;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_SPARE_1; |
| struct w32USB3_Reg_USB3_SPARE_1; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB3_Reg_USB3_SPARE_2_USB3_SPARE_2(r32) _BFGET_(r32,31, 0) |
| #define SET32USB3_Reg_USB3_SPARE_2_USB3_SPARE_2(r32,v) _BFSET_(r32,31, 0,v) |
| |
| #define w32USB3_Reg_USB3_SPARE_2 {\ |
| UNSG32 uUSB3_SPARE_2_USB3_SPARE_2 : 32;\ |
| } |
| union { UNSG32 u32USB3_Reg_USB3_SPARE_2; |
| struct w32USB3_Reg_USB3_SPARE_2; |
| }; |
| /////////////////////////////////////////////////////////// |
| } SIE_USB3_Reg; |
| |
| typedef union T32USB3_Reg_PIN_PIPE_SEL |
| { UNSG32 u32; |
| struct w32USB3_Reg_PIN_PIPE_SEL; |
| } T32USB3_Reg_PIN_PIPE_SEL; |
| typedef union T32USB3_Reg_CORE_RST_N |
| { UNSG32 u32; |
| struct w32USB3_Reg_CORE_RST_N; |
| } T32USB3_Reg_CORE_RST_N; |
| typedef union T32USB3_Reg_PIN_IDDQ |
| { UNSG32 u32; |
| struct w32USB3_Reg_PIN_IDDQ; |
| } T32USB3_Reg_PIN_IDDQ; |
| typedef union T32USB3_Reg_PIN_RX_ACJTAG_EN |
| { UNSG32 u32; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_EN; |
| } T32USB3_Reg_PIN_RX_ACJTAG_EN; |
| typedef union T32USB3_Reg_PIN_RX_ACJTAG_MODE |
| { UNSG32 u32; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_MODE; |
| } T32USB3_Reg_PIN_RX_ACJTAG_MODE; |
| typedef union T32USB3_Reg_PIN_RX_ACJTAG_AC |
| { UNSG32 u32; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_AC; |
| } T32USB3_Reg_PIN_RX_ACJTAG_AC; |
| typedef union T32USB3_Reg_PIN_RX_ACJTAG_HYST |
| { UNSG32 u32; |
| struct w32USB3_Reg_PIN_RX_ACJTAG_HYST; |
| } T32USB3_Reg_PIN_RX_ACJTAG_HYST; |
| typedef union T32USB3_Reg_PHY_RESERVED_IN |
| { UNSG32 u32; |
| struct w32USB3_Reg_PHY_RESERVED_IN; |
| } T32USB3_Reg_PHY_RESERVED_IN; |
| typedef union T32USB3_Reg_PHY_RESERVED_OUT |
| { UNSG32 u32; |
| struct w32USB3_Reg_PHY_RESERVED_OUT; |
| } T32USB3_Reg_PHY_RESERVED_OUT; |
| typedef union T32USB3_Reg_PHY_DIG_TEST_BUS |
| { UNSG32 u32; |
| struct w32USB3_Reg_PHY_DIG_TEST_BUS; |
| } T32USB3_Reg_PHY_DIG_TEST_BUS; |
| typedef union T32USB3_Reg_MAC_PHY_CLK_REQ_N |
| { UNSG32 u32; |
| struct w32USB3_Reg_MAC_PHY_CLK_REQ_N; |
| } T32USB3_Reg_MAC_PHY_CLK_REQ_N; |
| typedef union T32USB3_Reg_MAC_PHY_TXCOMPLIANCE |
| { UNSG32 u32; |
| struct w32USB3_Reg_MAC_PHY_TXCOMPLIANCE; |
| } T32USB3_Reg_MAC_PHY_TXCOMPLIANCE; |
| typedef union T32USB3_Reg_MAC_PHY_RXEIDETECT_DIS |
| { UNSG32 u32; |
| struct w32USB3_Reg_MAC_PHY_RXEIDETECT_DIS; |
| } T32USB3_Reg_MAC_PHY_RXEIDETECT_DIS; |
| typedef union T32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS |
| { UNSG32 u32; |
| struct w32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS; |
| } T32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS; |
| typedef union T32USB3_Reg_PHY_MAC_CLK_ACK_N |
| { UNSG32 u32; |
| struct w32USB3_Reg_PHY_MAC_CLK_ACK_N; |
| } T32USB3_Reg_PHY_MAC_CLK_ACK_N; |
| typedef union T32USB3_Reg_PHY_PAD_CLKREQ_EN_N |
| { UNSG32 u32; |
| struct w32USB3_Reg_PHY_PAD_CLKREQ_EN_N; |
| } T32USB3_Reg_PHY_PAD_CLKREQ_EN_N; |
| typedef union T32USB3_Reg_PHY_RCB_REFCLK_RX_EN |
| { UNSG32 u32; |
| struct w32USB3_Reg_PHY_RCB_REFCLK_RX_EN; |
| } T32USB3_Reg_PHY_RCB_REFCLK_RX_EN; |
| typedef union T32USB3_Reg_LANE_ALIGN_REFCLK |
| { UNSG32 u32; |
| struct w32USB3_Reg_LANE_ALIGN_REFCLK; |
| } T32USB3_Reg_LANE_ALIGN_REFCLK; |
| typedef union T32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE |
| { UNSG32 u32; |
| struct w32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE; |
| } T32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE; |
| typedef union T32USB3_Reg_fladj |
| { UNSG32 u32; |
| struct w32USB3_Reg_fladj; |
| } T32USB3_Reg_fladj; |
| typedef union T32USB3_Reg_txdetectrx_sys |
| { UNSG32 u32; |
| struct w32USB3_Reg_txdetectrx_sys; |
| } T32USB3_Reg_txdetectrx_sys; |
| typedef union T32USB3_Reg_port_ss_power_en |
| { UNSG32 u32; |
| struct w32USB3_Reg_port_ss_power_en; |
| } T32USB3_Reg_port_ss_power_en; |
| typedef union T32USB3_Reg_port_hs_power_en |
| { UNSG32 u32; |
| struct w32USB3_Reg_port_hs_power_en; |
| } T32USB3_Reg_port_hs_power_en; |
| typedef union T32USB3_Reg_wakeup |
| { UNSG32 u32; |
| struct w32USB3_Reg_wakeup; |
| } T32USB3_Reg_wakeup; |
| typedef union T32USB3_Reg_device_int |
| { UNSG32 u32; |
| struct w32USB3_Reg_device_int; |
| } T32USB3_Reg_device_int; |
| typedef union T32USB3_Reg_powerdown_p3_wp |
| { UNSG32 u32; |
| struct w32USB3_Reg_powerdown_p3_wp; |
| } T32USB3_Reg_powerdown_p3_wp; |
| typedef union T32USB3_Reg_msi_msg_sent |
| { UNSG32 u32; |
| struct w32USB3_Reg_msi_msg_sent; |
| } T32USB3_Reg_msi_msg_sent; |
| typedef union T32USB3_Reg_bridge_rstn |
| { UNSG32 u32; |
| struct w32USB3_Reg_bridge_rstn; |
| } T32USB3_Reg_bridge_rstn; |
| typedef union T32USB3_Reg_dbg_dis_ss_in_burst |
| { UNSG32 u32; |
| struct w32USB3_Reg_dbg_dis_ss_in_burst; |
| } T32USB3_Reg_dbg_dis_ss_in_burst; |
| typedef union T32USB3_Reg_USB3_PIN_PHY_GEN_RX |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_PHY_GEN_RX; |
| } T32USB3_Reg_USB3_PIN_PHY_GEN_RX; |
| typedef union T32USB3_Reg_USB3_PIN_PHY_GEN_TX |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_PHY_GEN_TX; |
| } T32USB3_Reg_USB3_PIN_PHY_GEN_TX; |
| typedef union T32USB3_Reg_USB3_PIN_PU_PLL |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_PU_PLL; |
| } T32USB3_Reg_USB3_PIN_PU_PLL; |
| typedef union T32USB3_Reg_USB3_PIN_PU_RX |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_PU_RX; |
| } T32USB3_Reg_USB3_PIN_PU_RX; |
| typedef union T32USB3_Reg_USB3_PIN_PU_TX |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_PU_TX; |
| } T32USB3_Reg_USB3_PIN_PU_TX; |
| typedef union T32USB3_Reg_USB3_PIN_ICC50UA_BYPASS |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_ICC50UA_BYPASS; |
| } T32USB3_Reg_USB3_PIN_ICC50UA_BYPASS; |
| typedef union T32USB3_Reg_USB3_PIN_IPP50UA_BYPASS |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_IPP50UA_BYPASS; |
| } T32USB3_Reg_USB3_PIN_IPP50UA_BYPASS; |
| typedef union T32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS; |
| } T32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS; |
| typedef union T32USB3_Reg_USB3_PIN_REFCLK_DIS |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_REFCLK_DIS; |
| } T32USB3_Reg_USB3_PIN_REFCLK_DIS; |
| typedef union T32USB3_Reg_USB3_PIN_PU_IVREF |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_PU_IVREF; |
| } T32USB3_Reg_USB3_PIN_PU_IVREF; |
| typedef union T32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP; |
| } T32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP; |
| typedef union T32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN; |
| } T32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN; |
| typedef union T32USB3_Reg_USB3_PIN_CID_REV |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_CID_REV; |
| } T32USB3_Reg_USB3_PIN_CID_REV; |
| typedef union T32USB3_Reg_USB3_PHY_RESERVED_INPUT_32 |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PHY_RESERVED_INPUT_32; |
| } T32USB3_Reg_USB3_PHY_RESERVED_INPUT_32; |
| typedef union T32USB3_Reg_USB3_PHY_RESERVED_INPUT_64 |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PHY_RESERVED_INPUT_64; |
| } T32USB3_Reg_USB3_PHY_RESERVED_INPUT_64; |
| typedef union T32USB3_Reg_USB3_PHY_RESERVED_OUTPUT |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PHY_RESERVED_OUTPUT; |
| } T32USB3_Reg_USB3_PHY_RESERVED_OUTPUT; |
| typedef union T32USB3_Reg_USB3_PIN_RESET |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RESET; |
| } T32USB3_Reg_USB3_PIN_RESET; |
| typedef union T32USB3_Reg_USB3_PIN_RESET_CORE |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RESET_CORE; |
| } T32USB3_Reg_USB3_PIN_RESET_CORE; |
| typedef union T32USB3_Reg_USB3_PIN_RX_INIT |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RX_INIT; |
| } T32USB3_Reg_USB3_PIN_RX_INIT; |
| typedef union T32USB3_Reg_USB3_PIN_RX_INIT_DONE |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RX_INIT_DONE; |
| } T32USB3_Reg_USB3_PIN_RX_INIT_DONE; |
| typedef union T32USB3_Reg_USB3_PIN_RXDATA_LSB |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RXDATA_LSB; |
| } T32USB3_Reg_USB3_PIN_RXDATA_LSB; |
| typedef union T32USB3_Reg_USB3_PIN_RXDATA_MSB |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_RXDATA_MSB; |
| } T32USB3_Reg_USB3_PIN_RXDATA_MSB; |
| typedef union T32USB3_Reg_USB3_PIN_SNRZ_MODE |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_SNRZ_MODE; |
| } T32USB3_Reg_USB3_PIN_SNRZ_MODE; |
| typedef union T32USB3_Reg_USB3_PIN_SNRZ_RXD |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_SNRZ_RXD; |
| } T32USB3_Reg_USB3_PIN_SNRZ_RXD; |
| typedef union T32USB3_Reg_USB3_PIN_SNRZ_TXD |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_SNRZ_TXD; |
| } T32USB3_Reg_USB3_PIN_SNRZ_TXD; |
| typedef union T32USB3_Reg_USB3_PIN_SQ_DETECTED |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_SQ_DETECTED; |
| } T32USB3_Reg_USB3_PIN_SQ_DETECTED; |
| typedef union T32USB3_Reg_USB3_PIN_SYNC_FOUND |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_SYNC_FOUND; |
| } T32USB3_Reg_USB3_PIN_SYNC_FOUND; |
| typedef union T32USB3_Reg_USB3_PIN_TX_IDLE |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_TX_IDLE; |
| } T32USB3_Reg_USB3_PIN_TX_IDLE; |
| typedef union T32USB3_Reg_USB3_PIN_TXDATA_LSB |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_TXDATA_LSB; |
| } T32USB3_Reg_USB3_PIN_TXDATA_LSB; |
| typedef union T32USB3_Reg_USB3_PIN_TXDATA_MSB |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_PIN_TXDATA_MSB; |
| } T32USB3_Reg_USB3_PIN_TXDATA_MSB; |
| typedef union T32USB3_Reg_USB3_SPARE_0 |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_SPARE_0; |
| } T32USB3_Reg_USB3_SPARE_0; |
| typedef union T32USB3_Reg_USB3_SPARE_1 |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_SPARE_1; |
| } T32USB3_Reg_USB3_SPARE_1; |
| typedef union T32USB3_Reg_USB3_SPARE_2 |
| { UNSG32 u32; |
| struct w32USB3_Reg_USB3_SPARE_2; |
| } T32USB3_Reg_USB3_SPARE_2; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TUSB3_Reg_PIN_PIPE_SEL |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PIN_PIPE_SEL; |
| }; |
| } TUSB3_Reg_PIN_PIPE_SEL; |
| typedef union TUSB3_Reg_CORE_RST_N |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_CORE_RST_N; |
| }; |
| } TUSB3_Reg_CORE_RST_N; |
| typedef union TUSB3_Reg_PIN_IDDQ |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PIN_IDDQ; |
| }; |
| } TUSB3_Reg_PIN_IDDQ; |
| typedef union TUSB3_Reg_PIN_RX_ACJTAG_EN |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PIN_RX_ACJTAG_EN; |
| }; |
| } TUSB3_Reg_PIN_RX_ACJTAG_EN; |
| typedef union TUSB3_Reg_PIN_RX_ACJTAG_MODE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PIN_RX_ACJTAG_MODE; |
| }; |
| } TUSB3_Reg_PIN_RX_ACJTAG_MODE; |
| typedef union TUSB3_Reg_PIN_RX_ACJTAG_AC |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PIN_RX_ACJTAG_AC; |
| }; |
| } TUSB3_Reg_PIN_RX_ACJTAG_AC; |
| typedef union TUSB3_Reg_PIN_RX_ACJTAG_HYST |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PIN_RX_ACJTAG_HYST; |
| }; |
| } TUSB3_Reg_PIN_RX_ACJTAG_HYST; |
| typedef union TUSB3_Reg_PHY_RESERVED_IN |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PHY_RESERVED_IN; |
| }; |
| } TUSB3_Reg_PHY_RESERVED_IN; |
| typedef union TUSB3_Reg_PHY_RESERVED_OUT |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PHY_RESERVED_OUT; |
| }; |
| } TUSB3_Reg_PHY_RESERVED_OUT; |
| typedef union TUSB3_Reg_PHY_DIG_TEST_BUS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PHY_DIG_TEST_BUS; |
| }; |
| } TUSB3_Reg_PHY_DIG_TEST_BUS; |
| typedef union TUSB3_Reg_MAC_PHY_CLK_REQ_N |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_MAC_PHY_CLK_REQ_N; |
| }; |
| } TUSB3_Reg_MAC_PHY_CLK_REQ_N; |
| typedef union TUSB3_Reg_MAC_PHY_TXCOMPLIANCE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_MAC_PHY_TXCOMPLIANCE; |
| }; |
| } TUSB3_Reg_MAC_PHY_TXCOMPLIANCE; |
| typedef union TUSB3_Reg_MAC_PHY_RXEIDETECT_DIS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_MAC_PHY_RXEIDETECT_DIS; |
| }; |
| } TUSB3_Reg_MAC_PHY_RXEIDETECT_DIS; |
| typedef union TUSB3_Reg_MAC_PHY_TXCMN_MODE_DIS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_MAC_PHY_TXCMN_MODE_DIS; |
| }; |
| } TUSB3_Reg_MAC_PHY_TXCMN_MODE_DIS; |
| typedef union TUSB3_Reg_PHY_MAC_CLK_ACK_N |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PHY_MAC_CLK_ACK_N; |
| }; |
| } TUSB3_Reg_PHY_MAC_CLK_ACK_N; |
| typedef union TUSB3_Reg_PHY_PAD_CLKREQ_EN_N |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PHY_PAD_CLKREQ_EN_N; |
| }; |
| } TUSB3_Reg_PHY_PAD_CLKREQ_EN_N; |
| typedef union TUSB3_Reg_PHY_RCB_REFCLK_RX_EN |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_PHY_RCB_REFCLK_RX_EN; |
| }; |
| } TUSB3_Reg_PHY_RCB_REFCLK_RX_EN; |
| typedef union TUSB3_Reg_LANE_ALIGN_REFCLK |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_LANE_ALIGN_REFCLK; |
| }; |
| } TUSB3_Reg_LANE_ALIGN_REFCLK; |
| typedef union TUSB3_Reg_LANE_ALIGN_REFCLK_SOURCE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_LANE_ALIGN_REFCLK_SOURCE; |
| }; |
| } TUSB3_Reg_LANE_ALIGN_REFCLK_SOURCE; |
| typedef union TUSB3_Reg_fladj |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_fladj; |
| }; |
| } TUSB3_Reg_fladj; |
| typedef union TUSB3_Reg_txdetectrx_sys |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_txdetectrx_sys; |
| }; |
| } TUSB3_Reg_txdetectrx_sys; |
| typedef union TUSB3_Reg_port_ss_power_en |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_port_ss_power_en; |
| }; |
| } TUSB3_Reg_port_ss_power_en; |
| typedef union TUSB3_Reg_port_hs_power_en |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_port_hs_power_en; |
| }; |
| } TUSB3_Reg_port_hs_power_en; |
| typedef union TUSB3_Reg_wakeup |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_wakeup; |
| }; |
| } TUSB3_Reg_wakeup; |
| typedef union TUSB3_Reg_device_int |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_device_int; |
| }; |
| } TUSB3_Reg_device_int; |
| typedef union TUSB3_Reg_powerdown_p3_wp |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_powerdown_p3_wp; |
| }; |
| } TUSB3_Reg_powerdown_p3_wp; |
| typedef union TUSB3_Reg_msi_msg_sent |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_msi_msg_sent; |
| }; |
| } TUSB3_Reg_msi_msg_sent; |
| typedef union TUSB3_Reg_bridge_rstn |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_bridge_rstn; |
| }; |
| } TUSB3_Reg_bridge_rstn; |
| typedef union TUSB3_Reg_dbg_dis_ss_in_burst |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_dbg_dis_ss_in_burst; |
| }; |
| } TUSB3_Reg_dbg_dis_ss_in_burst; |
| typedef union TUSB3_Reg_USB3_PIN_PHY_GEN_RX |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_PHY_GEN_RX; |
| }; |
| } TUSB3_Reg_USB3_PIN_PHY_GEN_RX; |
| typedef union TUSB3_Reg_USB3_PIN_PHY_GEN_TX |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_PHY_GEN_TX; |
| }; |
| } TUSB3_Reg_USB3_PIN_PHY_GEN_TX; |
| typedef union TUSB3_Reg_USB3_PIN_PU_PLL |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_PU_PLL; |
| }; |
| } TUSB3_Reg_USB3_PIN_PU_PLL; |
| typedef union TUSB3_Reg_USB3_PIN_PU_RX |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_PU_RX; |
| }; |
| } TUSB3_Reg_USB3_PIN_PU_RX; |
| typedef union TUSB3_Reg_USB3_PIN_PU_TX |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_PU_TX; |
| }; |
| } TUSB3_Reg_USB3_PIN_PU_TX; |
| typedef union TUSB3_Reg_USB3_PIN_ICC50UA_BYPASS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_ICC50UA_BYPASS; |
| }; |
| } TUSB3_Reg_USB3_PIN_ICC50UA_BYPASS; |
| typedef union TUSB3_Reg_USB3_PIN_IPP50UA_BYPASS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_IPP50UA_BYPASS; |
| }; |
| } TUSB3_Reg_USB3_PIN_IPP50UA_BYPASS; |
| typedef union TUSB3_Reg_USB3_PIN_IPTAT20UA_BYPASS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_IPTAT20UA_BYPASS; |
| }; |
| } TUSB3_Reg_USB3_PIN_IPTAT20UA_BYPASS; |
| typedef union TUSB3_Reg_USB3_PIN_REFCLK_DIS |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_REFCLK_DIS; |
| }; |
| } TUSB3_Reg_USB3_PIN_REFCLK_DIS; |
| typedef union TUSB3_Reg_USB3_PIN_PU_IVREF |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_PU_IVREF; |
| }; |
| } TUSB3_Reg_USB3_PIN_PU_IVREF; |
| typedef union TUSB3_Reg_USB3_PIN_RX_ACJTAG_RXP |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXP; |
| }; |
| } TUSB3_Reg_USB3_PIN_RX_ACJTAG_RXP; |
| typedef union TUSB3_Reg_USB3_PIN_RX_ACJTAG_RXN |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RX_ACJTAG_RXN; |
| }; |
| } TUSB3_Reg_USB3_PIN_RX_ACJTAG_RXN; |
| typedef union TUSB3_Reg_USB3_PIN_CID_REV |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_CID_REV; |
| }; |
| } TUSB3_Reg_USB3_PIN_CID_REV; |
| typedef union TUSB3_Reg_USB3_PHY_RESERVED_INPUT_32 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PHY_RESERVED_INPUT_32; |
| }; |
| } TUSB3_Reg_USB3_PHY_RESERVED_INPUT_32; |
| typedef union TUSB3_Reg_USB3_PHY_RESERVED_INPUT_64 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PHY_RESERVED_INPUT_64; |
| }; |
| } TUSB3_Reg_USB3_PHY_RESERVED_INPUT_64; |
| typedef union TUSB3_Reg_USB3_PHY_RESERVED_OUTPUT |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PHY_RESERVED_OUTPUT; |
| }; |
| } TUSB3_Reg_USB3_PHY_RESERVED_OUTPUT; |
| typedef union TUSB3_Reg_USB3_PIN_RESET |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RESET; |
| }; |
| } TUSB3_Reg_USB3_PIN_RESET; |
| typedef union TUSB3_Reg_USB3_PIN_RESET_CORE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RESET_CORE; |
| }; |
| } TUSB3_Reg_USB3_PIN_RESET_CORE; |
| typedef union TUSB3_Reg_USB3_PIN_RX_INIT |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RX_INIT; |
| }; |
| } TUSB3_Reg_USB3_PIN_RX_INIT; |
| typedef union TUSB3_Reg_USB3_PIN_RX_INIT_DONE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RX_INIT_DONE; |
| }; |
| } TUSB3_Reg_USB3_PIN_RX_INIT_DONE; |
| typedef union TUSB3_Reg_USB3_PIN_RXDATA_LSB |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RXDATA_LSB; |
| }; |
| } TUSB3_Reg_USB3_PIN_RXDATA_LSB; |
| typedef union TUSB3_Reg_USB3_PIN_RXDATA_MSB |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_RXDATA_MSB; |
| }; |
| } TUSB3_Reg_USB3_PIN_RXDATA_MSB; |
| typedef union TUSB3_Reg_USB3_PIN_SNRZ_MODE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_SNRZ_MODE; |
| }; |
| } TUSB3_Reg_USB3_PIN_SNRZ_MODE; |
| typedef union TUSB3_Reg_USB3_PIN_SNRZ_RXD |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_SNRZ_RXD; |
| }; |
| } TUSB3_Reg_USB3_PIN_SNRZ_RXD; |
| typedef union TUSB3_Reg_USB3_PIN_SNRZ_TXD |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_SNRZ_TXD; |
| }; |
| } TUSB3_Reg_USB3_PIN_SNRZ_TXD; |
| typedef union TUSB3_Reg_USB3_PIN_SQ_DETECTED |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_SQ_DETECTED; |
| }; |
| } TUSB3_Reg_USB3_PIN_SQ_DETECTED; |
| typedef union TUSB3_Reg_USB3_PIN_SYNC_FOUND |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_SYNC_FOUND; |
| }; |
| } TUSB3_Reg_USB3_PIN_SYNC_FOUND; |
| typedef union TUSB3_Reg_USB3_PIN_TX_IDLE |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_TX_IDLE; |
| }; |
| } TUSB3_Reg_USB3_PIN_TX_IDLE; |
| typedef union TUSB3_Reg_USB3_PIN_TXDATA_LSB |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_TXDATA_LSB; |
| }; |
| } TUSB3_Reg_USB3_PIN_TXDATA_LSB; |
| typedef union TUSB3_Reg_USB3_PIN_TXDATA_MSB |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_PIN_TXDATA_MSB; |
| }; |
| } TUSB3_Reg_USB3_PIN_TXDATA_MSB; |
| typedef union TUSB3_Reg_USB3_SPARE_0 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_SPARE_0; |
| }; |
| } TUSB3_Reg_USB3_SPARE_0; |
| typedef union TUSB3_Reg_USB3_SPARE_1 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_SPARE_1; |
| }; |
| } TUSB3_Reg_USB3_SPARE_1; |
| typedef union TUSB3_Reg_USB3_SPARE_2 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB3_Reg_USB3_SPARE_2; |
| }; |
| } TUSB3_Reg_USB3_SPARE_2; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 USB3_Reg_drvrd(SIE_USB3_Reg *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 USB3_Reg_drvwr(SIE_USB3_Reg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void USB3_Reg_reset(SIE_USB3_Reg *p); |
| SIGN32 USB3_Reg_cmp (SIE_USB3_Reg *p, SIE_USB3_Reg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define USB3_Reg_check(p,pie,pfx,hLOG) USB3_Reg_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define USB3_Reg_print(p, pfx,hLOG) USB3_Reg_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: USB3_Reg |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE USB2_Reg (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 PU (P) |
| /// %unsigned 1 PU 0x1 |
| /// ### |
| /// * Power up USB XCVR and PLL |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00004 PU_PLL (P) |
| /// %unsigned 1 PU_PLL 0x1 |
| /// ### |
| /// * Power up USB PLL |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00008 SUSPENDM (P) |
| /// %unsigned 1 SUSPENDM 0x1 |
| /// ### |
| /// * Turn on/off USB XCVR |
| /// * 0: off |
| /// * 1: on |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0000C IDDQ_TEST (P) |
| /// %unsigned 1 IDDQ_TEST 0x0 |
| /// ### |
| /// * Turn on/off IDDQ TEST |
| /// * 0: off |
| /// * 1: on |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00010 REG_DISABLE_EL16 (R-) |
| /// %unsigned 1 REG_DISABLE_EL16 0x0 |
| /// ### |
| /// * To disable EL16 compliance test enhancement. |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00014 REG_VBUSDTC_OUT (P) |
| /// %unsigned 1 REG_VBUSDTC_OUT 0x0 |
| /// ### |
| /// * VBUS Detect Signal. |
| /// * 1: VBUS > 0.8V |
| /// * 0: VBUS < 0.6V . |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00018 REG_TX_BITSTUFF_EN (P) |
| /// %unsigned 1 REG_TX_BITSTUFF_EN 0x1 |
| /// ### |
| /// * Control the TX_BITSTUFF_EN bit in USB PHY |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0001C REG_TX_BITSTUFF_ENH (P) |
| /// %unsigned 1 REG_TX_BITSTUFF_ENH 0x1 |
| /// ### |
| /// * Control the TX_BITSTUFF_ENH bit in USB PHY (not used) |
| /// * *INTERNAL_ONLY** |
| /// * Below are UTMI level 3 signals that are not supported by current mac |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00020 PHY_RESERVE_IN (R-) |
| /// %unsigned 8 PHY_RESERVE_IN 0x0 |
| /// ### |
| /// * 8 reserved input pins |
| /// ### |
| /// %% 24 # Stuffing bits... |
| /// @ 0x00024 PHY_RESERVE_OUT (R-) |
| /// %unsigned 8 PHY_RESERVE_OUT 0x0 |
| /// ### |
| /// * 8 reserved output pins |
| /// ### |
| /// %% 24 # Stuffing bits... |
| /// @ 0x00028 PHY_MON (P) |
| /// %unsigned 16 PHY_MON 0x0 |
| /// ### |
| /// * PHY monitor bus |
| /// ### |
| /// %% 16 # Stuffing bits... |
| /// @ 0x0002C utmi_bitstuffen (P) |
| /// %unsigned 1 utmi_bitstuffen 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00030 utmi_bitstuffenh (P) |
| /// %unsigned 1 utmi_bitstuffenh 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00034 utmi_fslsserialmode (P) |
| /// %unsigned 1 utmi_fslsserialmode 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00038 utmi_txenable_n (P) |
| /// %unsigned 1 utmi_txenable_n 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0003C (W-) |
| /// # # Stuffing bytes... |
| /// %% 32 |
| /// @ 0x00040 utmi_txdat (P) |
| /// %unsigned 1 utmi_txdat 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00044 utmi_txse0 (P) |
| /// %unsigned 1 utmi_txse0 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00048 utmi_rxdp (R-) |
| /// %unsigned 1 utmi_rxdp 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0004C utmi_rxdm (R-) |
| /// %unsigned 1 utmi_rxdm 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00050 utmi_rxrcv (R-) |
| /// %unsigned 1 utmi_rxrcv 0x0 |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00054 use_usb3 (RW) |
| /// %unsigned 1 use_usb3 0x1 |
| /// ### |
| /// * Determine whether to use usb3 mac to control usb2 phy |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 88B, bits: 50b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_USB2_Reg |
| #define h_USB2_Reg (){} |
| |
| #define RA_USB2_Reg_PU 0x0000 |
| |
| #define BA_USB2_Reg_PU_PU 0x0000 |
| #define B16USB2_Reg_PU_PU 0x0000 |
| #define LSb32USB2_Reg_PU_PU 0 |
| #define LSb16USB2_Reg_PU_PU 0 |
| #define bUSB2_Reg_PU_PU 1 |
| #define MSK32USB2_Reg_PU_PU 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_PU_PLL 0x0004 |
| |
| #define BA_USB2_Reg_PU_PLL_PU_PLL 0x0004 |
| #define B16USB2_Reg_PU_PLL_PU_PLL 0x0004 |
| #define LSb32USB2_Reg_PU_PLL_PU_PLL 0 |
| #define LSb16USB2_Reg_PU_PLL_PU_PLL 0 |
| #define bUSB2_Reg_PU_PLL_PU_PLL 1 |
| #define MSK32USB2_Reg_PU_PLL_PU_PLL 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_SUSPENDM 0x0008 |
| |
| #define BA_USB2_Reg_SUSPENDM_SUSPENDM 0x0008 |
| #define B16USB2_Reg_SUSPENDM_SUSPENDM 0x0008 |
| #define LSb32USB2_Reg_SUSPENDM_SUSPENDM 0 |
| #define LSb16USB2_Reg_SUSPENDM_SUSPENDM 0 |
| #define bUSB2_Reg_SUSPENDM_SUSPENDM 1 |
| #define MSK32USB2_Reg_SUSPENDM_SUSPENDM 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_IDDQ_TEST 0x000C |
| |
| #define BA_USB2_Reg_IDDQ_TEST_IDDQ_TEST 0x000C |
| #define B16USB2_Reg_IDDQ_TEST_IDDQ_TEST 0x000C |
| #define LSb32USB2_Reg_IDDQ_TEST_IDDQ_TEST 0 |
| #define LSb16USB2_Reg_IDDQ_TEST_IDDQ_TEST 0 |
| #define bUSB2_Reg_IDDQ_TEST_IDDQ_TEST 1 |
| #define MSK32USB2_Reg_IDDQ_TEST_IDDQ_TEST 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_REG_DISABLE_EL16 0x0010 |
| |
| #define BA_USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16 0x0010 |
| #define B16USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16 0x0010 |
| #define LSb32USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16 0 |
| #define LSb16USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16 0 |
| #define bUSB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16 1 |
| #define MSK32USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_REG_VBUSDTC_OUT 0x0014 |
| |
| #define BA_USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT 0x0014 |
| #define B16USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT 0x0014 |
| #define LSb32USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT 0 |
| #define LSb16USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT 0 |
| #define bUSB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT 1 |
| #define MSK32USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_REG_TX_BITSTUFF_EN 0x0018 |
| |
| #define BA_USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN 0x0018 |
| #define B16USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN 0x0018 |
| #define LSb32USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN 0 |
| #define LSb16USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN 0 |
| #define bUSB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN 1 |
| #define MSK32USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_REG_TX_BITSTUFF_ENH 0x001C |
| |
| #define BA_USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH 0x001C |
| #define B16USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH 0x001C |
| #define LSb32USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH 0 |
| #define LSb16USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH 0 |
| #define bUSB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH 1 |
| #define MSK32USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_PHY_RESERVE_IN 0x0020 |
| |
| #define BA_USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN 0x0020 |
| #define B16USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN 0x0020 |
| #define LSb32USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN 0 |
| #define LSb16USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN 0 |
| #define bUSB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN 8 |
| #define MSK32USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN 0x000000FF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_PHY_RESERVE_OUT 0x0024 |
| |
| #define BA_USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT 0x0024 |
| #define B16USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT 0x0024 |
| #define LSb32USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT 0 |
| #define LSb16USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT 0 |
| #define bUSB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT 8 |
| #define MSK32USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT 0x000000FF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_PHY_MON 0x0028 |
| |
| #define BA_USB2_Reg_PHY_MON_PHY_MON 0x0028 |
| #define B16USB2_Reg_PHY_MON_PHY_MON 0x0028 |
| #define LSb32USB2_Reg_PHY_MON_PHY_MON 0 |
| #define LSb16USB2_Reg_PHY_MON_PHY_MON 0 |
| #define bUSB2_Reg_PHY_MON_PHY_MON 16 |
| #define MSK32USB2_Reg_PHY_MON_PHY_MON 0x0000FFFF |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_bitstuffen 0x002C |
| |
| #define BA_USB2_Reg_utmi_bitstuffen_utmi_bitstuffen 0x002C |
| #define B16USB2_Reg_utmi_bitstuffen_utmi_bitstuffen 0x002C |
| #define LSb32USB2_Reg_utmi_bitstuffen_utmi_bitstuffen 0 |
| #define LSb16USB2_Reg_utmi_bitstuffen_utmi_bitstuffen 0 |
| #define bUSB2_Reg_utmi_bitstuffen_utmi_bitstuffen 1 |
| #define MSK32USB2_Reg_utmi_bitstuffen_utmi_bitstuffen 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_bitstuffenh 0x0030 |
| |
| #define BA_USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh 0x0030 |
| #define B16USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh 0x0030 |
| #define LSb32USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh 0 |
| #define LSb16USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh 0 |
| #define bUSB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh 1 |
| #define MSK32USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_fslsserialmode 0x0034 |
| |
| #define BA_USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode 0x0034 |
| #define B16USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode 0x0034 |
| #define LSb32USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode 0 |
| #define LSb16USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode 0 |
| #define bUSB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode 1 |
| #define MSK32USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_txenable_n 0x0038 |
| |
| #define BA_USB2_Reg_utmi_txenable_n_utmi_txenable_n 0x0038 |
| #define B16USB2_Reg_utmi_txenable_n_utmi_txenable_n 0x0038 |
| #define LSb32USB2_Reg_utmi_txenable_n_utmi_txenable_n 0 |
| #define LSb16USB2_Reg_utmi_txenable_n_utmi_txenable_n 0 |
| #define bUSB2_Reg_utmi_txenable_n_utmi_txenable_n 1 |
| #define MSK32USB2_Reg_utmi_txenable_n_utmi_txenable_n 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_txdat 0x0040 |
| |
| #define BA_USB2_Reg_utmi_txdat_utmi_txdat 0x0040 |
| #define B16USB2_Reg_utmi_txdat_utmi_txdat 0x0040 |
| #define LSb32USB2_Reg_utmi_txdat_utmi_txdat 0 |
| #define LSb16USB2_Reg_utmi_txdat_utmi_txdat 0 |
| #define bUSB2_Reg_utmi_txdat_utmi_txdat 1 |
| #define MSK32USB2_Reg_utmi_txdat_utmi_txdat 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_txse0 0x0044 |
| |
| #define BA_USB2_Reg_utmi_txse0_utmi_txse0 0x0044 |
| #define B16USB2_Reg_utmi_txse0_utmi_txse0 0x0044 |
| #define LSb32USB2_Reg_utmi_txse0_utmi_txse0 0 |
| #define LSb16USB2_Reg_utmi_txse0_utmi_txse0 0 |
| #define bUSB2_Reg_utmi_txse0_utmi_txse0 1 |
| #define MSK32USB2_Reg_utmi_txse0_utmi_txse0 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_rxdp 0x0048 |
| |
| #define BA_USB2_Reg_utmi_rxdp_utmi_rxdp 0x0048 |
| #define B16USB2_Reg_utmi_rxdp_utmi_rxdp 0x0048 |
| #define LSb32USB2_Reg_utmi_rxdp_utmi_rxdp 0 |
| #define LSb16USB2_Reg_utmi_rxdp_utmi_rxdp 0 |
| #define bUSB2_Reg_utmi_rxdp_utmi_rxdp 1 |
| #define MSK32USB2_Reg_utmi_rxdp_utmi_rxdp 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_rxdm 0x004C |
| |
| #define BA_USB2_Reg_utmi_rxdm_utmi_rxdm 0x004C |
| #define B16USB2_Reg_utmi_rxdm_utmi_rxdm 0x004C |
| #define LSb32USB2_Reg_utmi_rxdm_utmi_rxdm 0 |
| #define LSb16USB2_Reg_utmi_rxdm_utmi_rxdm 0 |
| #define bUSB2_Reg_utmi_rxdm_utmi_rxdm 1 |
| #define MSK32USB2_Reg_utmi_rxdm_utmi_rxdm 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_utmi_rxrcv 0x0050 |
| |
| #define BA_USB2_Reg_utmi_rxrcv_utmi_rxrcv 0x0050 |
| #define B16USB2_Reg_utmi_rxrcv_utmi_rxrcv 0x0050 |
| #define LSb32USB2_Reg_utmi_rxrcv_utmi_rxrcv 0 |
| #define LSb16USB2_Reg_utmi_rxrcv_utmi_rxrcv 0 |
| #define bUSB2_Reg_utmi_rxrcv_utmi_rxrcv 1 |
| #define MSK32USB2_Reg_utmi_rxrcv_utmi_rxrcv 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB2_Reg_use_usb3 0x0054 |
| |
| #define BA_USB2_Reg_use_usb3_use_usb3 0x0054 |
| #define B16USB2_Reg_use_usb3_use_usb3 0x0054 |
| #define LSb32USB2_Reg_use_usb3_use_usb3 0 |
| #define LSb16USB2_Reg_use_usb3_use_usb3 0 |
| #define bUSB2_Reg_use_usb3_use_usb3 1 |
| #define MSK32USB2_Reg_use_usb3_use_usb3 0x00000001 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_USB2_Reg { |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_PU_PU(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_PU_PU(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_PU_PU(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_PU_PU(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_PU {\ |
| UNSG32 uPU_PU : 1;\ |
| UNSG32 RSVDx0_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_PU; |
| struct w32USB2_Reg_PU; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_PU_PLL_PU_PLL(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_PU_PLL_PU_PLL(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_PU_PLL_PU_PLL(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_PU_PLL_PU_PLL(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_PU_PLL {\ |
| UNSG32 uPU_PLL_PU_PLL : 1;\ |
| UNSG32 RSVDx4_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_PU_PLL; |
| struct w32USB2_Reg_PU_PLL; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_SUSPENDM_SUSPENDM(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_SUSPENDM_SUSPENDM(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_SUSPENDM_SUSPENDM(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_SUSPENDM_SUSPENDM(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_SUSPENDM {\ |
| UNSG32 uSUSPENDM_SUSPENDM : 1;\ |
| UNSG32 RSVDx8_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_SUSPENDM; |
| struct w32USB2_Reg_SUSPENDM; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_IDDQ_TEST_IDDQ_TEST(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_IDDQ_TEST_IDDQ_TEST(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_IDDQ_TEST_IDDQ_TEST(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_IDDQ_TEST_IDDQ_TEST(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_IDDQ_TEST {\ |
| UNSG32 uIDDQ_TEST_IDDQ_TEST : 1;\ |
| UNSG32 RSVDxC_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_IDDQ_TEST; |
| struct w32USB2_Reg_IDDQ_TEST; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_REG_DISABLE_EL16_REG_DISABLE_EL16(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_REG_DISABLE_EL16 {\ |
| UNSG32 uREG_DISABLE_EL16_REG_DISABLE_EL16 : 1;\ |
| UNSG32 RSVDx10_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_REG_DISABLE_EL16; |
| struct w32USB2_Reg_REG_DISABLE_EL16; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_REG_VBUSDTC_OUT_REG_VBUSDTC_OUT(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_REG_VBUSDTC_OUT {\ |
| UNSG32 uREG_VBUSDTC_OUT_REG_VBUSDTC_OUT : 1;\ |
| UNSG32 RSVDx14_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_REG_VBUSDTC_OUT; |
| struct w32USB2_Reg_REG_VBUSDTC_OUT; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_REG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_REG_TX_BITSTUFF_EN {\ |
| UNSG32 uREG_TX_BITSTUFF_EN_REG_TX_BITSTUFF_EN : 1;\ |
| UNSG32 RSVDx18_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_REG_TX_BITSTUFF_EN; |
| struct w32USB2_Reg_REG_TX_BITSTUFF_EN; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_REG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_REG_TX_BITSTUFF_ENH {\ |
| UNSG32 uREG_TX_BITSTUFF_ENH_REG_TX_BITSTUFF_ENH : 1;\ |
| UNSG32 RSVDx1C_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_REG_TX_BITSTUFF_ENH; |
| struct w32USB2_Reg_REG_TX_BITSTUFF_ENH; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN(r32) _BFGET_(r32, 7, 0) |
| #define SET32USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN(r16) _BFGET_(r16, 7, 0) |
| #define SET16USB2_Reg_PHY_RESERVE_IN_PHY_RESERVE_IN(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define w32USB2_Reg_PHY_RESERVE_IN {\ |
| UNSG32 uPHY_RESERVE_IN_PHY_RESERVE_IN : 8;\ |
| UNSG32 RSVDx20_b8 : 24;\ |
| } |
| union { UNSG32 u32USB2_Reg_PHY_RESERVE_IN; |
| struct w32USB2_Reg_PHY_RESERVE_IN; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT(r32) _BFGET_(r32, 7, 0) |
| #define SET32USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT(r32,v) _BFSET_(r32, 7, 0,v) |
| #define GET16USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT(r16) _BFGET_(r16, 7, 0) |
| #define SET16USB2_Reg_PHY_RESERVE_OUT_PHY_RESERVE_OUT(r16,v) _BFSET_(r16, 7, 0,v) |
| |
| #define w32USB2_Reg_PHY_RESERVE_OUT {\ |
| UNSG32 uPHY_RESERVE_OUT_PHY_RESERVE_OUT : 8;\ |
| UNSG32 RSVDx24_b8 : 24;\ |
| } |
| union { UNSG32 u32USB2_Reg_PHY_RESERVE_OUT; |
| struct w32USB2_Reg_PHY_RESERVE_OUT; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_PHY_MON_PHY_MON(r32) _BFGET_(r32,15, 0) |
| #define SET32USB2_Reg_PHY_MON_PHY_MON(r32,v) _BFSET_(r32,15, 0,v) |
| #define GET16USB2_Reg_PHY_MON_PHY_MON(r16) _BFGET_(r16,15, 0) |
| #define SET16USB2_Reg_PHY_MON_PHY_MON(r16,v) _BFSET_(r16,15, 0,v) |
| |
| #define w32USB2_Reg_PHY_MON {\ |
| UNSG32 uPHY_MON_PHY_MON : 16;\ |
| UNSG32 RSVDx28_b16 : 16;\ |
| } |
| union { UNSG32 u32USB2_Reg_PHY_MON; |
| struct w32USB2_Reg_PHY_MON; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_bitstuffen_utmi_bitstuffen(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_bitstuffen_utmi_bitstuffen(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_bitstuffen_utmi_bitstuffen(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_bitstuffen_utmi_bitstuffen(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_bitstuffen {\ |
| UNSG32 uutmi_bitstuffen_utmi_bitstuffen : 1;\ |
| UNSG32 RSVDx2C_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_bitstuffen; |
| struct w32USB2_Reg_utmi_bitstuffen; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_bitstuffenh_utmi_bitstuffenh(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_bitstuffenh {\ |
| UNSG32 uutmi_bitstuffenh_utmi_bitstuffenh : 1;\ |
| UNSG32 RSVDx30_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_bitstuffenh; |
| struct w32USB2_Reg_utmi_bitstuffenh; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_fslsserialmode_utmi_fslsserialmode(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_fslsserialmode {\ |
| UNSG32 uutmi_fslsserialmode_utmi_fslsserialmode : 1;\ |
| UNSG32 RSVDx34_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_fslsserialmode; |
| struct w32USB2_Reg_utmi_fslsserialmode; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_txenable_n_utmi_txenable_n(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_txenable_n_utmi_txenable_n(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_txenable_n_utmi_txenable_n(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_txenable_n_utmi_txenable_n(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_txenable_n {\ |
| UNSG32 uutmi_txenable_n_utmi_txenable_n : 1;\ |
| UNSG32 RSVDx38_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_txenable_n; |
| struct w32USB2_Reg_utmi_txenable_n; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDx3C [4]; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_txdat_utmi_txdat(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_txdat_utmi_txdat(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_txdat_utmi_txdat(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_txdat_utmi_txdat(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_txdat {\ |
| UNSG32 uutmi_txdat_utmi_txdat : 1;\ |
| UNSG32 RSVDx40_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_txdat; |
| struct w32USB2_Reg_utmi_txdat; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_txse0_utmi_txse0(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_txse0_utmi_txse0(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_txse0_utmi_txse0(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_txse0_utmi_txse0(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_txse0 {\ |
| UNSG32 uutmi_txse0_utmi_txse0 : 1;\ |
| UNSG32 RSVDx44_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_txse0; |
| struct w32USB2_Reg_utmi_txse0; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_rxdp_utmi_rxdp(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_rxdp_utmi_rxdp(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_rxdp_utmi_rxdp(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_rxdp_utmi_rxdp(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_rxdp {\ |
| UNSG32 uutmi_rxdp_utmi_rxdp : 1;\ |
| UNSG32 RSVDx48_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_rxdp; |
| struct w32USB2_Reg_utmi_rxdp; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_rxdm_utmi_rxdm(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_rxdm_utmi_rxdm(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_rxdm_utmi_rxdm(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_rxdm_utmi_rxdm(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_rxdm {\ |
| UNSG32 uutmi_rxdm_utmi_rxdm : 1;\ |
| UNSG32 RSVDx4C_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_rxdm; |
| struct w32USB2_Reg_utmi_rxdm; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_utmi_rxrcv_utmi_rxrcv(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_utmi_rxrcv_utmi_rxrcv(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_utmi_rxrcv_utmi_rxrcv(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_utmi_rxrcv_utmi_rxrcv(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_utmi_rxrcv {\ |
| UNSG32 uutmi_rxrcv_utmi_rxrcv : 1;\ |
| UNSG32 RSVDx50_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_utmi_rxrcv; |
| struct w32USB2_Reg_utmi_rxrcv; |
| }; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB2_Reg_use_usb3_use_usb3(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB2_Reg_use_usb3_use_usb3(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB2_Reg_use_usb3_use_usb3(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB2_Reg_use_usb3_use_usb3(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB2_Reg_use_usb3 {\ |
| UNSG32 uuse_usb3_use_usb3 : 1;\ |
| UNSG32 RSVDx54_b1 : 31;\ |
| } |
| union { UNSG32 u32USB2_Reg_use_usb3; |
| struct w32USB2_Reg_use_usb3; |
| }; |
| /////////////////////////////////////////////////////////// |
| } SIE_USB2_Reg; |
| |
| typedef union T32USB2_Reg_PU |
| { UNSG32 u32; |
| struct w32USB2_Reg_PU; |
| } T32USB2_Reg_PU; |
| typedef union T32USB2_Reg_PU_PLL |
| { UNSG32 u32; |
| struct w32USB2_Reg_PU_PLL; |
| } T32USB2_Reg_PU_PLL; |
| typedef union T32USB2_Reg_SUSPENDM |
| { UNSG32 u32; |
| struct w32USB2_Reg_SUSPENDM; |
| } T32USB2_Reg_SUSPENDM; |
| typedef union T32USB2_Reg_IDDQ_TEST |
| { UNSG32 u32; |
| struct w32USB2_Reg_IDDQ_TEST; |
| } T32USB2_Reg_IDDQ_TEST; |
| typedef union T32USB2_Reg_REG_DISABLE_EL16 |
| { UNSG32 u32; |
| struct w32USB2_Reg_REG_DISABLE_EL16; |
| } T32USB2_Reg_REG_DISABLE_EL16; |
| typedef union T32USB2_Reg_REG_VBUSDTC_OUT |
| { UNSG32 u32; |
| struct w32USB2_Reg_REG_VBUSDTC_OUT; |
| } T32USB2_Reg_REG_VBUSDTC_OUT; |
| typedef union T32USB2_Reg_REG_TX_BITSTUFF_EN |
| { UNSG32 u32; |
| struct w32USB2_Reg_REG_TX_BITSTUFF_EN; |
| } T32USB2_Reg_REG_TX_BITSTUFF_EN; |
| typedef union T32USB2_Reg_REG_TX_BITSTUFF_ENH |
| { UNSG32 u32; |
| struct w32USB2_Reg_REG_TX_BITSTUFF_ENH; |
| } T32USB2_Reg_REG_TX_BITSTUFF_ENH; |
| typedef union T32USB2_Reg_PHY_RESERVE_IN |
| { UNSG32 u32; |
| struct w32USB2_Reg_PHY_RESERVE_IN; |
| } T32USB2_Reg_PHY_RESERVE_IN; |
| typedef union T32USB2_Reg_PHY_RESERVE_OUT |
| { UNSG32 u32; |
| struct w32USB2_Reg_PHY_RESERVE_OUT; |
| } T32USB2_Reg_PHY_RESERVE_OUT; |
| typedef union T32USB2_Reg_PHY_MON |
| { UNSG32 u32; |
| struct w32USB2_Reg_PHY_MON; |
| } T32USB2_Reg_PHY_MON; |
| typedef union T32USB2_Reg_utmi_bitstuffen |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_bitstuffen; |
| } T32USB2_Reg_utmi_bitstuffen; |
| typedef union T32USB2_Reg_utmi_bitstuffenh |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_bitstuffenh; |
| } T32USB2_Reg_utmi_bitstuffenh; |
| typedef union T32USB2_Reg_utmi_fslsserialmode |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_fslsserialmode; |
| } T32USB2_Reg_utmi_fslsserialmode; |
| typedef union T32USB2_Reg_utmi_txenable_n |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_txenable_n; |
| } T32USB2_Reg_utmi_txenable_n; |
| typedef union T32USB2_Reg_utmi_txdat |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_txdat; |
| } T32USB2_Reg_utmi_txdat; |
| typedef union T32USB2_Reg_utmi_txse0 |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_txse0; |
| } T32USB2_Reg_utmi_txse0; |
| typedef union T32USB2_Reg_utmi_rxdp |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_rxdp; |
| } T32USB2_Reg_utmi_rxdp; |
| typedef union T32USB2_Reg_utmi_rxdm |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_rxdm; |
| } T32USB2_Reg_utmi_rxdm; |
| typedef union T32USB2_Reg_utmi_rxrcv |
| { UNSG32 u32; |
| struct w32USB2_Reg_utmi_rxrcv; |
| } T32USB2_Reg_utmi_rxrcv; |
| typedef union T32USB2_Reg_use_usb3 |
| { UNSG32 u32; |
| struct w32USB2_Reg_use_usb3; |
| } T32USB2_Reg_use_usb3; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TUSB2_Reg_PU |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_PU; |
| }; |
| } TUSB2_Reg_PU; |
| typedef union TUSB2_Reg_PU_PLL |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_PU_PLL; |
| }; |
| } TUSB2_Reg_PU_PLL; |
| typedef union TUSB2_Reg_SUSPENDM |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_SUSPENDM; |
| }; |
| } TUSB2_Reg_SUSPENDM; |
| typedef union TUSB2_Reg_IDDQ_TEST |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_IDDQ_TEST; |
| }; |
| } TUSB2_Reg_IDDQ_TEST; |
| typedef union TUSB2_Reg_REG_DISABLE_EL16 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_REG_DISABLE_EL16; |
| }; |
| } TUSB2_Reg_REG_DISABLE_EL16; |
| typedef union TUSB2_Reg_REG_VBUSDTC_OUT |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_REG_VBUSDTC_OUT; |
| }; |
| } TUSB2_Reg_REG_VBUSDTC_OUT; |
| typedef union TUSB2_Reg_REG_TX_BITSTUFF_EN |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_REG_TX_BITSTUFF_EN; |
| }; |
| } TUSB2_Reg_REG_TX_BITSTUFF_EN; |
| typedef union TUSB2_Reg_REG_TX_BITSTUFF_ENH |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_REG_TX_BITSTUFF_ENH; |
| }; |
| } TUSB2_Reg_REG_TX_BITSTUFF_ENH; |
| typedef union TUSB2_Reg_PHY_RESERVE_IN |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_PHY_RESERVE_IN; |
| }; |
| } TUSB2_Reg_PHY_RESERVE_IN; |
| typedef union TUSB2_Reg_PHY_RESERVE_OUT |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_PHY_RESERVE_OUT; |
| }; |
| } TUSB2_Reg_PHY_RESERVE_OUT; |
| typedef union TUSB2_Reg_PHY_MON |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_PHY_MON; |
| }; |
| } TUSB2_Reg_PHY_MON; |
| typedef union TUSB2_Reg_utmi_bitstuffen |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_bitstuffen; |
| }; |
| } TUSB2_Reg_utmi_bitstuffen; |
| typedef union TUSB2_Reg_utmi_bitstuffenh |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_bitstuffenh; |
| }; |
| } TUSB2_Reg_utmi_bitstuffenh; |
| typedef union TUSB2_Reg_utmi_fslsserialmode |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_fslsserialmode; |
| }; |
| } TUSB2_Reg_utmi_fslsserialmode; |
| typedef union TUSB2_Reg_utmi_txenable_n |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_txenable_n; |
| }; |
| } TUSB2_Reg_utmi_txenable_n; |
| typedef union TUSB2_Reg_utmi_txdat |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_txdat; |
| }; |
| } TUSB2_Reg_utmi_txdat; |
| typedef union TUSB2_Reg_utmi_txse0 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_txse0; |
| }; |
| } TUSB2_Reg_utmi_txse0; |
| typedef union TUSB2_Reg_utmi_rxdp |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_rxdp; |
| }; |
| } TUSB2_Reg_utmi_rxdp; |
| typedef union TUSB2_Reg_utmi_rxdm |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_rxdm; |
| }; |
| } TUSB2_Reg_utmi_rxdm; |
| typedef union TUSB2_Reg_utmi_rxrcv |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_utmi_rxrcv; |
| }; |
| } TUSB2_Reg_utmi_rxrcv; |
| typedef union TUSB2_Reg_use_usb3 |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB2_Reg_use_usb3; |
| }; |
| } TUSB2_Reg_use_usb3; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 USB2_Reg_drvrd(SIE_USB2_Reg *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 USB2_Reg_drvwr(SIE_USB2_Reg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void USB2_Reg_reset(SIE_USB2_Reg *p); |
| SIGN32 USB2_Reg_cmp (SIE_USB2_Reg *p, SIE_USB2_Reg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define USB2_Reg_check(p,pie,pfx,hLOG) USB2_Reg_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define USB2_Reg_print(p, pfx,hLOG) USB2_Reg_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: USB2_Reg |
| //////////////////////////////////////////////////////////// |
| |
| ////// |
| /// |
| /// $INTERFACE USB_Wrapper biu (4,4) |
| /// # # ---------------------------------------------------------- |
| /// @ 0x00000 MACReg (RW) |
| /// %unsigned 1 MACReg 0x0 |
| /// ### |
| /// * Mac register |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x00004 (W-) |
| /// # # Stuffing bytes... |
| /// %% 491488 |
| /// @ 0x0F000 USB3PHYReg (P) |
| /// %unsigned 1 USB3PHYReg 0x0 |
| /// ### |
| /// * USB3 PHY register |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0F004 (W-) |
| /// # # Stuffing bytes... |
| /// %% 8160 |
| /// @ 0x0F400 USB2PHYReg (P) |
| /// %unsigned 1 USB2PHYReg 0x0 |
| /// ### |
| /// * USB2 PHY register |
| /// ### |
| /// %% 31 # Stuffing bits... |
| /// @ 0x0F404 (W-) |
| /// # # Stuffing bytes... |
| /// %% 8160 |
| /// @ 0x0F800 USB3_Reg (P) |
| /// # 0x0F800 USB3_Reg |
| /// $USB3_Reg USB3_Reg REG |
| /// ### |
| /// * USB3_0 wrapper register |
| /// ### |
| /// @ 0x0F900 USB2_Reg (P) |
| /// # 0x0F900 USB2_Reg |
| /// $USB2_Reg USB2_Reg REG |
| /// ### |
| /// * USB2 wrapper register |
| /// ### |
| /// # # ---------------------------------------------------------- |
| /// $ENDOFINTERFACE # size: 63832B, bits: 442b, padding: 0B |
| //////////////////////////////////////////////////////////// |
| #ifndef h_USB_Wrapper |
| #define h_USB_Wrapper (){} |
| |
| #define RA_USB_Wrapper_MACReg 0x0000 |
| |
| #define BA_USB_Wrapper_MACReg_MACReg 0x0000 |
| #define B16USB_Wrapper_MACReg_MACReg 0x0000 |
| #define LSb32USB_Wrapper_MACReg_MACReg 0 |
| #define LSb16USB_Wrapper_MACReg_MACReg 0 |
| #define bUSB_Wrapper_MACReg_MACReg 1 |
| #define MSK32USB_Wrapper_MACReg_MACReg 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB_Wrapper_USB3PHYReg 0xF000 |
| |
| #define BA_USB_Wrapper_USB3PHYReg_USB3PHYReg 0xF000 |
| #define B16USB_Wrapper_USB3PHYReg_USB3PHYReg 0xF000 |
| #define LSb32USB_Wrapper_USB3PHYReg_USB3PHYReg 0 |
| #define LSb16USB_Wrapper_USB3PHYReg_USB3PHYReg 0 |
| #define bUSB_Wrapper_USB3PHYReg_USB3PHYReg 1 |
| #define MSK32USB_Wrapper_USB3PHYReg_USB3PHYReg 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB_Wrapper_USB2PHYReg 0xF400 |
| |
| #define BA_USB_Wrapper_USB2PHYReg_USB2PHYReg 0xF400 |
| #define B16USB_Wrapper_USB2PHYReg_USB2PHYReg 0xF400 |
| #define LSb32USB_Wrapper_USB2PHYReg_USB2PHYReg 0 |
| #define LSb16USB_Wrapper_USB2PHYReg_USB2PHYReg 0 |
| #define bUSB_Wrapper_USB2PHYReg_USB2PHYReg 1 |
| #define MSK32USB_Wrapper_USB2PHYReg_USB2PHYReg 0x00000001 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB_Wrapper_USB3_Reg 0xF800 |
| /////////////////////////////////////////////////////////// |
| #define RA_USB_Wrapper_USB2_Reg 0xF900 |
| /////////////////////////////////////////////////////////// |
| |
| typedef struct SIE_USB_Wrapper { |
| /////////////////////////////////////////////////////////// |
| #define GET32USB_Wrapper_MACReg_MACReg(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB_Wrapper_MACReg_MACReg(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB_Wrapper_MACReg_MACReg(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB_Wrapper_MACReg_MACReg(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB_Wrapper_MACReg {\ |
| UNSG32 uMACReg_MACReg : 1;\ |
| UNSG32 RSVDx0_b1 : 31;\ |
| } |
| union { UNSG32 u32USB_Wrapper_MACReg; |
| struct w32USB_Wrapper_MACReg; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDx4 [61436]; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB_Wrapper_USB3PHYReg_USB3PHYReg(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB_Wrapper_USB3PHYReg_USB3PHYReg(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB_Wrapper_USB3PHYReg_USB3PHYReg(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB_Wrapper_USB3PHYReg_USB3PHYReg(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB_Wrapper_USB3PHYReg {\ |
| UNSG32 uUSB3PHYReg_USB3PHYReg : 1;\ |
| UNSG32 RSVDxF000_b1 : 31;\ |
| } |
| union { UNSG32 u32USB_Wrapper_USB3PHYReg; |
| struct w32USB_Wrapper_USB3PHYReg; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDxF004 [1020]; |
| /////////////////////////////////////////////////////////// |
| #define GET32USB_Wrapper_USB2PHYReg_USB2PHYReg(r32) _BFGET_(r32, 0, 0) |
| #define SET32USB_Wrapper_USB2PHYReg_USB2PHYReg(r32,v) _BFSET_(r32, 0, 0,v) |
| #define GET16USB_Wrapper_USB2PHYReg_USB2PHYReg(r16) _BFGET_(r16, 0, 0) |
| #define SET16USB_Wrapper_USB2PHYReg_USB2PHYReg(r16,v) _BFSET_(r16, 0, 0,v) |
| |
| #define w32USB_Wrapper_USB2PHYReg {\ |
| UNSG32 uUSB2PHYReg_USB2PHYReg : 1;\ |
| UNSG32 RSVDxF400_b1 : 31;\ |
| } |
| union { UNSG32 u32USB_Wrapper_USB2PHYReg; |
| struct w32USB_Wrapper_USB2PHYReg; |
| }; |
| /////////////////////////////////////////////////////////// |
| UNSG8 RSVDxF404 [1020]; |
| /////////////////////////////////////////////////////////// |
| SIE_USB3_Reg ie_USB3_Reg; |
| /////////////////////////////////////////////////////////// |
| SIE_USB2_Reg ie_USB2_Reg; |
| /////////////////////////////////////////////////////////// |
| } SIE_USB_Wrapper; |
| |
| typedef union T32USB_Wrapper_MACReg |
| { UNSG32 u32; |
| struct w32USB_Wrapper_MACReg; |
| } T32USB_Wrapper_MACReg; |
| typedef union T32USB_Wrapper_USB3PHYReg |
| { UNSG32 u32; |
| struct w32USB_Wrapper_USB3PHYReg; |
| } T32USB_Wrapper_USB3PHYReg; |
| typedef union T32USB_Wrapper_USB2PHYReg |
| { UNSG32 u32; |
| struct w32USB_Wrapper_USB2PHYReg; |
| } T32USB_Wrapper_USB2PHYReg; |
| /////////////////////////////////////////////////////////// |
| |
| typedef union TUSB_Wrapper_MACReg |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB_Wrapper_MACReg; |
| }; |
| } TUSB_Wrapper_MACReg; |
| typedef union TUSB_Wrapper_USB3PHYReg |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB_Wrapper_USB3PHYReg; |
| }; |
| } TUSB_Wrapper_USB3PHYReg; |
| typedef union TUSB_Wrapper_USB2PHYReg |
| { UNSG32 u32[1]; |
| struct { |
| struct w32USB_Wrapper_USB2PHYReg; |
| }; |
| } TUSB_Wrapper_USB2PHYReg; |
| |
| /////////////////////////////////////////////////////////// |
| SIGN32 USB_Wrapper_drvrd(SIE_USB_Wrapper *p, UNSG32 base, SIGN32 mem, SIGN32 tst); |
| SIGN32 USB_Wrapper_drvwr(SIE_USB_Wrapper *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd); |
| void USB_Wrapper_reset(SIE_USB_Wrapper *p); |
| SIGN32 USB_Wrapper_cmp (SIE_USB_Wrapper *p, SIE_USB_Wrapper *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst); |
| #define USB_Wrapper_check(p,pie,pfx,hLOG) USB_Wrapper_cmp(p,pie,pfx,(void*)(hLOG),0,0) |
| #define USB_Wrapper_print(p, pfx,hLOG) USB_Wrapper_cmp(p,0, pfx,(void*)(hLOG),0,0) |
| |
| #endif |
| ////// |
| /// ENDOFINTERFACE: USB_Wrapper |
| //////////////////////////////////////////////////////////// |
| |
| |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| #pragma pack() |
| |
| #endif |
| ////// |
| /// ENDOFFILE: usb3Host.h |
| //////////////////////////////////////////////////////////// |
| |