| !_TAG_FILE_FORMAT 2 /extended format; --format=1 will not append ;" to lines/ |
| !_TAG_FILE_SORTED 1 /0=unsorted, 1=sorted, 2=foldcase/ |
| !_TAG_PROGRAM_AUTHOR Darren Hiebert /dhiebert@users.sourceforge.net/ |
| !_TAG_PROGRAM_NAME Exuberant Ctags // |
| !_TAG_PROGRAM_URL http://ctags.sourceforge.net /official site/ |
| !_TAG_PROGRAM_VERSION 5.8 // |
| ACCESS_MODE sdmmc_api.h /^}ACCESS_MODE;$/;" t typeref:enum:__anon47 |
| ACmdFlag sdmmc_api.h /^ UINT_T ACmdFlag; \/\/ Indicates if the executing command is standard vs. application specific (ACMD)$/;" m struct:__anon44 |
| APB_GPIO0_BASE apbRegBase.h 7;" d |
| APB_GPIO1_BASE apbRegBase.h 8;" d |
| APB_GPIO2_BASE apbRegBase.h 9;" d |
| APB_GPIO3_BASE apbRegBase.h 10;" d |
| APB_I2C0_BASE apbRegBase.h 11;" d |
| APB_I2C1_BASE apbRegBase.h 12;" d |
| APB_ICTL0_BASE apbRegBase.h 18;" d |
| APB_ICTL1_BASE apbRegBase.h 19;" d |
| APB_ICTL2_BASE apbRegBase.h 20;" d |
| APB_RST Diag.h 31;" d |
| APB_SSI1_BASE apbRegBase.h 13;" d |
| APB_TIMER_BASE apbRegBase.h 17;" d |
| APB_WDT0_BASE apbRegBase.h 14;" d |
| APB_WDT1_BASE apbRegBase.h 15;" d |
| APB_WDT2_BASE apbRegBase.h 16;" d |
| AS_2ND_CPU Diag.h 21;" d |
| Access sdmmc_api.h /^ unsigned int Access :2;$/;" m struct:__anon41 |
| AccessMode sdmmc_api.h /^ ACCESS_MODE AccessMode; \/\/ High Density Card$/;" m struct:__anon48 |
| AutoCMD12Mode sdmmc_api.h /^ UINT_T AutoCMD12Mode; \/\/ When "true", the controller is operating in auto command 12 mode.$/;" m struct:__anon44 |
| BBTExhaustedError sdioDiag.c 75;" d file: |
| BBTReadError sdioDiag.c 71;" d file: |
| BERLIN_BG2_DIAG Diag.h 20;" d |
| BFM_HOST_Bus_Read16 util.h 12;" d |
| BFM_HOST_Bus_Read32 util.h 10;" d |
| BFM_HOST_Bus_Read8 util.h 14;" d |
| BFM_HOST_Bus_Write16 util.h 11;" d |
| BFM_HOST_Bus_Write32 util.h 9;" d |
| BFM_HOST_Bus_Write8 util.h 13;" d |
| BLK_CNT sdmmc_api.h 39;" d |
| BLK_LEN sdmmc_api.h 40;" d |
| BOOL sdmmc_api.h 28;" d |
| BOOT_BUS_WIDTH_MMC_EXT_CSD_OFFSET sdmmc_api.h 205;" d |
| BUS_WIDTH_MMC_EXT_CSD_OFFSET sdmmc_api.h 207;" d |
| BYTE_ACCESS sdmmc_api.h /^ BYTE_ACCESS = 0, $/;" e enum:__anon47 |
| BootAck sdmmc_api.h /^ unsigned int BootAck : 1;$/;" m struct:__anon50 |
| BootPartitionEn sdmmc_api.h /^ unsigned int BootPartitionEn : 3;$/;" m struct:__anon50 |
| CHECK_FUNCTION_MODE sdmmc_api.h 218;" d |
| CHK_INT Diag.h 32;" d |
| CID sdmmc_api.h /^ CID_LAYOUT CID; \/\/ CID Register$/;" m struct:__anon45 |
| CID_LAYOUT sdmmc_api.h /^} CID_LAYOUT;$/;" t typeref:struct:__anon33 |
| CID_VALUE sdmmc_api.h /^ UINT_T CID_VALUE[4];$/;" m struct:__anon33 |
| CLEAR_INTS_MASK sdioController.h 310;" d |
| CLOCK_27_MULT sdioController.h 243;" d |
| CMD6_Bits sdmmc_api.h /^ UINT_T CMD6_Bits;$/;" m union:__anon38 |
| CMD6_LAYOUT sdmmc_api.h /^} CMD6_LAYOUT;$/;" t typeref:struct:__anon37 |
| CMD6_Layout sdmmc_api.h /^ CMD6_LAYOUT CMD6_Layout;$/;" m union:__anon38 |
| CMD6_OVERLAY sdmmc_api.h /^} CMD6_OVERLAY;$/;" t typeref:union:__anon38 |
| CONTROLLER_TYPE sdmmc_api.h /^}CONTROLLER_TYPE;$/;" t typeref:enum:__anon30 |
| CPU_TO_AHB_CLOCK_RATIO Diag.h 12;" d |
| CSD sdmmc_api.h /^ CSD_LAYOUT CSD; \/\/ CSD Register Contents$/;" m struct:__anon45 |
| CSD_LAYOUT sdmmc_api.h /^} CSD_LAYOUT;$/;" t typeref:struct:__anon34 |
| CSD_VALUE sdmmc_api.h /^ UINT_T CSD_VALUE[4];$/;" m struct:__anon34 |
| CardAddress sdmmc_api.h /^ UINT_T CardAddress; \/\/ Starting Card Address$/;" m struct:__anon44 |
| CardCapacity sdmmc_api.h /^ UINT_T CardCapacity; \/\/ Bytes - Maximum Capacity of the card $/;" m struct:__anon48 |
| CardReg sdmmc_api.h /^ SDMMC_CARD_REGISTERS CardReg; \/\/ Card Registers $/;" m struct:__anon48 |
| CardReponse sdmmc_api.h /^ SDMMC_RESPONSE CardReponse; \/\/ Card Response Related $/;" m struct:__anon48 |
| Cmd sdmmc_api.h /^ UINT_T Cmd; \/\/ The command that started the transaction$/;" m struct:__anon44 |
| CmdSet sdmmc_api.h /^ unsigned int CmdSet :3;$/;" m struct:__anon41 |
| CommandComplete sdmmc_api.h /^ volatile UINT_T CommandComplete; $/;" m struct:__anon46 |
| ControllerType sdmmc_api.h /^ CONTROLLER_TYPE ControllerType; \/\/ See CONTROLLER_TYPE platformconfig.h$/;" m struct:__anon48 |
| DATATRAN sdmmc_api.h /^ DATATRAN, \/\/ The controller has finished data transfer but card may be busy$/;" e enum:__anon43 |
| DEFAULT_CMD_SET sdmmc_api.h 217;" d |
| DISABLE_INTS sdioController.h 301;" d |
| DSR_implemented sdioDiag.c /^ unsigned char DSR_implemented;$/;" m struct:__anon29 file: |
| EMMCSetupPinmux sdioDiag.c /^void EMMCSetupPinmux()$/;" f |
| ENABLE_INTS sdioController.h 302;" d |
| ENABLE_PARTITION_SUPPORT sdmmc_api.h 24;" d |
| EN_CPU_INT Diag.h 33;" d |
| EN_SELF_TEST Diag.h 30;" d |
| EN_UART0_FC Diag.h 29;" d |
| ERASE sdmmc_api.h /^ ERASE, \/\/ Erase State$/;" e enum:__anon43 |
| EXT_CSD_ACCESS_CLEAR_BITS sdmmc_api.h 211;" d |
| EXT_CSD_ACCESS_CMD_SET sdmmc_api.h 209;" d |
| EXT_CSD_ACCESS_SET_BITS sdmmc_api.h 210;" d |
| EXT_CSD_ACCESS_WRITE_BYTE sdmmc_api.h 212;" d |
| EnableIRQ sdioDiag.c /^void EnableIRQ(void)$/;" f |
| EndDiscardWords sdmmc_api.h /^ UINT_T EndDiscardWords; \/\/ Words - from the last block that caller doesn't want$/;" m struct:__anon44 |
| EraseError sdioDiag.c 66;" d file: |
| EraseSize sdmmc_api.h /^ UINT_T EraseSize; \/\/ Bytes - Minimum Size of an erasable unit$/;" m struct:__anon48 |
| FALSE sdioController.h 21;" d |
| FALSE sdmmc_api.h 26;" d |
| FAULT sdmmc_api.h /^ FAULT \/\/ Fault$/;" e enum:__anon43 |
| FlashDriverInitError sdioDiag.c 76;" d file: |
| FlashFuncNotDefined sdioDiag.c 77;" d file: |
| FlashLockError sdioDiag.c 80;" d file: |
| FunctionGroup sdmmc_api.h /^ unsigned int FunctionGroup :24;$/;" m struct:__anon37 |
| FunctionGroup sdmmc_api.h /^ unsigned int FunctionGroup :24;$/;" m struct:__anon39 |
| GET_VM_ADDR Diag.h 16;" d |
| GIC1_Priority32_35_offset gicDiag.h 95;" d |
| GIC1_Priority92_95_offset gicDiag.h 96;" d |
| GIC_Acknowledge gicDiag.h 21;" d |
| GIC_Active0_31 gicDiag.h 50;" d |
| GIC_Active32_63 gicDiag.h 51;" d |
| GIC_BYTES_PER_WORD gicDiag.h 113;" d |
| GIC_BinaryPoint gicDiag.h 20;" d |
| GIC_CLEAR_ENABLE_ALL gicDiag.h 109;" d |
| GIC_CLEAR_PENDING_ALL gicDiag.h 111;" d |
| GIC_CONFIG_ALL_LEVEL_1N gicDiag.h 119;" d |
| GIC_CONTROL_DISABLE gicDiag.h 107;" d |
| GIC_CONTROL_ENABLE gicDiag.h 108;" d |
| GIC_CPUControl gicDiag.h 18;" d |
| GIC_CPUTarget0_3 gicDiag.h 69;" d |
| GIC_CPUTarget0_3_offset gicDiag.h 82;" d |
| GIC_CPUTarget12_15 gicDiag.h 72;" d |
| GIC_CPUTarget28_31 gicDiag.h 73;" d |
| GIC_CPUTarget32_35 gicDiag.h 74;" d |
| GIC_CPUTarget36_39 gicDiag.h 75;" d |
| GIC_CPUTarget40_43 gicDiag.h 76;" d |
| GIC_CPUTarget44_47 gicDiag.h 77;" d |
| GIC_CPUTarget48_51 gicDiag.h 78;" d |
| GIC_CPUTarget4_7 gicDiag.h 70;" d |
| GIC_CPUTarget52_55 gicDiag.h 79;" d |
| GIC_CPUTarget56_59 gicDiag.h 80;" d |
| GIC_CPUTarget60_63 gicDiag.h 81;" d |
| GIC_CPUTarget60_63_offset gicDiag.h 83;" d |
| GIC_CPUTarget8_11 gicDiag.h 71;" d |
| GIC_CPU_CONTROL_DISABLE gicDiag.h 99;" d |
| GIC_CPU_CONTROL_ENABLE gicDiag.h 100;" d |
| GIC_CPU_TARGETS_ALL_CPU0_1 gicDiag.h 117;" d |
| GIC_CPU_TARGETS_NONE gicDiag.h 118;" d |
| GIC_CPU_TARGETS_PER_WORD gicDiag.h 116;" d |
| GIC_ClearEnable0_31 gicDiag.h 40;" d |
| GIC_ClearEnable0_31_offset gicDiag.h 42;" d |
| GIC_ClearEnable32_63 gicDiag.h 41;" d |
| GIC_ClearPending0_31 gicDiag.h 47;" d |
| GIC_ClearPending32_63 gicDiag.h 48;" d |
| GIC_Configuration0_15 gicDiag.h 85;" d |
| GIC_Configuration16_31 gicDiag.h 86;" d |
| GIC_Configuration32_47 gicDiag.h 87;" d |
| GIC_Configuration48_63 gicDiag.h 88;" d |
| GIC_Control gicDiag.h 32;" d |
| GIC_EndInterrupt gicDiag.h 22;" d |
| GIC_GICPCellID gicDiag.h 93;" d |
| GIC_GICPeriphID gicDiag.h 92;" d |
| GIC_INTERRUPTS_PER_WORD gicDiag.h 112;" d |
| GIC_INT_ACK_CPUID_LSB gicDiag.h 103;" d |
| GIC_INT_ACK_CPUID_MASK gicDiag.h 104;" d |
| GIC_INT_ACK_MASK gicDiag.h 102;" d |
| GIC_IRQ_Handler gicDiag.c /^void GIC_IRQ_Handler(void)$/;" f |
| GIC_PREEMPT_ALL gicDiag.h 101;" d |
| GIC_PRIORITIES_PER_WORD gicDiag.h 115;" d |
| GIC_PRIORITY_HIGHEST_ALL gicDiag.h 114;" d |
| GIC_PRIORITY_MASK_LOWEST gicDiag.h 120;" d |
| GIC_Pending gicDiag.h 24;" d |
| GIC_Priority0_3 gicDiag.h 53;" d |
| GIC_Priority0_3_offset gicDiag.h 66;" d |
| GIC_Priority1 gicDiag.h 27;" d |
| GIC_Priority12_15 gicDiag.h 56;" d |
| GIC_Priority2 gicDiag.h 28;" d |
| GIC_Priority28_31 gicDiag.h 57;" d |
| GIC_Priority3 gicDiag.h 29;" d |
| GIC_Priority32_35 gicDiag.h 58;" d |
| GIC_Priority36_39 gicDiag.h 59;" d |
| GIC_Priority40_43 gicDiag.h 60;" d |
| GIC_Priority44_47 gicDiag.h 61;" d |
| GIC_Priority48_51 gicDiag.h 62;" d |
| GIC_Priority4_7 gicDiag.h 54;" d |
| GIC_Priority52_55 gicDiag.h 63;" d |
| GIC_Priority56_59 gicDiag.h 64;" d |
| GIC_Priority60_63 gicDiag.h 65;" d |
| GIC_Priority60_63_offset gicDiag.h 67;" d |
| GIC_Priority8_11 gicDiag.h 55;" d |
| GIC_PriorityMask gicDiag.h 19;" d |
| GIC_REGISTER gicDiag.h 15;" d |
| GIC_Running gicDiag.h 23;" d |
| GIC_SET_ENABLE_ALL gicDiag.h 110;" d |
| GIC_SGI_CPULIST_LSB gicDiag.h 121;" d |
| GIC_SGI_ID_LSB gicDiag.h 122;" d |
| GIC_SetEnable0_31 gicDiag.h 36;" d |
| GIC_SetEnable0_31_offset gicDiag.h 38;" d |
| GIC_SetEnable32_63 gicDiag.h 37;" d |
| GIC_SetPending0_31 gicDiag.h 44;" d |
| GIC_SetPending32_63 gicDiag.h 45;" d |
| GIC_SoftInt gicDiag.h 90;" d |
| GIC_Type gicDiag.h 34;" d |
| GLOBAL_CLK_SELECT2 sdioDiag.c 38;" d file: |
| GLOBAL_SDIO_DLLMST_CTRL sdioDiag.c 41;" d file: |
| GLOBAL_SDIO_DLLMST_REF sdioDiag.c 40;" d file: |
| GLOBAL_SDIO_DLLMST_STATUS sdioDiag.c 39;" d file: |
| GO_TO_CPU1_IRQ irqHandler.S /^GO_TO_CPU1_IRQ:$/;" l |
| GeneralError sdioDiag.c 56;" d file: |
| HARD512BLOCKLENGTH sdmmc_api.h 45;" d |
| HS_TIMING_MMC_EXT_CSD_OFFSET sdmmc_api.h 208;" d |
| INITIALIZE sdmmc_api.h /^ INITIALIZE, \/\/ Controller and Card are being ninitialized$/;" e enum:__anon43 |
| INT_DISABLE gicDiag.h 128;" d |
| INT_ENABLE gicDiag.h 127;" d |
| INT_T sdioController.h /^typedef int INT_T;$/;" t |
| INVALID_REG_ACCESS Diag.h 35;" d |
| IRQ_DONE irqHandler.S /^IRQ_DONE:$/;" l |
| IRQ_Handler irqHandler.S /^IRQ_Handler:$/;" l |
| Index sdmmc_api.h /^ unsigned int Index :8;$/;" m struct:__anon41 |
| InstallHighHandler sdioDiag.c /^void InstallHighHandler(unsigned int handlerAddr, unsigned int vector)$/;" f |
| InvalidAddressRangeError sdioDiag.c 79;" d file: |
| InvalidBootTypeError sdioDiag.c 68;" d file: |
| InvalidPlatformConfigError sdioDiag.c 60;" d file: |
| InvalidSizeError sdioDiag.c 63;" d file: |
| LOG_REG sdioDiag.c 33;" d file: |
| LOW_ARG sdmmc_api.h 37;" d |
| LocalAddr sdmmc_api.h /^ UINT_T LocalAddr; \/\/ Destination Address Pointer for reads, and source addr for writes$/;" m struct:__anon44 |
| MAX_ERR_CNT Diag.h 126;" d |
| MDOCFormatFailed sdioDiag.c 74;" d file: |
| MDOCInitFailed sdioDiag.c 72;" d file: |
| MM4CLKEN_EN_CLOCK sdioController.h 233;" d |
| MM4CLOCK13MHZRATE sdioController.h 238;" d |
| MM4CLOCK187KHZRATE sdioController.h 241;" d |
| MM4CLOCK200KHZRATE sdioController.h 235;" d |
| MM4CLOCK25MHZRATE sdioController.h 237;" d |
| MM4CLOCK48MHZRATE sdioController.h 242;" d |
| MM4CLOCK50MHZRATE sdioController.h 236;" d |
| MM4CLOCK6MHZRATE sdioController.h 239;" d |
| MM4CONTROLLER0 sdmmc_api.h /^ MM4CONTROLLER0 = 3,$/;" e enum:__anon30 |
| MM4CONTROLLER1 sdmmc_api.h /^ MM4CONTROLLER1 = 4,$/;" e enum:__anon30 |
| MM4CONTROLLER2 sdmmc_api.h /^ MM4CONTROLLER2 = 5,$/;" e enum:__anon30 |
| MM4FIFOWORDSIZE sdioController.h 499;" d |
| MM4FIFOWORDSIZE sdioController.h 537;" d |
| MM4SetBusWidth sdioDiag.c /^UINT_T MM4SetBusWidth(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4SwitchPartition sdioDiag.c /^UINT_T MM4SwitchPartition(P_SDMMC_Properties_T pSDMMCP, UINT_T PartitionNumber)$/;" f |
| MM4SwitchPartitionForAlternateBootMode sdioDiag.c /^UINT_T MM4SwitchPartitionForAlternateBootMode(UINT_T partition)$/;" f |
| MM4_136_RES sdioController.h 118;" d |
| MM4_48_RES sdioController.h 119;" d |
| MM4_48_RES_WITH_BUSY sdioController.h 120;" d |
| MM4_512_HOST_DMA_BDRY sdioController.h 76;" d |
| MM4_ACMD12_ER sdioController.h /^} MM4_ACMD12_ER, *P_MM4_ACMD12_ER;$/;" t typeref:struct:__anon13 |
| MM4_BLK_CNTL sdioController.h /^} MM4_BLK_CNTL, *P_MM4_BLK_CNTL;$/;" t typeref:struct:__anon2 |
| MM4_CAP1_2 sdioController.h /^} MM4_CAP1_2, *P_MM4_CAP1_2;$/;" t typeref:struct:__anon14 |
| MM4_CAP1_2_UNION sdioController.h /^} MM4_CAP1_2_UNION, *P_MM4_CAP1_2_UNION; $/;" t typeref:union:__anon15 |
| MM4_CARD_TO_HOST_DATA sdioController.h 124;" d |
| MM4_CMD_DATA sdioController.h 115;" d |
| MM4_CMD_NODATA sdioController.h 116;" d |
| MM4_CMD_TYPE_ABORT sdioController.h 114;" d |
| MM4_CMD_TYPE_NORMAL sdioController.h 111;" d |
| MM4_CMD_TYPE_RESUME sdioController.h 113;" d |
| MM4_CMD_TYPE_SUSPEND sdioController.h 112;" d |
| MM4_CMD_XFRMD sdioController.h /^} MM4_CMD_XFRMD, *P_MM4_CMD_XFRMD;$/;" t typeref:struct:__anon3 |
| MM4_CMD_XFRMD_UNION sdioController.h /^} MM4_CMD_XFRMD_UNION, *P_MM4_CMD_XFRMD_UNION; $/;" t typeref:union:__anon4 |
| MM4_CNTL1 sdioController.h /^} MM4_CNTL1, *P_MM4_CNTL1;$/;" t typeref:struct:__anon7 |
| MM4_CNTL1_UNION sdioController.h /^} MM4_CNTL1_UNION, *P_MM4_CNTL1_UNION; $/;" t typeref:union:__anon8 |
| MM4_CNTL2 sdioController.h /^} MM4_CNTL2, *P_MM4_CNTL2;$/;" t typeref:struct:__anon9 |
| MM4_CNTL2_UNION sdioController.h /^} MM4_CNTL2_UNION, *P_MM4_CNTL2_UNION; $/;" t typeref:union:__anon10 |
| MM4_CardInit sdioDiag.c /^UINT_T MM4_CardInit(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_CheckCardStatus sdioDiag.c /^UINT_T MM4_CheckCardStatus(P_SDMMC_Properties_T pSDMMCP, UINT_T R1_Resp_Match, UINT_T Mask)$/;" f |
| MM4_CheckVoltageCompatibility sdioDiag.c /^UINT_T MM4_CheckVoltageCompatibility(P_SDMMC_Properties_T pSDMMCP, UINT_T ControllerVoltage)$/;" f |
| MM4_Context sdioDiag.c /^MM4_SDMMC_CONTEXT_T MM4_Context;$/;" v |
| MM4_Get_CID sdioDiag.c /^void MM4_Get_CID(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_Get_SCR sdioDiag.c /^void MM4_Get_SCR(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_HOST_TO_CARD_DATA sdioController.h 123;" d |
| MM4_IDCard sdioDiag.c /^unsigned int MM4_IDCard(P_SDMMC_Properties_T pSDMMCP, UINT_T *pControllerVoltage)$/;" f |
| MM4_ISR sdioDiag.c /^void MM4_ISR(unsigned char uchCardId)$/;" f |
| MM4_I_SIGN_EN sdioController.h /^} MM4_I_STAT, *P_MM4_I_STAT, MM4_I_STAT_EN, *P_MM4_I_STAT_EN, MM4_I_SIGN_EN, *P_MM4_I_SIGN_EN;$/;" t typeref:struct:__anon11 |
| MM4_I_STAT sdioController.h /^} MM4_I_STAT, *P_MM4_I_STAT, MM4_I_STAT_EN, *P_MM4_I_STAT_EN, MM4_I_SIGN_EN, *P_MM4_I_SIGN_EN;$/;" t typeref:struct:__anon11 |
| MM4_I_STAT_EN sdioController.h /^} MM4_I_STAT, *P_MM4_I_STAT, MM4_I_STAT_EN, *P_MM4_I_STAT_EN, MM4_I_SIGN_EN, *P_MM4_I_SIGN_EN;$/;" t typeref:struct:__anon11 |
| MM4_I_STAT_UNION sdioController.h /^} MM4_I_STAT_UNION, *P_MM4_I_STAT_UNION; $/;" t typeref:union:__anon12 |
| MM4_Interpret_Response sdioDiag.c /^UINT_T MM4_Interpret_Response(P_SDMMC_Properties_T pSDMMCP, UINT_T ResponseType, UINT_T ResponseTimeOut)$/;" f |
| MM4_MMCAlternateBootModeReadBlocks sdioDiag.c /^UINT_T MM4_MMCAlternateBootModeReadBlocks(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_MMCAlternateBootTest sdioDiag.c /^UINT_T MM4_MMCAlternateBootTest(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_MULTI_BLOCK_TRAN sdioController.h 121;" d |
| MM4_NO_RES sdioController.h 117;" d |
| MM4_RT_BUSY sdioController.h 142;" d |
| MM4_RT_BUSYMASK sdioController.h 141;" d |
| MM4_RT_MASK sdioController.h 131;" d |
| MM4_RT_NONE sdioController.h 132;" d |
| MM4_RT_R1 sdioController.h 133;" d |
| MM4_RT_R2 sdioController.h 134;" d |
| MM4_RT_R3 sdioController.h 135;" d |
| MM4_RT_R4 sdioController.h 136;" d |
| MM4_RT_R5 sdioController.h 137;" d |
| MM4_RT_R6 sdioController.h 138;" d |
| MM4_RT_R7 sdioController.h 139;" d |
| MM4_ReadBlocks sdioDiag.c /^UINT_T MM4_ReadBlocks(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_ReadFifo sdioDiag.c /^void MM4_ReadFifo(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_ReadOneBlock sdioDiag.c /^UINT_T MM4_ReadOneBlock(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_SDMMC_CONTEXT_T sdioController.h /^} MM4_SDMMC_CONTEXT_T, *P_MM4_SDMMC_CONTEXT_T;$/;" t typeref:struct:__anon27 |
| MM4_SDMMC_T sdioController.h /^} MM4_SDMMC_T, *P_MM4_SDMMC_T;$/;" t typeref:struct:__anon1 |
| MM4_SD_CE_ATA_1_2 sdioController.h /^} MM4_SD_CE_ATA_1_2, *P_MM4_SD_CE_ATA_1_2;$/;" t typeref:struct:__anon22 |
| MM4_SD_CE_ATA_1_2_UNION sdioController.h /^} MM4_SD_CE_ATA_1_2_UNION, *PMM4_SD_CE_ATA_1_2_UNION; $/;" t typeref:union:__anon23 |
| MM4_SD_CE_ATA_1_2_bits sdioController.h /^ MM4_SD_CE_ATA_1_2 MM4_SD_CE_ATA_1_2_bits;$/;" m union:__anon23 |
| MM4_SD_CE_ATA_1_2_value sdioController.h /^ UINT_T MM4_SD_CE_ATA_1_2_value;$/;" m union:__anon23 |
| MM4_SD_CFG_FIFO_PARAM sdioController.h /^} MM4_SD_CFG_FIFO_PARAM, *P_MM4_SD_CFG_FIFO_PARAM;$/;" t typeref:struct:__anon18 |
| MM4_SD_CFG_FIFO_PARAM_UNION sdioController.h /^} MM4_SD_CFG_FIFO_PARAM_UNION, *P_MM4_SD_CFG_FIFO_PARAM_UNION; $/;" t typeref:union:__anon19 |
| MM4_SD_CFG_FIFO_PARAM_bits sdioController.h /^ MM4_SD_CFG_FIFO_PARAM MM4_SD_CFG_FIFO_PARAM_bits;$/;" m union:__anon19 |
| MM4_SD_CFG_FIFO_PARAM_value sdioController.h /^ UINT_T MM4_SD_CFG_FIFO_PARAM_value;$/;" m union:__anon19 |
| MM4_SD_FIFO_PARAM sdioController.h /^} MM4_SD_FIFO_PARAM, *P_MM4_SD_FIFO_PARAM;$/;" t typeref:struct:__anon20 |
| MM4_SD_FIFO_PARAM_UNION sdioController.h /^} MM4_SD_FIFO_PARAM_UNION, *P_MM4_SD_FIFO_PARAM_UNION; $/;" t typeref:union:__anon21 |
| MM4_SD_FIFO_PARAM_bits sdioController.h /^ MM4_SD_FIFO_PARAM MM4_SD_FIFO_PARAM_bits;$/;" m union:__anon21 |
| MM4_SD_FIFO_PARAM_value sdioController.h /^ UINT_T MM4_SD_FIFO_PARAM_value;$/;" m union:__anon21 |
| MM4_SD_MAX_CURRENT1_2 sdioController.h /^} MM4_SD_MAX_CURRENT1_2, *P_MM4_SD_MAX_CURRENT1_2;$/;" t typeref:struct:__anon16 |
| MM4_SD_MAX_CURRENT1_2_UNION sdioController.h /^} MM4_SD_MAX_CURRENT1_2_UNION, *P_MM4_SD_MAX_CURRENT1_2_UNION; $/;" t typeref:union:__anon17 |
| MM4_SINGLE_BLOCK_TRAN sdioController.h 122;" d |
| MM4_STATE sdioController.h /^} MM4_STATE, *P_MM4_STATE;$/;" t typeref:struct:__anon5 |
| MM4_STATE_UNION sdioController.h /^} MM4_STATE_UNION, *P_MM4_STATE_UNION; $/;" t typeref:union:__anon6 |
| MM4_SendDataCommand sdioDiag.c /^void MM4_SendDataCommand (P_SDMMC_Properties_T pSDMMCP,$/;" f |
| MM4_SendDataCommandNoAuto12 sdioDiag.c /^void MM4_SendDataCommandNoAuto12 (P_SDMMC_Properties_T pSDMMCP,$/;" f |
| MM4_SendSetupCommand sdioDiag.c /^void MM4_SendSetupCommand(P_SDMMC_Properties_T pSDMMCP,$/;" f |
| MM4_SendStopCommand sdioDiag.c /^void MM4_SendStopCommand(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_SetControllerVoltage sdioDiag.c /^UINT_T MM4_SetControllerVoltage (P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MM4_TX_CFG sdioController.h /^}MM4_TX_CFG, *P_MM4_TX_CFG ;$/;" t typeref:struct:__anon24 |
| MM4_TX_CFG_UNION sdioController.h /^}MM4_TX_CFG_UNION, *PMM4_TX_CFG_UNION ;$/;" t typeref:union:__anon25 |
| MM4_TX_CFG_bits sdioController.h /^ MM4_TX_CFG MM4_TX_CFG_bits ; $/;" m union:__anon25 |
| MM4_TX_CFG_value sdioController.h /^ UINT_T MM4_TX_CFG_value ; $/;" m union:__anon25 |
| MM4_VLTGSEL_1_8 sdioController.h 210;" d |
| MM4_VLTGSEL_3_0 sdioController.h 211;" d |
| MM4_VLTGSEL_3_3 sdioController.h 212;" d |
| MM4_WriteBlocks sdioDiag.c /^UINT_T MM4_WriteBlocks(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_WriteFifo sdioDiag.c /^void MM4_WriteFifo(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MM4_WriteOneBlock sdioDiag.c /^UINT_T MM4_WriteOneBlock(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| MMC4CMDSWReset sdioController.c /^void MMC4CMDSWReset(P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MMC4DataSWReset sdioController.c /^void MMC4DataSWReset(P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MMC4EnableDisableIntSources sdioController.c /^void MMC4EnableDisableIntSources(P_MM4_SDMMC_CONTEXT_T pContext, UINT_T Desire)$/;" f |
| MMC4FullSWReset sdioController.c /^void MMC4FullSWReset(P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MMC4HighSpeedSelect sdioController.c /^void MMC4HighSpeedSelect(P_MM4_SDMMC_CONTEXT_T pContext, UINT_T hs_mode)$/;" f |
| MMC4SendDataCommand sdioController.c /^void MMC4SendDataCommand(P_MM4_SDMMC_CONTEXT_T pContext, $/;" f |
| MMC4SendDataCommandNoAuto12 sdioController.c /^void MMC4SendDataCommandNoAuto12(P_MM4_SDMMC_CONTEXT_T pContext,$/;" f |
| MMC4SendSetupCommand sdioController.c /^void MMC4SendSetupCommand(P_MM4_SDMMC_CONTEXT_T pContext,$/;" f |
| MMC4SetBusRate sdioController.c /^void MMC4SetBusRate(P_MM4_SDMMC_CONTEXT_T pContext, UINT_T rate) $/;" f |
| MMC4SetDataTimeout sdioController.c /^void MMC4SetDataTimeout(P_MM4_SDMMC_CONTEXT_T pContext, UINT_T CounterValue)$/;" f |
| MMC4StartBusClock sdioController.c /^void MMC4StartBusClock(P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MMC4StartInternalBusClock sdioController.c /^void MMC4StartInternalBusClock(P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MMC4StopBusClock sdioController.c /^void MMC4StopBusClock (P_MM4_SDMMC_CONTEXT_T pContext)$/;" f |
| MMCLEGACYCONTROLLER1 sdmmc_api.h /^ MMCLEGACYCONTROLLER1 = 1,$/;" e enum:__anon30 |
| MMCLEGACYCONTROLLER2 sdmmc_api.h /^ MMCLEGACYCONTROLLER2 = 2,$/;" e enum:__anon30 |
| MMCNOTENABLED sdmmc_api.h /^ MMCNOTENABLED = 0,$/;" e enum:__anon30 |
| MMC_ALTERNATE_BOOT_ARGUMENT sdmmc_api.h 221;" d |
| MMC_BUSY_BIT sdmmc_api.h 35;" d |
| MMC_CMD0_PRE_IDLE_ARGUMENT sdmmc_api.h 222;" d |
| MMC_CMD6_Bits sdmmc_api.h /^ UINT_T MMC_CMD6_Bits;$/;" m union:__anon42 |
| MMC_CMD6_LAYOUT sdmmc_api.h /^} MMC_CMD6_LAYOUT;$/;" t typeref:struct:__anon41 |
| MMC_CMD6_Layout sdmmc_api.h /^ MMC_CMD6_LAYOUT MMC_CMD6_Layout;$/;" m union:__anon42 |
| MMC_CMD6_OVERLAY sdmmc_api.h /^} MMC_CMD6_OVERLAY;$/;" t typeref:union:__anon42 |
| MMC_OCR_VOLTAGE_ALL sdioController.h 498;" d |
| MMC_OCR_VOLTAGE_ALL sdioController.h 536;" d |
| MMC_RESPONSE_MASK sdioController.h /^ MMC_RESPONSE_MASK = 0x0000FF00$/;" e enum:__anon26 |
| MMC_RESPONSE_NONE sdioController.h /^ MMC_RESPONSE_NONE = 1L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R1 sdioController.h /^ MMC_RESPONSE_R1 = 2L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R1B sdioController.h /^ MMC_RESPONSE_R1B = 3L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R2 sdioController.h /^ MMC_RESPONSE_R2 = 4L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R3 sdioController.h /^ MMC_RESPONSE_R3 = 5L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R4 sdioController.h /^ MMC_RESPONSE_R4 = 6L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R5 sdioController.h /^ MMC_RESPONSE_R5 = 7L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R5B sdioController.h /^ MMC_RESPONSE_R5B = 8L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R6 sdioController.h /^ MMC_RESPONSE_R6 = 9L<<8,$/;" e enum:__anon26 |
| MMC_RESPONSE_R7 sdioController.h /^ MMC_RESPONSE_R7 = 0xAL<<8,$/;" e enum:__anon26 |
| MMC_SD_BOOT_PARTITION sdmmc_api.h 47;" d |
| MMC_SD_BOOT_PARTITION2 sdmmc_api.h 48;" d |
| MMC_SD_USER_PARTITION sdmmc_api.h 49;" d |
| MP_BERLIN_INTR_ID gicDiag.h 125;" d |
| MULTI_SDIO sdioController.h 6;" d |
| Mode sdmmc_api.h /^ unsigned int Mode :1;$/;" m struct:__anon37 |
| Mode sdmmc_api.h /^ unsigned int Mode :1;$/;" m struct:__anon39 |
| NO_ARGUMENT sdioController.h 110;" d |
| NO_FLAGS sdmmc_api.h 38;" d |
| NO_OF_SDIO_CARDS sdmmc_api.h 21;" d |
| NoError sdioDiag.c 54;" d file: |
| NoOTPFound sdioDiag.c 70;" d file: |
| NotFoundError sdioDiag.c 55;" d file: |
| NotSupportedError sdioDiag.c 59;" d file: |
| NumBlocks sdmmc_api.h /^ UINT_T NumBlocks; \/\/ Total Number of Blocks involved in this transaction$/;" m struct:__anon44 |
| OCR sdmmc_api.h /^ UINT_T OCR; \/\/ OCR Register Contents$/;" m struct:__anon45 |
| OCR_ACCESS_MODE_MASK sdmmc_api.h 31;" d |
| OCR_ARG sdmmc_api.h 29;" d |
| OEM sdioDiag.c /^ char OEM[3];$/;" m struct:__anon28 file: |
| OSCR_OFFSET sdmmc_api.h 27;" d |
| OTPError sdioDiag.c 78;" d file: |
| OneNandInitFailed sdioDiag.c 73;" d file: |
| PARTITIONMASK sdmmc_api.h 46;" d |
| PARTITION_ACCESS_BITS sdmmc_api.h 213;" d |
| PARTITION_CONFIG_EXT_CSD sdmmc_api.h /^} PARTITION_CONFIG_EXT_CSD;$/;" t typeref:struct:__anon50 |
| PARTITION_CONFIG_MMC_EXT_CSD_OFFSET sdmmc_api.h 206;" d |
| PARTITION_MANAGEMENT_CMD_SET sdmmc_api.h 216;" d |
| PARTITION_MANAGEMENT_FUNCTION sdmmc_api.h 220;" d |
| PERIPHBASE gicDiag.h 12;" d |
| PMM4_SD_CE_ATA_1_2_UNION sdioController.h /^} MM4_SD_CE_ATA_1_2_UNION, *PMM4_SD_CE_ATA_1_2_UNION; $/;" t typeref:union:__anon23 |
| PMM4_TX_CFG_UNION sdioController.h /^}MM4_TX_CFG_UNION, *PMM4_TX_CFG_UNION ;$/;" t typeref:union:__anon25 |
| PRINT_LEVEL util.h /^enum PRINT_LEVEL$/;" g |
| PRN_DBG util.h /^ PRN_DBG$/;" e enum:PRINT_LEVEL |
| PRN_ERR util.h /^ PRN_ERR,$/;" e enum:PRINT_LEVEL |
| PRN_INFO util.h /^ PRN_INFO,$/;" e enum:PRINT_LEVEL |
| PRN_NONE util.h /^ PRN_NONE=0,$/;" e enum:PRINT_LEVEL |
| PRN_RES util.h /^ PRN_RES,$/;" e enum:PRINT_LEVEL |
| PROCESSOR_ID_REG_BASE irqHandler.S /^#define PROCESSOR_ID_REG_BASE 0xF8430000$/;" d |
| P_MM4_ACMD12_ER sdioController.h /^} MM4_ACMD12_ER, *P_MM4_ACMD12_ER;$/;" t typeref:struct:__anon13 |
| P_MM4_BLK_CNTL sdioController.h /^} MM4_BLK_CNTL, *P_MM4_BLK_CNTL;$/;" t typeref:struct:__anon2 |
| P_MM4_CAP1_2 sdioController.h /^} MM4_CAP1_2, *P_MM4_CAP1_2;$/;" t typeref:struct:__anon14 |
| P_MM4_CAP1_2_UNION sdioController.h /^} MM4_CAP1_2_UNION, *P_MM4_CAP1_2_UNION; $/;" t typeref:union:__anon15 |
| P_MM4_CMD_XFRMD sdioController.h /^} MM4_CMD_XFRMD, *P_MM4_CMD_XFRMD;$/;" t typeref:struct:__anon3 |
| P_MM4_CMD_XFRMD_UNION sdioController.h /^} MM4_CMD_XFRMD_UNION, *P_MM4_CMD_XFRMD_UNION; $/;" t typeref:union:__anon4 |
| P_MM4_CNTL1 sdioController.h /^} MM4_CNTL1, *P_MM4_CNTL1;$/;" t typeref:struct:__anon7 |
| P_MM4_CNTL1_UNION sdioController.h /^} MM4_CNTL1_UNION, *P_MM4_CNTL1_UNION; $/;" t typeref:union:__anon8 |
| P_MM4_CNTL2 sdioController.h /^} MM4_CNTL2, *P_MM4_CNTL2;$/;" t typeref:struct:__anon9 |
| P_MM4_CNTL2_UNION sdioController.h /^} MM4_CNTL2_UNION, *P_MM4_CNTL2_UNION; $/;" t typeref:union:__anon10 |
| P_MM4_I_SIGN_EN sdioController.h /^} MM4_I_STAT, *P_MM4_I_STAT, MM4_I_STAT_EN, *P_MM4_I_STAT_EN, MM4_I_SIGN_EN, *P_MM4_I_SIGN_EN;$/;" t typeref:struct:__anon11 |
| P_MM4_I_STAT sdioController.h /^} MM4_I_STAT, *P_MM4_I_STAT, MM4_I_STAT_EN, *P_MM4_I_STAT_EN, MM4_I_SIGN_EN, *P_MM4_I_SIGN_EN;$/;" t typeref:struct:__anon11 |
| P_MM4_I_STAT_EN sdioController.h /^} MM4_I_STAT, *P_MM4_I_STAT, MM4_I_STAT_EN, *P_MM4_I_STAT_EN, MM4_I_SIGN_EN, *P_MM4_I_SIGN_EN;$/;" t typeref:struct:__anon11 |
| P_MM4_I_STAT_UNION sdioController.h /^} MM4_I_STAT_UNION, *P_MM4_I_STAT_UNION; $/;" t typeref:union:__anon12 |
| P_MM4_SDMMC_CONTEXT_T sdioController.h /^} MM4_SDMMC_CONTEXT_T, *P_MM4_SDMMC_CONTEXT_T;$/;" t typeref:struct:__anon27 |
| P_MM4_SDMMC_T sdioController.h /^} MM4_SDMMC_T, *P_MM4_SDMMC_T;$/;" t typeref:struct:__anon1 |
| P_MM4_SD_CE_ATA_1_2 sdioController.h /^} MM4_SD_CE_ATA_1_2, *P_MM4_SD_CE_ATA_1_2;$/;" t typeref:struct:__anon22 |
| P_MM4_SD_CFG_FIFO_PARAM sdioController.h /^} MM4_SD_CFG_FIFO_PARAM, *P_MM4_SD_CFG_FIFO_PARAM;$/;" t typeref:struct:__anon18 |
| P_MM4_SD_CFG_FIFO_PARAM_UNION sdioController.h /^} MM4_SD_CFG_FIFO_PARAM_UNION, *P_MM4_SD_CFG_FIFO_PARAM_UNION; $/;" t typeref:union:__anon19 |
| P_MM4_SD_FIFO_PARAM sdioController.h /^} MM4_SD_FIFO_PARAM, *P_MM4_SD_FIFO_PARAM;$/;" t typeref:struct:__anon20 |
| P_MM4_SD_FIFO_PARAM_UNION sdioController.h /^} MM4_SD_FIFO_PARAM_UNION, *P_MM4_SD_FIFO_PARAM_UNION; $/;" t typeref:union:__anon21 |
| P_MM4_SD_MAX_CURRENT1_2 sdioController.h /^} MM4_SD_MAX_CURRENT1_2, *P_MM4_SD_MAX_CURRENT1_2;$/;" t typeref:struct:__anon16 |
| P_MM4_SD_MAX_CURRENT1_2_UNION sdioController.h /^} MM4_SD_MAX_CURRENT1_2_UNION, *P_MM4_SD_MAX_CURRENT1_2_UNION; $/;" t typeref:union:__anon17 |
| P_MM4_STATE sdioController.h /^} MM4_STATE, *P_MM4_STATE;$/;" t typeref:struct:__anon5 |
| P_MM4_STATE_UNION sdioController.h /^} MM4_STATE_UNION, *P_MM4_STATE_UNION; $/;" t typeref:union:__anon6 |
| P_MM4_TX_CFG sdioController.h /^}MM4_TX_CFG, *P_MM4_TX_CFG ;$/;" t typeref:struct:__anon24 |
| P_SDMMC_Properties_T sdmmc_api.h /^SDMMC_Properties_T, *P_SDMMC_Properties_T;$/;" t typeref:struct:__anon48 |
| PartitionAccess sdmmc_api.h /^ unsigned int PartitionAccess : 3;$/;" m struct:__anon50 |
| PlatformBusy sdioDiag.c 61;" d file: |
| PlatformReady sdioDiag.c 62;" d file: |
| ProgramError sdioDiag.c 67;" d file: |
| ProtectionRegProgramError sdioDiag.c 69;" d file: |
| R1_ADDR_MISALIGN_ERROR sdmmc_api.h /^ R1_ADDR_MISALIGN_ERROR = XLLP_BIT_30,$/;" e enum:__anon49 |
| R1_ADDR_RANGE_ERROR sdmmc_api.h /^ R1_ADDR_RANGE_ERROR = XLLP_BIT_31$/;" e enum:__anon49 |
| R1_BLK_LEN_ERROR sdmmc_api.h /^ R1_BLK_LEN_ERROR = XLLP_BIT_29,$/;" e enum:__anon49 |
| R1_CC_ERROR sdmmc_api.h /^ R1_CC_ERROR = XLLP_BIT_20,$/;" e enum:__anon49 |
| R1_CIDCSD_OVERWRITE_ERROR sdmmc_api.h /^ R1_CIDCSD_OVERWRITE_ERROR = XLLP_BIT_16,$/;" e enum:__anon49 |
| R1_COM_CRC_ERROR sdmmc_api.h /^ R1_COM_CRC_ERROR = XLLP_BIT_23,$/;" e enum:__anon49 |
| R1_ECC_ERROR sdmmc_api.h /^ R1_ECC_ERROR = XLLP_BIT_21,$/;" e enum:__anon49 |
| R1_ERASE_PARAM_ERROR sdmmc_api.h /^ R1_ERASE_PARAM_ERROR = XLLP_BIT_27,$/;" e enum:__anon49 |
| R1_ERASE_RESET_ERROR sdmmc_api.h /^ R1_ERASE_RESET_ERROR = XLLP_BIT_13,$/;" e enum:__anon49 |
| R1_ERASE_SEQ_ERROR sdmmc_api.h /^ R1_ERASE_SEQ_ERROR = XLLP_BIT_28,$/;" e enum:__anon49 |
| R1_GENERAL_ERROR sdmmc_api.h /^ R1_GENERAL_ERROR = XLLP_BIT_19,$/;" e enum:__anon49 |
| R1_ILL_CMD_ERROR sdmmc_api.h /^ R1_ILL_CMD_ERROR = XLLP_BIT_22,$/;" e enum:__anon49 |
| R1_LOCKEDCARDMASK sdmmc_api.h 53;" d |
| R1_LOCK_ERROR sdmmc_api.h /^ R1_LOCK_ERROR = XLLP_BIT_25,$/;" e enum:__anon49 |
| R1_LOCK_ULOCK_ERRROR sdmmc_api.h /^ R1_LOCK_ULOCK_ERRROR = XLLP_BIT_24,$/;" e enum:__anon49 |
| R1_NOMASK sdmmc_api.h 54;" d |
| R1_OVERRUN_ERROR sdmmc_api.h /^ R1_OVERRUN_ERROR = XLLP_BIT_17,$/;" e enum:__anon49 |
| R1_RESP sdmmc_api.h /^ UINT_T R1_RESP; \/\/ Capture the R1 Response of the Card for most commands$/;" m struct:__anon46 |
| R1_SDMMC_RESPONSE_CODES sdmmc_api.h /^} R1_SDMMC_RESPONSE_CODES;$/;" t typeref:enum:__anon49 |
| R1_SWITCH_ERROR sdmmc_api.h /^ R1_SWITCH_ERROR = XLLP_BIT_0,$/;" e enum:__anon49 |
| R1_UNDERUN_ERROR sdmmc_api.h /^ R1_UNDERUN_ERROR = XLLP_BIT_18,$/;" e enum:__anon49 |
| R1_WP_ERROR sdmmc_api.h /^ R1_WP_ERROR = XLLP_BIT_26,$/;" e enum:__anon49 |
| R2_BYTE_LENGTH sdmmc_api.h 34;" d |
| RCA sdmmc_api.h /^ UINT_T RCA; \/\/ RCA of the card $/;" m struct:__anon45 |
| READ sdmmc_api.h /^ READ, \/\/ Multiple Block Read State$/;" e enum:__anon43 |
| READY sdmmc_api.h /^ READY, \/\/ The Card is ready for Data Transfer $/;" e enum:__anon43 |
| RESPONSE_LENGTH sdmmc_api.h 33;" d |
| ReadBlockSize sdmmc_api.h /^ UINT_T ReadBlockSize; \/\/ Bytes - Block Size Used for Reads$/;" m struct:__anon48 |
| ReadDisturbError sdioDiag.c 81;" d file: |
| ReadError sdioDiag.c 58;" d file: |
| Reserved sdmmc_api.h /^ unsigned int Reserved :7;$/;" m struct:__anon37 |
| Reserved sdmmc_api.h /^ unsigned int Reserved :7;$/;" m struct:__anon39 |
| Reserved0 sdmmc_api.h /^ unsigned int Reserved0 :5;$/;" m struct:__anon41 |
| Reserved0 sdmmc_api.h /^ unsigned int Reserved0 : 1;$/;" m struct:__anon50 |
| Reserved1 sdmmc_api.h /^ unsigned int Reserved1 :5;$/;" m struct:__anon41 |
| RespType sdmmc_api.h /^ UINT_T RespType; \/\/ Info about the response type and potential for busy state.$/;" m struct:__anon44 |
| SCR sdmmc_api.h /^ SCR_LAYOUT SCR; \/\/ SCR Register Contents$/;" m struct:__anon45 |
| SCRSD1BITMODE sdmmc_api.h 50;" d |
| SCRSD4BITMODE sdmmc_api.h 51;" d |
| SCR_LAYOUT sdmmc_api.h /^} SCR_LAYOUT;$/;" t typeref:struct:__anon36 |
| SCR_VALUE sdmmc_api.h /^ UINT_T SCR_VALUE[2];$/;" m struct:__anon36 |
| SD sdmmc_api.h /^ UINT_T SD; \/\/ Indicates if the card is SD, eSD or MMC$/;" m struct:__anon48 |
| SD sdmmc_api.h /^ SD_LAYOUT SD; \/\/ SD status $/;" m struct:__anon45 |
| SD3_SLOT1_BASE_OFFSET sdioDiag.c 28;" d file: |
| SD3_SLOT2_BASE_OFFSET sdioDiag.c 29;" d file: |
| SD3_SLOT3_BASE_OFFSET sdioDiag.c 31;" d file: |
| SDBUS_4BIT sdioController.h 257;" d |
| SDCLK_SEL_DIV_1 sdioController.h 255;" d |
| SDCLK_SEL_DIV_1024 sdioController.h 245;" d |
| SDCLK_SEL_DIV_128 sdioController.h 248;" d |
| SDCLK_SEL_DIV_16 sdioController.h 251;" d |
| SDCLK_SEL_DIV_2 sdioController.h 254;" d |
| SDCLK_SEL_DIV_256 sdioController.h 247;" d |
| SDCLK_SEL_DIV_32 sdioController.h 250;" d |
| SDCLK_SEL_DIV_4 sdioController.h 253;" d |
| SDCLK_SEL_DIV_512 sdioController.h 246;" d |
| SDCLK_SEL_DIV_64 sdioController.h 249;" d |
| SDCLK_SEL_DIV_8 sdioController.h 252;" d |
| SDIO3_SLOT1_REG_BASE sdioDiag.c 35;" d file: |
| SDIO3_SLOT2_REG_BASE sdioDiag.c 36;" d file: |
| SDIO3_SLOT3_REG_BASE sdioDiag.c 37;" d file: |
| SDIORead sdioDiag.c /^int SDIORead(P_SDMMC_Properties_T pSDMMCP, unsigned int start, unsigned int blk, unsigned char *puchReadBuff)$/;" f |
| SDIOReadOneBlk sdioDiag.c /^UINT_T SDIOReadOneBlk (P_SDMMC_Properties_T pSDMMCP, UINT_T FlashOffset, UINT_T LocalBuffer, UINT_T Size)$/;" f |
| SDIOWrite sdioDiag.c /^int SDIOWrite(P_SDMMC_Properties_T pSDMMCP, unsigned int start, unsigned int blk, unsigned char *puchWriteBuff)$/;" f |
| SDIOWriteOneBlk sdioDiag.c /^UINT_T SDIOWriteOneBlk (P_SDMMC_Properties_T pSDMMCP, UINT_T FlashOffset, UINT_T LocalBuffer, UINT_T Size)$/;" f |
| SDIO_ADMA_DESC sdioController.h /^} SDIO_ADMA_DESC, *SDIO_ADMA_DESC_PTR;$/;" t typeref:struct:sdio_adma_desc |
| SDIO_ADMA_DESC_PTR sdioController.h /^} SDIO_ADMA_DESC, *SDIO_ADMA_DESC_PTR;$/;" t typeref:struct:sdio_adma_desc |
| SDIO_ADMA_RXDESC_BASE sdioDiag.c 45;" d file: |
| SDIO_ADMA_TXDESC_BASE sdioDiag.c 46;" d file: |
| SDIO_BOOT_BUF sdioDiag.c 47;" d file: |
| SDIO_CARD_PRESENT_BIT sdioDiag.c 49;" d file: |
| SDIO_CID sdioDiag.c /^} SDIO_CID;$/;" t typeref:struct:__anon28 file: |
| SDIO_CMD52_Arg_T sdmmc_api.h /^} __attribute__((packed)) SDIO_CMD52_Arg_T;$/;" t typeref:struct:SDIO_CMD52_Arg_s |
| SDIO_CMD52_Arg_Union sdmmc_api.h /^typedef union SDIO_CMD52_Arg_Union$/;" u |
| SDIO_CMD52_Arg_Union_T sdmmc_api.h /^}SDIO_CMD52_Arg_Union_T;$/;" t typeref:union:SDIO_CMD52_Arg_Union |
| SDIO_CMD52_Arg_s sdmmc_api.h /^typedef struct SDIO_CMD52_Arg_s$/;" s |
| SDIO_CSD sdioDiag.c /^} SDIO_CSD;$/;" t typeref:struct:__anon29 file: |
| SDIO_DMA sdioController.h 5;" d |
| SDIO_INTERNAL_DIV sdioDiag.c 25;" d file: |
| SDIO_OCR_ALL_VOLTAGES sdioController.h 529;" d |
| SDIO_OCR_VOLTAGE_2_0_TO_2_1 sdioController.h 513;" d |
| SDIO_OCR_VOLTAGE_2_1_TO_2_2 sdioController.h 514;" d |
| SDIO_OCR_VOLTAGE_2_2_TO_2_3 sdioController.h 515;" d |
| SDIO_OCR_VOLTAGE_2_3_TO_2_4 sdioController.h 516;" d |
| SDIO_OCR_VOLTAGE_2_4_TO_2_5 sdioController.h 517;" d |
| SDIO_OCR_VOLTAGE_2_5_TO_2_6 sdioController.h 518;" d |
| SDIO_OCR_VOLTAGE_2_6_TO_2_7 sdioController.h 519;" d |
| SDIO_OCR_VOLTAGE_2_7_TO_2_8 sdioController.h 520;" d |
| SDIO_OCR_VOLTAGE_2_8_TO_2_9 sdioController.h 521;" d |
| SDIO_OCR_VOLTAGE_2_9_TO_3_0 sdioController.h 522;" d |
| SDIO_OCR_VOLTAGE_3_0_TO_3_1 sdioController.h 523;" d |
| SDIO_OCR_VOLTAGE_3_1_TO_3_2 sdioController.h 524;" d |
| SDIO_OCR_VOLTAGE_3_2_TO_3_3 sdioController.h 525;" d |
| SDIO_OCR_VOLTAGE_3_3_TO_3_4 sdioController.h 526;" d |
| SDIO_OCR_VOLTAGE_3_4_TO_3_5 sdioController.h 527;" d |
| SDIO_OCR_VOLTAGE_3_5_TO_3_6 sdioController.h 528;" d |
| SDIO_Properties_T sdmmc_api.h /^} __attribute__((packed)) SDIO_Properties_T;$/;" t typeref:struct:SDIO_Properties_s |
| SDIO_Properties_s sdmmc_api.h /^typedef struct SDIO_Properties_s$/;" s |
| SDIO_RD_BUF sdioDiag.c 43;" d file: |
| SDIO_SCR sdioDiag.c /^typedef struct SDIO_SCR $/;" s file: |
| SDIO_SCR sdioDiag.c /^} SDIO_SCR;$/;" t typeref:struct:SDIO_SCR file: |
| SDIO_SD sdioDiag.c /^typedef struct SDIO_SD $/;" s file: |
| SDIO_SD sdioDiag.c /^} SDIO_SD;$/;" t typeref:struct:SDIO_SD file: |
| SDIO_WD_BUF sdioDiag.c 44;" d file: |
| SDMA_Mode sdmmc_api.h /^ UINT_T SDMA_Mode; \/\/ Enable SDMA Mode or Not.$/;" m struct:__anon48 |
| SDMMCDeviceNotReadyError sdioDiag.c 105;" d file: |
| SDMMCDeviceVoltageNotSupported sdioDiag.c 107;" d file: |
| SDMMCInitializationError sdioDiag.c 106;" d file: |
| SDMMC_ADDR_MISALIGN_ERROR sdioDiag.c 103;" d file: |
| SDMMC_ADDR_RANGE_ERROR sdioDiag.c 104;" d file: |
| SDMMC_BLK_LEN_ERROR sdioDiag.c 102;" d file: |
| SDMMC_CARD_REGISTERS sdmmc_api.h /^} SDMMC_CARD_REGISTERS; $/;" t typeref:struct:__anon45 |
| SDMMC_CC_ERROR sdioDiag.c 93;" d file: |
| SDMMC_CIDCSD_OVERWRITE_ERROR sdioDiag.c 89;" d file: |
| SDMMC_COM_CRC_ERROR sdioDiag.c 96;" d file: |
| SDMMC_ECC_ERROR sdioDiag.c 94;" d file: |
| SDMMC_ERASE_PARAM_ERROR sdioDiag.c 100;" d file: |
| SDMMC_ERASE_RESET_ERROR sdioDiag.c 88;" d file: |
| SDMMC_ERASE_SEQ_ERROR sdioDiag.c 101;" d file: |
| SDMMC_GENERAL_ERROR sdioDiag.c 92;" d file: |
| SDMMC_ILL_CMD_ERROR sdioDiag.c 95;" d file: |
| SDMMC_IO_TRANSFERS sdmmc_api.h /^} SDMMC_IO_TRANSFERS;$/;" t typeref:enum:__anon43 |
| SDMMC_LOCK_ERROR sdioDiag.c 98;" d file: |
| SDMMC_LOCK_ULOCK_ERRROR sdioDiag.c 97;" d file: |
| SDMMC_OVERRUN_ERROR sdioDiag.c 90;" d file: |
| SDMMC_Prop sdioDiag.c /^SDMMC_Properties_T SDMMC_Prop;$/;" v |
| SDMMC_Properties_T sdmmc_api.h /^SDMMC_Properties_T, *P_SDMMC_Properties_T;$/;" t typeref:struct:__anon48 |
| SDMMC_RESPONSE sdmmc_api.h /^} SDMMC_RESPONSE;$/;" t typeref:struct:__anon46 |
| SDMMC_SWITCH_ERROR sdioDiag.c 87;" d file: |
| SDMMC_TRANSFER sdmmc_api.h /^} SDMMC_TRANSFER;$/;" t typeref:struct:__anon44 |
| SDMMC_UNDERUN_ERROR sdioDiag.c 91;" d file: |
| SDMMC_WP_ERROR sdioDiag.c 99;" d file: |
| SDVHSARGSHIFT sdmmc_api.h 43;" d |
| SDVHSCHECKPATTERN sdmmc_api.h 44;" d |
| SDVHS_2_7_TO_3_6 sdmmc_api.h 41;" d |
| SDVHS_LOW_VOLT sdmmc_api.h 42;" d |
| SD_CMD6_4BITMODE sdmmc_api.h 52;" d |
| SD_CMD6_Bits sdmmc_api.h /^ UINT_T SD_CMD6_Bits;$/;" m union:__anon40 |
| SD_CMD6_LAYOUT sdmmc_api.h /^} SD_CMD6_LAYOUT;$/;" t typeref:struct:__anon39 |
| SD_CMD6_Layout sdmmc_api.h /^ SD_CMD6_LAYOUT SD_CMD6_Layout;$/;" m union:__anon40 |
| SD_CMD6_OVERLAY sdmmc_api.h /^} SD_CMD6_OVERLAY;$/;" t typeref:union:__anon40 |
| SD_ERROR_INT_STATUS_ADMA_ERR sdmmc_api.h 398;" d |
| SD_ERROR_INT_STATUS_AUTO_CMD12_ERR sdmmc_api.h 400;" d |
| SD_ERROR_INT_STATUS_AXI_RESP_ERR sdmmc_api.h 394;" d |
| SD_ERROR_INT_STATUS_CMD_CRC_ERR sdmmc_api.h 414;" d |
| SD_ERROR_INT_STATUS_CMD_END_BIT_ERR sdmmc_api.h 412;" d |
| SD_ERROR_INT_STATUS_CMD_INDEX_ERR sdmmc_api.h 410;" d |
| SD_ERROR_INT_STATUS_CMD_TIMEOUT_ERR sdmmc_api.h 416;" d |
| SD_ERROR_INT_STATUS_CPL_TIMEOUT_ERR sdmmc_api.h 392;" d |
| SD_ERROR_INT_STATUS_CRC_STATUS_ERR sdmmc_api.h 390;" d |
| SD_ERROR_INT_STATUS_CUR_LIMIT_ERR sdmmc_api.h 402;" d |
| SD_ERROR_INT_STATUS_DATA_TIMEOUT_ERR sdmmc_api.h 408;" d |
| SD_ERROR_INT_STATUS_RD_DATA_CRC_ERR sdmmc_api.h 406;" d |
| SD_ERROR_INT_STATUS_RD_DATA_END_BIT_ERR sdmmc_api.h 404;" d |
| SD_ERROR_INT_STATUS_SPI_ERR sdmmc_api.h 396;" d |
| SD_LAYOUT sdmmc_api.h /^} SD_LAYOUT;$/;" t typeref:struct:__anon35 |
| SD_NO_CMD1 sdmmc_api.h 36;" d |
| SD_OCR_ARG sdmmc_api.h 30;" d |
| SD_OCR_VOLTAGE_1_8 sdioController.h 497;" d |
| SD_OCR_VOLTAGE_1_8 sdioController.h 535;" d |
| SD_OCR_VOLTAGE_1_8_TO_3_3 sdioController.h 496;" d |
| SD_OCR_VOLTAGE_1_8_TO_3_3 sdioController.h 534;" d |
| SD_OCR_VOLTAGE_3_3_TO_3_6 sdioController.h 495;" d |
| SD_OCR_VOLTAGE_3_3_TO_3_6 sdioController.h 533;" d |
| SD_SPEC_MASK sdmmc_api.h 262;" d |
| SD_SPEC_OFFSET sdmmc_api.h 263;" d |
| SD_VALUE sdmmc_api.h /^ UINT_T SD_VALUE[4];$/;" m struct:__anon35 |
| SD_VHS sdmmc_api.h /^ UINT_T SD_VHS; \/\/ SD Voltage Acceptance Return Value (SD only)$/;" m struct:__anon48 |
| SECTOR_ACCESS sdmmc_api.h /^ SECTOR_ACCESS = 1$/;" e enum:__anon47 |
| SM_APB_GPIO0_BASE apbRegBase.h 38;" d |
| SM_APB_GPIO1_BASE apbRegBase.h 31;" d |
| SM_APB_I2C0_BASE apbRegBase.h 33;" d |
| SM_APB_I2C1_BASE apbRegBase.h 34;" d |
| SM_APB_ICTL_BASE apbRegBase.h 26;" d |
| SM_APB_SPI_BASE apbRegBase.h 32;" d |
| SM_APB_TIMERS_BASE apbRegBase.h 30;" d |
| SM_APB_UART0_BASE apbRegBase.h 35;" d |
| SM_APB_UART1_BASE apbRegBase.h 36;" d |
| SM_APB_UART2_BASE apbRegBase.h 37;" d |
| SM_APB_WDT0_BASE apbRegBase.h 27;" d |
| SM_APB_WDT1_BASE apbRegBase.h 28;" d |
| SM_APB_WDT2_BASE apbRegBase.h 29;" d |
| SM_PIN_MUX_REG apbRegBase.h 41;" d |
| SM_SYS_CTRL_REG_BASE apbRegBase.h 39;" d |
| SOC_SM_APB_REG_BASE apbRegBase.h 24;" d |
| SOC_SM_DTCM_BASE apbRegBase.h 23;" d |
| SOC_SM_ITCM_BASE apbRegBase.h 22;" d |
| SWITCH_FUNCTION_MODE sdmmc_api.h 219;" d |
| SdioStart sdioDiag.c /^int SdioStart(P_SDMMC_Properties_T pSDMMCP)$/;" f |
| SendStopCommand sdmmc_api.h /^ UINT_T SendStopCommand; \/\/ If some read\/write transactions require stop command $/;" m struct:__anon46 |
| SerialNum sdmmc_api.h /^ UINT_T SerialNum; $/;" m struct:__anon33 |
| Slot sdmmc_api.h /^ UINT_T Slot; \/\/ Indicates which slot used$/;" m struct:__anon48 |
| StartDiscardWords sdmmc_api.h /^ UINT_T StartDiscardWords; \/\/ Words - from the first block that caller doesn't want$/;" m struct:__anon44 |
| State sdmmc_api.h /^ volatile SDMMC_IO_TRANSFERS State; \/\/ Indicate State of the card$/;" m struct:__anon48 |
| StrictErrorCheck sdmmc_api.h /^ UINT_T StrictErrorCheck; \/\/ Relax error checking during card init. Not all cards are strictly compliant.$/;" m struct:__anon48 |
| TRUE sdioController.h 20;" d |
| TRUE sdmmc_api.h 25;" d |
| TimeOutError sdioDiag.c 83;" d file: |
| Trans sdmmc_api.h /^ SDMMC_TRANSFER Trans; \/\/ Transfer State of the Card$/;" m struct:__anon48 |
| TransWordSize sdmmc_api.h /^ UINT_T TransWordSize; \/\/ Total Number of Bytes involved in this transaction$/;" m struct:__anon44 |
| UART_BAUD_SETTING_DELAY Diag.h 34;" d |
| UART_DLH Diag.h 115;" d |
| UART_DLH Diag.h 120;" d |
| UART_DLH_100M_115200 Diag.h 68;" d |
| UART_DLH_100M_19200 Diag.h 62;" d |
| UART_DLH_100M_9600 Diag.h 65;" d |
| UART_DLH_14P318M_115200 Diag.h 86;" d |
| UART_DLH_14P318M_9600 Diag.h 88;" d |
| UART_DLH_15M_19200 Diag.h 106;" d |
| UART_DLH_18M_19200 Diag.h 100;" d |
| UART_DLH_1P5M_19200 Diag.h 47;" d |
| UART_DLH_20M_115200 Diag.h 71;" d |
| UART_DLH_20M_19200 Diag.h 74;" d |
| UART_DLH_20M_9600 Diag.h 77;" d |
| UART_DLH_24M_19200 Diag.h 91;" d |
| UART_DLH_24P576M_115200 Diag.h 83;" d |
| UART_DLH_25M_115200 Diag.h 80;" d |
| UART_DLH_30M_115200 Diag.h 103;" d |
| UART_DLH_36M_115200 Diag.h 94;" d |
| UART_DLH_48M_115200 Diag.h 97;" d |
| UART_DLH_50M_38400 Diag.h 109;" d |
| UART_DLH_5M_9600 Diag.h 38;" d |
| UART_DLH_6M_19200 Diag.h 44;" d |
| UART_DLH_7P2M_19200 Diag.h 56;" d |
| UART_DLH_9600 Diag.h 117;" d |
| UART_DLH_9600 Diag.h 122;" d |
| UART_DLH_9M_115200 Diag.h 50;" d |
| UART_DLH_9M_19200 Diag.h 53;" d |
| UART_DLL Diag.h 114;" d |
| UART_DLL Diag.h 119;" d |
| UART_DLL_100M_115200 Diag.h 67;" d |
| UART_DLL_100M_19200 Diag.h 61;" d |
| UART_DLL_100M_9600 Diag.h 64;" d |
| UART_DLL_14P318M_115200 Diag.h 85;" d |
| UART_DLL_14P318M_9600 Diag.h 87;" d |
| UART_DLL_15M_19200 Diag.h 105;" d |
| UART_DLL_18M_19200 Diag.h 99;" d |
| UART_DLL_1P2M_19200 Diag.h 59;" d |
| UART_DLL_1P5M_19200 Diag.h 46;" d |
| UART_DLL_20M_115200 Diag.h 70;" d |
| UART_DLL_20M_19200 Diag.h 73;" d |
| UART_DLL_20M_9600 Diag.h 76;" d |
| UART_DLL_24M_19200 Diag.h 90;" d |
| UART_DLL_24P576M_115200 Diag.h 82;" d |
| UART_DLL_25M_115200 Diag.h 79;" d |
| UART_DLL_2M_9600 Diag.h 58;" d |
| UART_DLL_30M_115200 Diag.h 102;" d |
| UART_DLL_36M_115200 Diag.h 93;" d |
| UART_DLL_48M_115200 Diag.h 96;" d |
| UART_DLL_4M_19200 Diag.h 40;" d |
| UART_DLL_50M_38400 Diag.h 108;" d |
| UART_DLL_5M_19200 Diag.h 41;" d |
| UART_DLL_5M_9600 Diag.h 37;" d |
| UART_DLL_66M_115200 Diag.h 111;" d |
| UART_DLL_6M_19200 Diag.h 43;" d |
| UART_DLL_7P2M_19200 Diag.h 55;" d |
| UART_DLL_9600 Diag.h 116;" d |
| UART_DLL_9600 Diag.h 121;" d |
| UART_DLL_9M_115200 Diag.h 49;" d |
| UART_DLL_9M_19200 Diag.h 52;" d |
| UINT32_T sdioController.h /^typedef unsigned long UINT32_T, ULONG;$/;" t |
| UINT_T sdioController.h /^typedef unsigned int UINT_T;$/;" t |
| ULONG sdioController.h /^typedef unsigned long UINT32_T, ULONG;$/;" t |
| UNINITIALIZED sdmmc_api.h /^ UNINITIALIZED, \/\/ Controller and Card are uninitialized$/;" e enum:__anon43 |
| USE_CMD_LINE Diag.h 23;" d |
| USE_CMD_LINE Diag.h 26;" d |
| USE_UART Diag.h 24;" d |
| USE_UART Diag.h 27;" d |
| VUINT32_T sdioController.h /^typedef volatile unsigned long VUINT32_T;$/;" t |
| VUINT_T sdioController.h /^typedef volatile unsigned int VUINT_T;$/;" t |
| Value sdmmc_api.h /^ unsigned int Value :8;$/;" m struct:__anon41 |
| WP_GroupEnable sdioDiag.c /^ unsigned char WP_GroupEnable;$/;" m struct:__anon29 file: |
| WP_GroupSize sdioDiag.c /^ unsigned char WP_GroupSize; \/\/SD:7 bits, MMC: 5 bits$/;" m struct:__anon29 file: |
| WP_perm sdioDiag.c /^ unsigned char WP_perm;$/;" m struct:__anon29 file: |
| WP_temp sdioDiag.c /^ unsigned char WP_temp;$/;" m struct:__anon29 file: |
| WRITE sdmmc_api.h /^ WRITE, \/\/ Multiple Block Write State$/;" e enum:__anon43 |
| WordIndex sdmmc_api.h /^ UINT_T WordIndex; \/\/ Words - Word index to the progress in this transfer request$/;" m struct:__anon44 |
| WriteBlockSize sdmmc_api.h /^ UINT_T WriteBlockSize; \/\/ Bytes - Block Size Used for Writes$/;" m struct:__anon48 |
| WriteError sdioDiag.c 57;" d file: |
| XLLP_BIT_0 sdmmc_api.h 354;" d |
| XLLP_BIT_1 sdmmc_api.h 355;" d |
| XLLP_BIT_10 sdmmc_api.h 364;" d |
| XLLP_BIT_11 sdmmc_api.h 365;" d |
| XLLP_BIT_12 sdmmc_api.h 366;" d |
| XLLP_BIT_13 sdmmc_api.h 367;" d |
| XLLP_BIT_14 sdmmc_api.h 368;" d |
| XLLP_BIT_15 sdmmc_api.h 369;" d |
| XLLP_BIT_16 sdmmc_api.h 370;" d |
| XLLP_BIT_17 sdmmc_api.h 371;" d |
| XLLP_BIT_18 sdmmc_api.h 372;" d |
| XLLP_BIT_19 sdmmc_api.h 373;" d |
| XLLP_BIT_2 sdmmc_api.h 356;" d |
| XLLP_BIT_20 sdmmc_api.h 374;" d |
| XLLP_BIT_21 sdmmc_api.h 375;" d |
| XLLP_BIT_22 sdmmc_api.h 376;" d |
| XLLP_BIT_23 sdmmc_api.h 377;" d |
| XLLP_BIT_24 sdmmc_api.h 378;" d |
| XLLP_BIT_25 sdmmc_api.h 379;" d |
| XLLP_BIT_26 sdmmc_api.h 380;" d |
| XLLP_BIT_27 sdmmc_api.h 381;" d |
| XLLP_BIT_28 sdmmc_api.h 382;" d |
| XLLP_BIT_29 sdmmc_api.h 383;" d |
| XLLP_BIT_3 sdmmc_api.h 357;" d |
| XLLP_BIT_30 sdmmc_api.h 384;" d |
| XLLP_BIT_31 sdmmc_api.h 385;" d |
| XLLP_BIT_4 sdmmc_api.h 358;" d |
| XLLP_BIT_5 sdmmc_api.h 359;" d |
| XLLP_BIT_6 sdmmc_api.h 360;" d |
| XLLP_BIT_7 sdmmc_api.h 361;" d |
| XLLP_BIT_8 sdmmc_api.h 362;" d |
| XLLP_BIT_9 sdmmc_api.h 363;" d |
| XLLP_MMC sdmmc_api.h /^ XLLP_MMC = 0, $/;" e enum:__anon31 |
| XLLP_MMC_CMD sdmmc_api.h /^} XLLP_MMC_CMD;$/;" t typeref:enum:__anon32 |
| XLLP_MMC_CMD0 sdmmc_api.h /^ XLLP_MMC_CMD0 = 0x0, \/\/ go idle state$/;" e enum:__anon32 |
| XLLP_MMC_CMD1 sdmmc_api.h /^ XLLP_MMC_CMD1 = 0x1, \/\/ send op command$/;" e enum:__anon32 |
| XLLP_MMC_CMD10 sdmmc_api.h /^ XLLP_MMC_CMD10 = 0xa, \/\/ send cid$/;" e enum:__anon32 |
| XLLP_MMC_CMD11 sdmmc_api.h /^ XLLP_MMC_CMD11 = 0xb, \/\/ read data until stop$/;" e enum:__anon32 |
| XLLP_MMC_CMD12 sdmmc_api.h /^ XLLP_MMC_CMD12 = 0xc, \/\/ stop transmission$/;" e enum:__anon32 |
| XLLP_MMC_CMD13 sdmmc_api.h /^ XLLP_MMC_CMD13 = 0xd, \/\/ send status$/;" e enum:__anon32 |
| XLLP_MMC_CMD15 sdmmc_api.h /^ XLLP_MMC_CMD15 = 0xf, \/\/ go inactive state$/;" e enum:__anon32 |
| XLLP_MMC_CMD16 sdmmc_api.h /^ XLLP_MMC_CMD16 = 0x10, \/\/ set block length$/;" e enum:__anon32 |
| XLLP_MMC_CMD17 sdmmc_api.h /^ XLLP_MMC_CMD17 = 0x11, \/\/ read single block$/;" e enum:__anon32 |
| XLLP_MMC_CMD18 sdmmc_api.h /^ XLLP_MMC_CMD18 = 0x12, \/\/ read multiple block$/;" e enum:__anon32 |
| XLLP_MMC_CMD2 sdmmc_api.h /^ XLLP_MMC_CMD2 = 0x2, \/\/ all send cid$/;" e enum:__anon32 |
| XLLP_MMC_CMD20 sdmmc_api.h /^ XLLP_MMC_CMD20 = 0x14, \/\/ write data until stop$/;" e enum:__anon32 |
| XLLP_MMC_CMD23 sdmmc_api.h /^ XLLP_MMC_CMD23 = 0x17, \/\/ Set Block Count$/;" e enum:__anon32 |
| XLLP_MMC_CMD24 sdmmc_api.h /^ XLLP_MMC_CMD24 = 0x18, \/\/ write block$/;" e enum:__anon32 |
| XLLP_MMC_CMD25 sdmmc_api.h /^ XLLP_MMC_CMD25 = 0x19, \/\/ write multiple block$/;" e enum:__anon32 |
| XLLP_MMC_CMD26 sdmmc_api.h /^ XLLP_MMC_CMD26 = 0x1a, \/\/ program CID$/;" e enum:__anon32 |
| XLLP_MMC_CMD27 sdmmc_api.h /^ XLLP_MMC_CMD27 = 0x1b, \/\/ program CSD$/;" e enum:__anon32 |
| XLLP_MMC_CMD28 sdmmc_api.h /^ XLLP_MMC_CMD28 = 0x1c, \/\/ set write prot$/;" e enum:__anon32 |
| XLLP_MMC_CMD29 sdmmc_api.h /^ XLLP_MMC_CMD29 = 0x1d, \/\/ clr write prot$/;" e enum:__anon32 |
| XLLP_MMC_CMD3 sdmmc_api.h /^ XLLP_MMC_CMD3 = 0x3, \/\/ set relative addr$/;" e enum:__anon32 |
| XLLP_MMC_CMD30 sdmmc_api.h /^ XLLP_MMC_CMD30 = 0x1e, \/\/ send write prot$/;" e enum:__anon32 |
| XLLP_MMC_CMD34 sdmmc_api.h /^ XLLP_MMC_CMD34 = 0x22, \/\/ untag sector$/;" e enum:__anon32 |
| XLLP_MMC_CMD35 sdmmc_api.h /^ XLLP_MMC_CMD35 = 0x23, \/\/ tag erase group start$/;" e enum:__anon32 |
| XLLP_MMC_CMD36 sdmmc_api.h /^ XLLP_MMC_CMD36 = 0x24, \/\/ tag erase group end$/;" e enum:__anon32 |
| XLLP_MMC_CMD37 sdmmc_api.h /^ XLLP_MMC_CMD37 = 0x25, \/\/ untag erase group$/;" e enum:__anon32 |
| XLLP_MMC_CMD38 sdmmc_api.h /^ XLLP_MMC_CMD38 = 0x26, \/\/ erase$/;" e enum:__anon32 |
| XLLP_MMC_CMD39 sdmmc_api.h /^ XLLP_MMC_CMD39 = 0x27, \/\/fast IO$/;" e enum:__anon32 |
| XLLP_MMC_CMD4 sdmmc_api.h /^ XLLP_MMC_CMD4 = 0x4, \/\/ set dsr$/;" e enum:__anon32 |
| XLLP_MMC_CMD40 sdmmc_api.h /^ XLLP_MMC_CMD40 = 0x28, \/\/ go irq state$/;" e enum:__anon32 |
| XLLP_MMC_CMD42 sdmmc_api.h /^ XLLP_MMC_CMD42 = 0x2a, \/\/ lock-unlock$/;" e enum:__anon32 |
| XLLP_MMC_CMD56 sdmmc_api.h /^ XLLP_MMC_CMD56 = 0x38, \/\/ gen cmd$/;" e enum:__anon32 |
| XLLP_MMC_CMD6 sdmmc_api.h /^ XLLP_MMC_CMD6 = 0x6, \/\/ MMC Switch Function Command$/;" e enum:__anon32 |
| XLLP_MMC_CMD7 sdmmc_api.h /^ XLLP_MMC_CMD7 = 0x7, \/\/ select\/deselect card$/;" e enum:__anon32 |
| XLLP_MMC_CMD8 sdmmc_api.h /^ XLLP_MMC_CMD8 = 0x8, \/\/ MMC request to read EXT CSD$/;" e enum:__anon32 |
| XLLP_MMC_CMD9 sdmmc_api.h /^ XLLP_MMC_CMD9 = 0x9, \/\/ send csd$/;" e enum:__anon32 |
| XLLP_SD sdmmc_api.h /^ XLLP_SD =1, $/;" e enum:__anon31 |
| XLLP_SD_ACMD13 sdmmc_api.h /^ XLLP_SD_ACMD13 = 0x0d, \/\/ Read SD Status$/;" e enum:__anon32 |
| XLLP_SD_ACMD41 sdmmc_api.h /^ XLLP_SD_ACMD41 = 0x29,$/;" e enum:__anon32 |
| XLLP_SD_ACMD51 sdmmc_api.h /^ XLLP_SD_ACMD51 = 0x33 \/\/ Read SD Configuration Register (SCR)$/;" e enum:__anon32 |
| XLLP_SD_ACMD6 sdmmc_api.h /^ XLLP_SD_ACMD6 = 0x6, \/\/ SD ACMD Command for SET_BUS_WIDTH$/;" e enum:__anon32 |
| XLLP_SD_CMD32 sdmmc_api.h /^ XLLP_SD_CMD32 = 0x20, \/\/ tag sector start$/;" e enum:__anon32 |
| XLLP_SD_CMD33 sdmmc_api.h /^ XLLP_SD_CMD33 = 0x21, \/\/ tag sector end$/;" e enum:__anon32 |
| XLLP_SD_CMD38 sdmmc_api.h /^ XLLP_SD_CMD38 = 0x26, \/\/ erase$/;" e enum:__anon32 |
| XLLP_SD_CMD55 sdmmc_api.h /^ XLLP_SD_CMD55 = 0x37, \/\/ app cmd$/;" e enum:__anon32 |
| XLLP_SD_CMD6 sdmmc_api.h /^ XLLP_SD_CMD6 = 0x6, \/\/ SD Switch Function Command$/;" e enum:__anon32 |
| XLLP_SD_CMD8 sdmmc_api.h /^ XLLP_SD_CMD8 = 0x8, \/\/ SD Card Interface Condition$/;" e enum:__anon32 |
| XLLP_SPI_CMD58 sdmmc_api.h /^ XLLP_SPI_CMD58 = 0x3a, \/\/ read ocr$/;" e enum:__anon32 |
| XLLP_SPI_CMD59 sdmmc_api.h /^ XLLP_SPI_CMD59 = 0x3b, \/\/ crc on-off$/;" e enum:__anon32 |
| XLLP_eSD sdmmc_api.h /^ XLLP_eSD = 2$/;" e enum:__anon31 |
| XLLP_eSD_CMD37 sdmmc_api.h /^ XLLP_eSD_CMD37 = 0x25, \/\/ SD PartitionManagement group Command $/;" e enum:__anon32 |
| XLLP_eSD_CMD43 sdmmc_api.h /^ XLLP_eSD_CMD43 = 0x2b, \/\/ Select Partition$/;" e enum:__anon32 |
| XLLP_eSD_CMD57 sdmmc_api.h /^ XLLP_eSD_CMD57 = 0x39,$/;" e enum:__anon32 |
| _DIAG_ Diag.h 2;" d |
| _IRQ_entry irqHandler.S /^_IRQ_entry:$/;" l |
| __APB_REG_BASE__ apbRegBase.h 2;" d |
| __MP_GIC_H__ gicDiag.h 10;" d |
| __SDIO_CONTROLLER_H sdioController.h 2;" d |
| __SDIO_INT_MODE___ sdioController.h 7;" d |
| __SDMMC_API_H__ sdmmc_api.h 14;" d |
| __UTIL_H__ util.h 6;" d |
| ac12crcer sdioController.h /^ unsigned int ac12crcer : 1; \/\/ 2$/;" m struct:__anon13 |
| ac12ender sdioController.h /^ unsigned int ac12ender : 1; \/\/ 3$/;" m struct:__anon13 |
| ac12err sdioController.h /^ unsigned int ac12err : 1; \/\/24$/;" m struct:__anon11 |
| ac12idxer sdioController.h /^ unsigned int ac12idxer : 1; \/\/ 4$/;" m struct:__anon13 |
| ac12nexe sdioController.h /^ unsigned int ac12nexe : 1; \/\/ 0$/;" m struct:__anon13 |
| ac12toer sdioController.h /^ unsigned int ac12toer : 1; \/\/ 1$/;" m struct:__anon13 |
| act1 sdioController.h /^ unsigned int act1 :1;$/;" m struct:sdio_adma_desc |
| act2 sdioController.h /^ unsigned int act2 :1;$/;" m struct:sdio_adma_desc |
| addr sdioController.h /^ unsigned int addr;$/;" m struct:sdio_adma_desc |
| adma1_support sdioController.h /^ unsigned int adma1_support : 1;$/;" m struct:__anon14 |
| adma2_support sdioController.h /^ unsigned int adma2_support : 1;$/;" m struct:__anon14 |
| admaerr sdioController.h /^ unsigned int admaerr : 1; \/\/25$/;" m struct:__anon11 |
| async_int_en sdioController.h /^ unsigned int async_int_en : 1; \/\/ 30$/;" m struct:__anon13 |
| async_int_support sdioController.h /^ unsigned int async_int_support : 1;$/;" m struct:__anon14 |
| auSize sdioDiag.c /^ unsigned short auSize;$/;" m struct:SDIO_SD file: |
| autocmd12 sdioController.h /^unsigned int autocmd12 : 2; \/\/ AutoCMD12 2$/;" m struct:__anon3 |
| axi_resp_err sdioController.h /^ unsigned int axi_resp_err : 1; \/\/29$/;" m struct:__anon11 |
| bgevnt sdioController.h /^ unsigned int bgevnt : 1; \/\/2$/;" m struct:__anon11 |
| bgirqen sdioController.h /^ unsigned int bgirqen : 1; \/\/ 19$/;" m struct:__anon7 |
| bgreqstp sdioController.h /^ unsigned int bgreqstp : 1; \/\/ 16$/;" m struct:__anon7 |
| blk_cnt sdioController.h /^ unsigned int blk_cnt : 16; \/\/ Block Count for Current Transfer$/;" m struct:__anon2 |
| blkcbten sdioController.h /^unsigned int blkcbten : 1; \/\/ Block Count Enable 1$/;" m struct:__anon3 |
| boot_ack sdioController.h /^ unsigned int boot_ack : 1; \/\/ Bit 3$/;" m struct:__anon18 |
| bsclkfreq sdioController.h /^ unsigned int bsclkfreq : 8;$/;" m struct:__anon14 |
| bufrden sdioController.h /^ unsigned int bufrden : 1;$/;" m struct:__anon5 |
| bufrdrdy sdioController.h /^ unsigned int bufrdrdy : 1; \/\/5$/;" m struct:__anon11 |
| bufwren sdioController.h /^ unsigned int bufwren : 1;$/;" m struct:__anon5 |
| bufwrrdy sdioController.h /^ unsigned int bufwrrdy : 1; \/\/4$/;" m struct:__anon11 |
| busWidth sdioDiag.c /^ unsigned char busWidth;$/;" m struct:SDIO_SCR file: |
| buspwr sdioController.h /^ unsigned int buspwr : 1; \/\/ 8$/;" m struct:__anon7 |
| cardCommandClass sdioDiag.c /^ unsigned short cardCommandClass;$/;" m struct:__anon29 file: |
| card_det_l sdioController.h /^ unsigned int card_det_l : 1; \/\/ 6$/;" m struct:__anon7 |
| card_det_s sdioController.h /^ unsigned int card_det_s : 1; \/\/ 7$/;" m struct:__anon7 |
| card_ins_wake sdioController.h /^ unsigned int card_ins_wake : 1; \/\/ 25$/;" m struct:__anon7 |
| card_int_wake sdioController.h /^ unsigned int card_int_wake : 1; \/\/ 24$/;" m struct:__anon7 |
| card_rem_wake sdioController.h /^ unsigned int card_rem_wake : 1; \/\/ 26$/;" m struct:__anon7 |
| ccmdinhbt sdioController.h /^ unsigned int ccmdinhbt : 1;$/;" m struct:__anon5 |
| ccrcerr sdioController.h /^ unsigned int ccrcerr : 1; \/\/17$/;" m struct:__anon11 |
| cddetlvl sdioController.h /^ unsigned int cddetlvl : 1;$/;" m struct:__anon5 |
| cdins sdioController.h /^ unsigned int cdins : 1; \/\/6$/;" m struct:__anon11 |
| cdinstd sdioController.h /^ unsigned int cdinstd : 1;$/;" m struct:__anon5 |
| cdint sdioController.h /^ unsigned int cdint : 1; \/\/8$/;" m struct:__anon11 |
| cdrem sdioController.h /^ unsigned int cdrem : 1; \/\/7$/;" m struct:__anon11 |
| cdstbl sdioController.h /^ unsigned int cdstbl : 1;$/;" m struct:__anon5 |
| ceata_card sdioController.h /^ unsigned int ceata_card : 1; \/\/ Bit 13$/;" m struct:__anon22 |
| cenderr sdioController.h /^ unsigned int cenderr : 1; \/\/18$/;" m struct:__anon11 |
| cfg_slot_type sdioController.h /^ unsigned int cfg_slot_type : 1;$/;" m struct:__anon14 |
| chk_cpl sdioController.h /^ unsigned int chk_cpl : 1; \/\/ Bit 15$/;" m struct:__anon22 |
| cidxerr sdioController.h /^ unsigned int cidxerr : 1; \/\/19$/;" m struct:__anon11 |
| clk_gate_ctl sdioController.h /^ unsigned int clk_gate_ctl : 1; \/\/ bit 8$/;" m struct:__anon20 |
| clk_gate_on sdioController.h /^ unsigned int clk_gate_on : 1; \/\/ bit 9$/;" m struct:__anon20 |
| clk_gen_sel sdioController.h /^ unsigned int clk_gen_sel : 1; \/\/ bit 5$/;" m struct:__anon9 |
| cmd_idx sdioController.h /^unsigned int cmd_idx : 6; \/\/ Cmd Index 24$/;" m struct:__anon3 |
| cmd_type sdioController.h /^unsigned int cmd_type : 2; \/\/ Cmd Type 22$/;" m struct:__anon3 |
| cmdcomp sdioController.h /^ unsigned int cmdcomp : 1; \/\/0$/;" m struct:__anon11 |
| cmdlvl sdioController.h /^ unsigned int cmdlvl : 1;$/;" m struct:__anon5 |
| cmdnisud sdioController.h /^ unsigned int cmdnisud : 1; \/\/ 7$/;" m struct:__anon13 |
| cmdswrst sdioController.h /^ unsigned int cmdswrst : 1; \/\/ bit 9 Software Reset for MM4CMD Line$/;" m struct:__anon9 |
| contreq sdioController.h /^ unsigned int contreq : 1; \/\/ 17$/;" m struct:__anon7 |
| copyFlag sdioDiag.c /^ unsigned char copyFlag;$/;" m struct:__anon29 file: |
| cpl_complete sdioController.h /^ unsigned int cpl_complete : 1; \/\/ Bit 6$/;" m struct:__anon22 |
| cpl_complete_en sdioController.h /^ unsigned int cpl_complete_en : 1; \/\/ Bit 5$/;" m struct:__anon22 |
| cpl_complete_int_en sdioController.h /^ unsigned int cpl_complete_int_en : 1; \/\/ Bit 4$/;" m struct:__anon22 |
| cpl_timeout sdioController.h /^ unsigned int cpl_timeout : 14; \/\/ Bits 0-13$/;" m struct:__anon22 |
| cpl_tout_err sdioController.h /^ unsigned int cpl_tout_err : 1; \/\/30$/;" m struct:__anon11 |
| crc_stat_err sdioController.h /^ unsigned int crc_stat_err : 1; \/\/31$/;" m struct:__anon11 |
| crcchken sdioController.h /^unsigned int crcchken : 1; \/\/ CRC check enable 19$/;" m struct:__anon3 |
| ctoerr sdioController.h /^ unsigned int ctoerr : 1; \/\/16$/;" m struct:__anon11 |
| dataBusWidth sdioDiag.c /^ unsigned char dataBusWidth;$/;" m struct:SDIO_SD file: |
| dataReadAccessTime1 sdioDiag.c /^ unsigned char dataReadAccessTime1;$/;" m struct:__anon29 file: |
| dataReadAccessTime2 sdioDiag.c /^ unsigned char dataReadAccessTime2;$/;" m struct:__anon29 file: |
| dataStatus sdioDiag.c /^ unsigned char dataStatus;$/;" m struct:SDIO_SCR file: |
| datactv sdioController.h /^ unsigned int datactv : 1;$/;" m struct:__anon5 |
| datawidth sdioController.h /^ unsigned int datawidth : 1; \/\/ 1$/;" m struct:__anon7 |
| datswrst sdioController.h /^ unsigned int datswrst : 1; \/\/ bit 10 Software Reset for MM4DATx Lines$/;" m struct:__anon9 |
| dbg_printf sdio_printf.c /^void dbg_printf(int logLevel,const char* szFormat, ...)$/;" f |
| dcmdinhbt sdioController.h /^ unsigned int dcmdinhbt : 1;$/;" m struct:__anon5 |
| dcrcerr sdioController.h /^ unsigned int dcrcerr : 1; \/\/21$/;" m struct:__anon11 |
| denderr sdioController.h /^ unsigned int denderr : 1; \/\/22$/;" m struct:__anon11 |
| deviceSize sdioDiag.c /^ unsigned short deviceSize;$/;" m struct:__anon29 file: |
| deviceSizeMultiplier sdioDiag.c /^ unsigned char deviceSizeMultiplier;$/;" m struct:__anon29 file: |
| diag_GICSetInt gicDiag.c /^void diag_GICSetInt(int cpuId, int intId, int enable)$/;" f |
| dma_bufsz sdioController.h /^ unsigned int dma_bufsz : 4; \/\/ Host DMA buffer size$/;" m struct:__anon2 |
| dma_en sdioController.h /^unsigned int dma_en : 1; \/\/ DMA enable 0$/;" m struct:__anon3 |
| dma_sel sdioController.h /^ unsigned int dma_sel : 2; \/\/ 3$/;" m struct:__anon7 |
| dmaint sdioController.h /^ unsigned int dmaint : 1; \/\/3$/;" m struct:__anon11 |
| do_emmcbootpart sdioDiag.c /^int do_emmcbootpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])$/;" f |
| do_emmcinit sdioDiag.c /^void do_emmcinit(void)$/;" f |
| do_emmcpart sdioDiag.c /^int do_emmcpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])$/;" f |
| do_emmcread sdioDiag.c /^int do_emmcread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])$/;" f |
| do_emmcwrite sdioDiag.c /^int do_emmcwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])$/;" f |
| do_u2emmc sdioDiag.c /^int do_u2emmc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])$/;" f |
| dpsel sdioController.h /^unsigned int dpsel : 1; \/\/ Data present select 21$/;" m struct:__anon3 |
| drv_strength_sel sdioController.h /^ unsigned int drv_strength_sel : 2; \/\/ 20 $/;" m struct:__anon13 |
| dtocntr sdioController.h /^ unsigned int dtocntr : 4; \/\/ bit 0 Data Timeout Counter Value$/;" m struct:__anon9 |
| dtoerr sdioController.h /^ unsigned int dtoerr : 1; \/\/20$/;" m struct:__anon11 |
| dxfrdir sdioController.h /^unsigned int dxfrdir : 1; \/\/ Data Transfer Direction Select 4$/;" m struct:__anon3 |
| emmc_inited sdioDiag.c /^int emmc_inited = 0 ; $/;" v |
| emmcbootpart_help sdioDiag.c /^static char emmcbootpart_help[] =\\$/;" v file: |
| emmcbootpart_usage sdioDiag.c /^static char emmcbootpart_usage[] =\\$/;" v file: |
| emmcpart_help sdioDiag.c /^static char emmcpart_help[] =\\$/;" v file: |
| emmcpart_usage sdioDiag.c /^static char emmcpart_usage[] =\\$/;" v file: |
| emmcread_help sdioDiag.c /^static char emmcread_help[] =\\$/;" v file: |
| emmcread_usage sdioDiag.c /^static char emmcread_usage[] =\\$/;" v file: |
| emmcwrite_help sdioDiag.c /^static char emmcwrite_help[] =\\$/;" v file: |
| emmcwrite_usage sdioDiag.c /^static char emmcwrite_usage[] =\\$/;" v file: |
| end sdioController.h /^ unsigned int end :1;$/;" m struct:sdio_adma_desc |
| eraseBlockEnable sdioDiag.c /^ unsigned char eraseBlockEnable; \/\/SD only$/;" m struct:__anon29 file: |
| eraseGroupSize sdioDiag.c /^ unsigned char eraseGroupSize; \/\/MMC: only$/;" m struct:__anon29 file: |
| eraseSectorSize sdioDiag.c /^ unsigned char eraseSectorSize; \/\/SD:7 bits, MMC: 5 bits$/;" m struct:__anon29 file: |
| errint sdioController.h /^ unsigned int errint : 1; \/\/15$/;" m struct:__anon11 |
| ex_data_width sdioController.h /^ unsigned int ex_data_width : 1; \/\/ 5$/;" m struct:__anon7 |
| ex_data_width_support sdioController.h /^ unsigned int ex_data_width_support : 1; $/;" m struct:__anon14 |
| exe_tuning sdioController.h /^ unsigned int exe_tuning : 1; \/\/ 22$/;" m struct:__anon13 |
| fifo_clock sdioController.h /^ unsigned int fifo_clock : 1; \/\/ Bit 4 $/;" m struct:__anon20 |
| fifo_cs sdioController.h /^ unsigned int fifo_cs : 1; \/\/ Bit 5$/;" m struct:__anon20 |
| fileFormat sdioDiag.c /^ unsigned char fileFormat;$/;" m struct:__anon29 file: |
| fileFormatGroup sdioDiag.c /^ unsigned char fileFormatGroup;$/;" m struct:__anon29 file: |
| force_clk_on sdioController.h /^ unsigned int force_clk_on : 1; \/\/ bit 12$/;" m struct:__anon20 |
| gen_pad_clk_cnt sdioController.h /^ unsigned int gen_pad_clk_cnt : 8; \/\/ Bits 24-31$/;" m struct:__anon18 |
| gen_pad_clk_on sdioController.h /^ unsigned int gen_pad_clk_on : 1; \/\/ Bit 6$/;" m struct:__anon18 |
| getMPid sdioDiag.c /^UNSG32 getMPid(void)$/;" f |
| hi_speed_support sdioController.h /^ unsigned int hi_speed_support : 1;$/;" m struct:__anon14 |
| hispeed sdioController.h /^ unsigned int hispeed : 1; \/\/ 2$/;" m struct:__anon7 |
| idxchken sdioController.h /^unsigned int idxchken : 1; \/\/ Command Index Check Enable 20$/;" m struct:__anon3 |
| ilmterr sdioController.h /^ unsigned int ilmterr : 1; \/\/23$/;" m struct:__anon11 |
| initMPGIC gicDiag.c /^void initMPGIC(void)$/;" f |
| int_a sdioController.h /^ unsigned int int_a : 1; \/\/9$/;" m struct:__anon11 |
| int_b sdioController.h /^ unsigned int int_b : 1; \/\/10$/;" m struct:__anon11 |
| int_c sdioController.h /^ unsigned int int_c : 1; \/\/11$/;" m struct:__anon11 |
| inter_clk_en sdioController.h /^ unsigned int inter_clk_en : 1; \/\/ Internal Clock Enable$/;" m struct:__anon9 |
| inter_clk_stable sdioController.h /^ unsigned int inter_clk_stable : 1; \/\/ Internal Clock Stable$/;" m struct:__anon9 |
| interrupt sdioController.h /^ unsigned int interrupt :1;$/;" m struct:sdio_adma_desc |
| ledcntl sdioController.h /^ unsigned int ledcntl : 1; \/\/ 0$/;" m struct:__anon7 |
| length sdioController.h /^ unsigned int length :16;$/;" m struct:sdio_adma_desc |
| lwrdatlvl sdioController.h /^ unsigned int lwrdatlvl : 4;$/;" m struct:__anon5 |
| manufactureDate sdioDiag.c /^ unsigned short manufactureDate; \/\/ SD: 12 bit code, MMC: 8 bit code.$/;" m struct:__anon28 file: |
| manufactureID sdioDiag.c /^ unsigned char manufactureID;$/;" m struct:__anon28 file: |
| manufatureReserved sdioDiag.c /^ unsigned long manufatureReserved;$/;" m struct:SDIO_SCR file: |
| maxDataTransferRate sdioDiag.c /^ unsigned char maxDataTransferRate;$/;" m struct:__anon29 file: |
| maxReadCurrent_VddMax sdioDiag.c /^ unsigned char maxReadCurrent_VddMax;$/;" m struct:__anon29 file: |
| maxWriteCurrent_VddMax sdioDiag.c /^ unsigned char maxWriteCurrent_VddMax;$/;" m struct:__anon29 file: |
| maxWriteCurrent_VddMin sdioDiag.c /^ unsigned char maxWriteCurrent_VddMin;$/;" m struct:__anon29 file: |
| max_blk_len sdioController.h /^ unsigned int max_blk_len : 2;$/;" m struct:__anon14 |
| maxreadCurrent_VddMin sdioDiag.c /^ unsigned char maxreadCurrent_VddMin;$/;" m struct:__anon29 file: |
| misc_int sdioController.h /^ unsigned int misc_int : 1; \/\/ Bit 2$/;" m struct:__anon22 |
| misc_int_en sdioController.h /^ unsigned int misc_int_en : 1; \/\/ Bit 1$/;" m struct:__anon22 |
| misc_int_int_en sdioController.h /^ unsigned int misc_int_int_en : 1; \/\/ Bit 0$/;" m struct:__anon22 |
| mm4_acmd12_er sdioController.h /^ VUINT32_T mm4_acmd12_er; \/\/ auto cmd12 error status 0x3C$/;" m struct:__anon1 |
| mm4_adma_err_stat sdioController.h /^ VUINT32_T mm4_adma_err_stat; \/\/ ADMA Error Status 0x54$/;" m struct:__anon1 |
| mm4_adma_system_address sdioController.h /^ VUINT32_T mm4_adma_system_address[2]; \/\/ ADMA Address 63:0 0x58$/;" m struct:__anon1 |
| mm4_arg sdioController.h /^ VUINT32_T mm4_arg; \/\/ Command argument 0x8$/;" m struct:__anon1 |
| mm4_blk_cntl sdioController.h /^ VUINT32_T mm4_blk_cntl; \/\/ Block size control register 0x4$/;" m struct:__anon1 |
| mm4_cap1_2 sdioController.h /^ VUINT32_T mm4_cap1_2; \/\/ capabilities 1,2 0x40$/;" m struct:__anon1 |
| mm4_cap1_2_bits sdioController.h /^ MM4_CAP1_2 mm4_cap1_2_bits;$/;" m union:__anon15 |
| mm4_cap1_2_value sdioController.h /^ UINT_T mm4_cap1_2_value;$/;" m union:__anon15 |
| mm4_cap3_4 sdioController.h /^ VUINT32_T mm4_cap3_4; \/\/ capabilities 3,4 0x44$/;" m struct:__anon1 |
| mm4_cmd_xfrmd sdioController.h /^ VUINT32_T mm4_cmd_xfrmd; \/\/ Command and transfer mode 0xC$/;" m struct:__anon1 |
| mm4_cmd_xfrmd_bits sdioController.h /^ MM4_CMD_XFRMD mm4_cmd_xfrmd_bits;$/;" m union:__anon4 |
| mm4_cmd_xfrmd_value sdioController.h /^ unsigned int mm4_cmd_xfrmd_value;$/;" m union:__anon4 |
| mm4_cntl1 sdioController.h /^ VUINT32_T mm4_cntl1; \/\/ host control 1 0x28$/;" m struct:__anon1 |
| mm4_cntl1_bits sdioController.h /^ MM4_CNTL1 mm4_cntl1_bits;$/;" m union:__anon8 |
| mm4_cntl1_value sdioController.h /^ unsigned int mm4_cntl1_value;$/;" m union:__anon8 |
| mm4_cntl2 sdioController.h /^ VUINT32_T mm4_cntl2; \/\/ host control 2 0x2C$/;" m struct:__anon1 |
| mm4_cntl2_bits sdioController.h /^ MM4_CNTL2 mm4_cntl2_bits;$/;" m union:__anon10 |
| mm4_cntl2_value sdioController.h /^ unsigned int mm4_cntl2_value;$/;" m union:__anon10 |
| mm4_dp sdioController.h /^ VUINT32_T mm4_dp; \/\/ buffer data port 0x20$/;" m struct:__anon1 |
| mm4_force_event sdioController.h /^ VUINT32_T mm4_force_event; \/\/ force event for AutoCMD12 Error Status 0x50$/;" m struct:__anon1 |
| mm4_i_sig_en sdioController.h /^ VUINT32_T mm4_i_sig_en; \/\/ interrupt signal enable 0x38$/;" m struct:__anon1 |
| mm4_i_stat sdioController.h /^ VUINT32_T mm4_i_stat; \/\/ status of current command 0x30$/;" m struct:__anon1 |
| mm4_i_stat_bits sdioController.h /^ MM4_I_STAT mm4_i_stat_bits;$/;" m union:__anon12 |
| mm4_i_stat_en sdioController.h /^ VUINT32_T mm4_i_stat_en; \/\/ interrupt status enable 0x34$/;" m struct:__anon1 |
| mm4_i_stat_value sdioController.h /^ unsigned int mm4_i_stat_value;$/;" m union:__anon12 |
| mm4_preset_value_for_hs_sdr104_50 sdioController.h /^ VUINT32_T mm4_preset_value_for_hs_sdr104_50; \/\/ 0x6C $/;" m struct:__anon1 |
| mm4_preset_value_for_hs_sdr12 sdioController.h /^ VUINT32_T mm4_preset_value_for_hs_sdr12; \/\/ 0x64 $/;" m struct:__anon1 |
| mm4_preset_value_for_hs_sdr25_50 sdioController.h /^ VUINT32_T mm4_preset_value_for_hs_sdr25_50; \/\/ 0x68 $/;" m struct:__anon1 |
| mm4_preset_value_for_init_ds sdioController.h /^ VUINT32_T mm4_preset_value_for_init_ds; \/\/ 0x60$/;" m struct:__anon1 |
| mm4_resp0 sdioController.h /^ VUINT32_T mm4_resp0; \/\/ cmd response 0 0x10$/;" m struct:__anon1 |
| mm4_resp1 sdioController.h /^ VUINT32_T mm4_resp1; \/\/ cmd response 1 0x14$/;" m struct:__anon1 |
| mm4_resp2 sdioController.h /^ VUINT32_T mm4_resp2; \/\/ cmd response 2 0x18$/;" m struct:__anon1 |
| mm4_resp3 sdioController.h /^ VUINT32_T mm4_resp3; \/\/ cmd response 3 0x1C$/;" m struct:__anon1 |
| mm4_rx_cfg sdioController.h /^ VUINT32_T mm4_rx_cfg ; \/\/ RX_CFG_REG 0x114$/;" m struct:__anon1 |
| mm4_sd_ce_ata_1_2 sdioController.h /^ VUINT32_T mm4_sd_ce_ata_1_2; \/\/ SD_CE_ATA_1 and SD_CE_ATA_2 0x10C$/;" m struct:__anon1 |
| mm4_sd_cfg_fifo_param sdioController.h /^ VUINT32_T mm4_sd_cfg_fifo_param; \/\/ SD Extra Parameters register 0x100$/;" m struct:__anon1 |
| mm4_sd_fifo_param sdioController.h /^ VUINT32_T mm4_sd_fifo_param; \/\/ SD_FIFO_PARAM register 0x104$/;" m struct:__anon1 |
| mm4_sd_max_current1_2 sdioController.h /^ VUINT32_T mm4_sd_max_current1_2; \/\/ max current capabilities 0x48$/;" m struct:__anon1 |
| mm4_sd_max_current1_2_bits sdioController.h /^ MM4_SD_MAX_CURRENT1_2 mm4_sd_max_current1_2_bits;$/;" m union:__anon17 |
| mm4_sd_max_current1_2_value sdioController.h /^ UINT_T mm4_sd_max_current1_2_value;$/;" m union:__anon17 |
| mm4_sd_max_current3_4 sdioController.h /^ VUINT32_T mm4_sd_max_current3_4; \/\/ max current capabilities 0x4C$/;" m struct:__anon1 |
| mm4_sd_pad_io_setup sdioController.h /^ VUINT32_T mm4_sd_pad_io_setup; \/\/ MM4_SD_PAD_IO_SETUP 0x110 $/;" m struct:__anon1 |
| mm4_sd_slot_int_stat_ctrl_ver sdioController.h /^ VUINT32_T mm4_sd_slot_int_stat_ctrl_ver; \/\/ SD Interrupt Line and Version Support 0xFC$/;" m struct:__anon1 |
| mm4_sd_spi_mode_clk_brst_size sdioController.h /^ VUINT32_T mm4_sd_spi_mode_clk_brst_size; \/\/ SD_SIP_MODE register 0x108$/;" m struct:__anon1 |
| mm4_shared_bus_control sdioController.h /^ VUINT32_T mm4_shared_bus_control; \/\/ Shared Bus Control Register 0xE0$/;" m struct:__anon1 |
| mm4_state sdioController.h /^ VUINT32_T mm4_state; \/\/ mm4 state 0x24$/;" m struct:__anon1 |
| mm4_state_bits sdioController.h /^ MM4_STATE mm4_state_bits;$/;" m union:__anon6 |
| mm4_state_value sdioController.h /^ unsigned int mm4_state_value;$/;" m union:__anon6 |
| mm4_sysaddr sdioController.h /^ VUINT32_T mm4_sysaddr; \/\/ DMA system address 0x0$/;" m struct:__anon1 |
| mm4_tx_cfg sdioController.h /^ VUINT32_T mm4_tx_cfg ; \/\/ TX_CFG_REG 0x118$/;" m struct:__anon1 |
| mm4clken sdioController.h /^ unsigned int mm4clken : 1; \/\/ Clock Enable$/;" m struct:__anon9 |
| mmc_card sdioController.h /^ unsigned int mmc_card : 1; \/\/ Bit 12$/;" m struct:__anon22 |
| mmc_resetn sdioController.h /^ unsigned int mmc_resetn : 1; \/\/ Bit 11$/;" m struct:__anon22 |
| ms_blksel sdioController.h /^unsigned int ms_blksel : 1; \/\/ Multi Block Select 5$/;" m struct:__anon3 |
| mswrst sdioController.h /^ unsigned int mswrst : 1; \/\/ bit 8 Software Reset for All$/;" m struct:__anon9 |
| name sdioDiag.c /^ char name[7]; \/\/ SD: 5 byte string, MMC: 6 byte string$/;" m struct:__anon28 file: |
| ovrrd_clk_oen sdioController.h /^ unsigned int ovrrd_clk_oen : 1; \/\/ bit 11$/;" m struct:__anon20 |
| pBuffer sdmmc_api.h /^ UINT_T pBuffer[4]; \/\/ Buffer to read values in to$/;" m struct:__anon46 |
| pContext sdmmc_api.h /^ P_MM4_SDMMC_CONTEXT_T *pContext; \/\/ Pointer to MMC control registers$/;" m struct:__anon48 |
| pMMC4Reg sdioController.h /^ P_MM4_SDMMC_T pMMC4Reg; \/\/ MMC1 register base$/;" m struct:__anon27 |
| partialReadFlag sdioDiag.c /^ unsigned char partialReadFlag;$/;" m struct:__anon29 file: |
| partialWriteFlag sdioDiag.c /^ unsigned char partialWriteFlag;$/;" m struct:__anon29 file: |
| performanceMove sdioDiag.c /^ unsigned char performanceMove;$/;" m struct:SDIO_SD file: |
| power_down sdioController.h /^ unsigned int power_down : 1; \/\/ Bit 6$/;" m struct:__anon20 |
| pre_val_en sdioController.h /^ unsigned int pre_val_en : 1; \/\/ 31 $/;" m struct:__anon13 |
| rdactv sdioController.h /^ unsigned int rdactv : 1;$/;" m struct:__anon5 |
| rdwcntl sdioController.h /^ unsigned int rdwcntl : 1; \/\/ 18$/;" m struct:__anon7 |
| readBlockLength sdioDiag.c /^ unsigned char readBlockLength;$/;" m struct:__anon29 file: |
| readBlockMisalign sdioDiag.c /^ unsigned char readBlockMisalign;$/;" m struct:__anon29 file: |
| res_type sdioController.h /^unsigned int res_type : 2; \/\/ Response Type 16$/;" m struct:__anon3 |
| reserved sdioDiag.c /^ unsigned short reserved;$/;" m struct:SDIO_SCR file: |
| reserved0 sdioController.h /^ unsigned int reserved0 : 2; \/\/ 5$/;" m struct:__anon13 |
| reserved0 sdioController.h /^ unsigned int reserved0 : 2; \/\/13$/;" m struct:__anon11 |
| reserved0 sdioController.h /^ unsigned int reserved0 : 4;$/;" m struct:__anon5 |
| reserved0 sdioController.h /^ unsigned int reserved0 : 1;$/;" m struct:__anon14 |
| reserved0 sdioController.h /^ unsigned int reserved0 : 2; \/\/ Bit 14,15$/;" m struct:__anon22 |
| reserved0 sdioController.h /^ unsigned int reserved0 : 3; \/\/ Bits 0-2$/;" m struct:__anon18 |
| reserved0 sdioController.h /^ unsigned int reserved0 : 8;$/;" m struct:__anon16 |
| reserved1 sdioController.h /^ unsigned int reserved1 : 2; \/\/ bits 3,4$/;" m struct:__anon9 |
| reserved1 sdioController.h /^ unsigned int reserved1 : 8; \/\/ 8$/;" m struct:__anon13 |
| reserved1 sdioController.h /^ unsigned int reserved1 : 1; \/\/27$/;" m struct:__anon11 |
| reserved1 sdioController.h /^ unsigned int reserved1 : 4;$/;" m struct:__anon5 |
| reserved1 sdioController.h /^ unsigned int reserved1 : 1; \/\/ Bit 3$/;" m struct:__anon22 |
| reserved1 sdioController.h /^ unsigned int reserved1 : 7; \/\/ bit 15:9 $/;" m struct:__anon24 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 4; \/\/$/;" m struct:__anon9 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 6; \/\/ 24$/;" m struct:__anon13 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 4; \/\/ 12$/;" m struct:__anon7 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 7;$/;" m struct:__anon5 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 17; \/\/ Bits 7-23$/;" m struct:__anon18 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 19; \/\/ Bits 13:31$/;" m struct:__anon20 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 1;$/;" m struct:__anon14 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 7; \/\/ bit 31:25$/;" m struct:__anon24 |
| reserved2 sdioController.h /^ unsigned int reserved2 : 4; \/\/ Bit 7$/;" m struct:__anon22 |
| reserved2 sdioController.h /^unsigned int reserved2 : 10; \/\/ 6$/;" m struct:__anon3 |
| reserved3 sdioController.h /^ unsigned int reserved3 : 5; \/\/ bits 11-15$/;" m struct:__anon9 |
| reserved3 sdioController.h /^ unsigned int reserved3 : 4; $/;" m struct:__anon7 |
| reserved3 sdioController.h /^unsigned int reserved3 : 1; \/\/ 18$/;" m struct:__anon3 |
| reserved4 sdioController.h /^ unsigned int reserved4 : 5;$/;" m struct:__anon7 |
| reserved4 sdioController.h /^unsigned int reserved4 : 2; \/\/ 30$/;" m struct:__anon3 |
| reserved_X1 sdioController.h /^ VUINT32_T reserved_X1[28]; \/\/ reserved fields 0x70$/;" m struct:__anon1 |
| reserved_X2 sdioController.h /^ VUINT32_T reserved_X2[6]; \/\/ reserved 0xE4$/;" m struct:__anon1 |
| reserver0 sdioController.h /^ unsigned int reserver0 : 1; \/\/ Bit 7$/;" m struct:__anon20 |
| reserver1 sdioController.h /^ unsigned int reserver1 : 1; \/\/ bit 10$/;" m struct:__anon20 |
| resvered sdioController.h /^ unsigned int resvered :10;$/;" m struct:sdio_adma_desc |
| retuning_req sdioController.h /^ unsigned int retuning_req : 1;$/;" m struct:__anon5 |
| retuninig_int sdioController.h /^ unsigned int retuninig_int : 1; \/\/12$/;" m struct:__anon11 |
| revision sdioDiag.c /^ unsigned char revision;$/;" m struct:__anon28 file: |
| rtc sdioController.h /^ unsigned int rtc : 2; \/\/ Bits 1:0$/;" m struct:__anon20 |
| sampling_clk_sel sdioController.h /^ unsigned int sampling_clk_sel : 1; \/\/ 23$/;" m struct:__anon13 |
| sdCardType sdioDiag.c /^ unsigned short sdCardType;$/;" m struct:SDIO_SD file: |
| sd_freq_sel_hi sdioController.h /^ unsigned int sd_freq_sel_hi : 2; \/\/ 6 $/;" m struct:__anon9 |
| sd_freq_sel_lo sdioController.h /^ unsigned int sd_freq_sel_lo : 8; \/\/ 8 $/;" m struct:__anon9 |
| sdio_adma_desc sdioController.h /^typedef struct sdio_adma_desc$/;" s |
| sdma_support sdioController.h /^ unsigned int sdma_support : 1;$/;" m struct:__anon14 |
| securedMode sdioDiag.c /^ unsigned char securedMode;$/;" m struct:SDIO_SD file: |
| security sdioDiag.c /^ unsigned char security;$/;" m struct:SDIO_SCR file: |
| serialNumber sdioDiag.c /^ unsigned long serialNumber;$/;" m struct:__anon28 file: |
| sgh_v18_en sdioController.h /^ unsigned int sgh_v18_en : 1; \/\/ 19$/;" m struct:__anon13 |
| sizeProtectedArea sdioDiag.c /^ unsigned int sizeProtectedArea;$/;" m struct:SDIO_SD file: |
| snd_cpl sdioController.h /^ unsigned int snd_cpl : 1; \/\/ Bit 14$/;" m struct:__anon22 |
| specVersion sdioDiag.c /^ unsigned char specVersion;$/;" m struct:SDIO_SCR file: |
| specificationVersion sdioDiag.c /^ unsigned char specificationVersion; $/;" m struct:__anon29 file: |
| speedClass sdioDiag.c /^ unsigned char speedClass;$/;" m struct:SDIO_SD file: |
| spierr sdioController.h /^ unsigned int spierr : 1; \/\/28$/;" m struct:__anon11 |
| squ_empty_check sdioController.h /^ unsigned int squ_empty_check : 1; \/\/ Bit 4 $/;" m struct:__anon18 |
| squ_full_check sdioController.h /^ unsigned int squ_full_check : 1; \/\/ Bit 5$/;" m struct:__anon18 |
| stCmd52Arg sdmmc_api.h /^ SDIO_CMD52_Arg_T stCmd52Arg;$/;" m union:SDIO_CMD52_Arg_Union |
| structure sdioDiag.c /^ unsigned char structure; \/\/ [127:126] for eMMC and SD$/;" m struct:__anon29 file: |
| structure sdioDiag.c /^ unsigned char structure;$/;" m struct:SDIO_SCR file: |
| sus_res_support sdioController.h /^ unsigned int sus_res_support : 1;$/;" m struct:__anon14 |
| sys_bus_64_support sdioController.h /^ unsigned int sys_bus_64_support : 1;$/;" m struct:__anon14 |
| toclkfreq sdioController.h /^ unsigned int toclkfreq : 6;$/;" m struct:__anon14 |
| toclkunit sdioController.h /^ unsigned int toclkunit : 1;$/;" m struct:__anon14 |
| tune_err sdioController.h /^ unsigned int tune_err : 1; \/\/26$/;" m struct:__anon11 |
| tx_hold_delay0 sdioController.h /^ unsigned int tx_hold_delay0 : 9; \/\/ bit 8:0$/;" m struct:__anon24 |
| tx_hold_delay1 sdioController.h /^ unsigned int tx_hold_delay1 : 9; \/\/ bit 24:16$/;" m struct:__anon24 |
| u2emmc_help sdioDiag.c /^static char u2emmc_help[] =\\$/;" v file: |
| u2emmc_usage sdioDiag.c /^static char u2emmc_usage[] =\\$/;" v file: |
| uchCardReadyAfterInit sdmmc_api.h /^ UINT8_T uchCardReadyAfterInit:1;$/;" m struct:SDIO_Properties_s |
| uchFuncNum sdmmc_api.h /^ UINT_T uchFuncNum:3;$/;" m struct:SDIO_CMD52_Arg_s |
| uchMemPresent sdmmc_api.h /^ UINT8_T uchMemPresent:1;$/;" m struct:SDIO_Properties_s |
| uchNoOfIoFunc sdmmc_api.h /^ UINT8_T uchNoOfIoFunc:3;$/;" m struct:SDIO_Properties_s |
| uchRawFlag sdmmc_api.h /^ UINT_T uchRawFlag:1;$/;" m struct:SDIO_CMD52_Arg_s |
| uchRwFlag sdmmc_api.h /^ UINT_T uchRwFlag:1;$/;" m struct:SDIO_CMD52_Arg_s |
| uchStuffBit sdmmc_api.h /^ UINT_T uchStuffBit:1;$/;" m struct:SDIO_CMD52_Arg_s |
| uchStuffBit1 sdmmc_api.h /^ UINT_T uchStuffBit1:1;$/;" m struct:SDIO_CMD52_Arg_s |
| uchStuffBits sdmmc_api.h /^ UINT8_T uchStuffBits:3;$/;" m struct:SDIO_Properties_s |
| uchWriteData sdmmc_api.h /^ UINT_T uchWriteData:8;$/;" m struct:SDIO_CMD52_Arg_s |
| uhs_mode_sel sdioController.h /^ unsigned int uhs_mode_sel : 3; \/\/ 16 $/;" m struct:__anon13 |
| uiCmd52Arg sdmmc_api.h /^ UINT32_T uiCmd52Arg;$/;" m union:SDIO_CMD52_Arg_Union |
| uiRegAddr sdmmc_api.h /^ UINT_T uiRegAddr:17;$/;" m struct:SDIO_CMD52_Arg_s |
| v1_8vmaxi sdioController.h /^ unsigned int v1_8vmaxi : 8;$/;" m struct:__anon16 |
| v3_0vmaxi sdioController.h /^ unsigned int v3_0vmaxi : 8;$/;" m struct:__anon16 |
| v3_3vmaxi sdioController.h /^ unsigned int v3_3vmaxi : 8;$/;" m struct:__anon16 |
| valid sdioController.h /^ unsigned int valid :1;$/;" m struct:sdio_adma_desc |
| vlg_18_support sdioController.h /^ unsigned int vlg_18_support : 1;$/;" m struct:__anon14 |
| vlg_30_support sdioController.h /^ unsigned int vlg_30_support : 1;$/;" m struct:__anon14 |
| vlg_33_support sdioController.h /^ unsigned int vlg_33_support : 1;$/;" m struct:__anon14 |
| vltgsel sdioController.h /^ unsigned int vltgsel : 3; \/\/ 9$/;" m struct:__anon7 |
| wpswlvl sdioController.h /^ unsigned int wpswlvl : 1;$/;" m struct:__anon5 |
| wractv sdioController.h /^ unsigned int wractv : 1;$/;" m struct:__anon5 |
| writeBlockLength sdioDiag.c /^ unsigned char writeBlockLength;$/;" m struct:__anon29 file: |
| writeBlockMisalign sdioDiag.c /^ unsigned char writeBlockMisalign;$/;" m struct:__anon29 file: |
| writeSpeedFactor sdioDiag.c /^ unsigned char writeSpeedFactor;$/;" m struct:__anon29 file: |
| wtc sdioController.h /^ unsigned int wtc : 2; \/\/ Bit 3:2$/;" m struct:__anon20 |
| xfr_blksz sdioController.h /^ unsigned int xfr_blksz : 12; \/\/ Transfer Block Size$/;" m struct:__anon2 |
| xfrcomp sdioController.h /^ unsigned int xfrcomp : 1; \/\/1$/;" m struct:__anon11 |
| zero sdioController.h /^ unsigned int zero :1;$/;" m struct:sdio_adma_desc |
