| /* |
| * Copyright (C) 2018 Synaptics Incorporated. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| * |
| * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND |
| * SYNAPTICS EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, |
| * INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| * A PARTICULAR PURPOSE, AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY |
| * INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT SHALL SYNAPTICS BE LIABLE |
| * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, OR |
| * CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH THE USE |
| * OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED AND |
| * BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS |
| * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF |
| * COMPETENT JURISDICTION DOES NOT PERMIT THE DISCLAIMER OF DIRECT |
| * DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS' TOTAL CUMULATIVE LIABILITY |
| * TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S. DOLLARS. |
| */ |
| #ifndef _MEM_CONFIG_ |
| #define _MEM_CONFIG_ |
| |
| /* |
| * memory map |
| * memory map is flat |
| * address 0xE000_0000 - 0xFFFF_FFFF is mapped to I/O |
| * |
| * (1) Cache & buffer |
| * 0x0000_0000 - 0xE000_0000 Memory space |
| * 0x0000_0000 - 0x0080_0000 Cacheable, bufferable memory |
| * 0x0E0_0000 - 0x0FD0_0000 Cacheable, bufferable memory |
| * Others Un-Cacheable memory |
| * 0xE000_0000 - 0xFFFF_FFFF Device space |
| * |
| * (2) functionality |
| * 0x0000_0000 - 0x0080_0000 User memory for test, Cache-able |
| * 0x0080_0000 - 0x0300_0000 User memory |
| * 0x0160_0000 - 0x0170_0000 Memory benchmark (random NCNB read) |
| * (0x0170_0000 - 0x0300_0000 MA/MI area) |
| * 0x0170_0000 - 0x0190_0000 |
| * 0x0190_0000 - 0x01B0_0000 |
| * 0x01B0_0000 - 0x0200_0000 |
| * 0x0200_0000 - 0x0220_0000 |
| * 0x0220_0000 - 0x0240_0000 |
| * 0x0260_0000 - 0x0268_0000 I2S src |
| * 0x0268_0000 - 0x0270_0000 I2S dst |
| * 0x0270_0000 - 0x0280_0000 SATA src |
| * 0x0280_0000 - 0x0290_0000 SATA dst |
| * 0x0290_0000 - 0x02A0_0000 |
| * 0x02A0_0000 - 0x02B0_0000 |
| * 0x02B0_0000 - 0x02B8_0000 |
| * 0x02B8_0000 - 0x02C0_0000 |
| * 0x02C0_0000 - 0x02E0_0000 |
| * 0x02E0_0000 - 0x0300_0000 |
| * 0x0300_0000 - 0x0308_0000 USB src |
| * 0x0308_0000 - 0x0310_0000 USB dst |
| * 0x0310_0000 - 0x0320_0000 RESERVED |
| * 0x0320_0000 - 0x0340_0000 |
| * 0x0340_0000 - 0x0340_4000 |
| * 0x0340_4000 - 0x0360_0000 |
| * 0x0360_0000 - 0x0360_4000 |
| * 0x0360_4000 - 0x0380_0000 |
| * |
| * |
| |
| * 0x0680_0000 - 0x0D00_0000 GFX3D |
| * |
| * 0x0D00_0000 - 0x0E00_0000 |
| * |
| * 32MB for MMU/STACK/CODE/DATA, cache-able |
| * 0x0E00_0000 - 0x0E90_0000 MMU |
| * 0x0E90_0000 - 0x0EF0_0000 reserved |
| * 0x0EF0_0000 - 0x0F00_0000 stacks |
| * 0x0F00_0000 - 0x0F90_0000 code |
| * 0x0F90_0000 - 0x0FD0_0000 data |
| */ |
| |
| /* |
| 0x00000000- 0x00800000 cacheable region for test, kept as not defined. |
| 0x00800000- 0x0E000000 uncacheable. |
| 0x00800000- 0x01000000 for memory test, kept as not defined. |
| 0x01000000- 0x03000000 for modules test, kept as not defined. Free to be used for any standalone test. |
| 0x03000000- 0x0E000000 for modules big buffer. Need define. Any module need the fixed buffer, define it here. |
| 0x0E000000- 0x10000000 Diag MMU/CODE/DATA/STACK. |
| 0x10000000- 0x20000000 HEAP |
| 0x20000000- 0x30000000 NNA(buffer pool?) if NNA not use buffer pool, define buffer pool with 16MB/32MB region. |
| 0x30000000- 0x40000000 Free for test. |
| */ |
| |
| |
| #define CB_BASE_ (0x0) |
| #define CB_SIZE_ (0x00800000) |
| |
| #define LOADER_REGION_BASE (0x0D000000) // Region for Diag MMU/STACK/CODE/DATA/BSS, Cacheble |
| #define LOADER_REGION_SIZE (0x01000000) |
| |
| #define DIAG_REGION_BASE (0x0E000000) // Region for Diag MMU/STACK/CODE/DATA/BSS, Cacheble |
| #define DIAG_REGION_SIZE (0x02000000) |
| #define TTB_BASE MMU_TABLE_BASE |
| #define MMU_TABLE_BASE DIAG_REGION_BASE // MMU table |
| #define MMU_TABLE_SIZE (0x00811000) // |
| #define STACK_BOTTOM (0x0EF00000) |
| #define STACK_SIZE_TOTAL (0x00100000) |
| #define ROM_BASE (0x0F000000) |
| #define ROM_SIZE (0x00900000) |
| #define GLB_BASE (0x0F900000) //all the global variables including RW and ZI |
| #define GLB_SIZE (0x00400000) |
| // modules\sw_dec_h264\app\swdech264.lds, image size is about 400KB. |
| #define AARCH32_TESTBIN_FOR_AARCH64 (0x0FD00000) |
| //#define UNCACHED_HEAP_BASE (0x0FE00000) // leave it un-used |
| //#define UNCACHED_HEAP_SIZE (0x00200000) |
| |
| #define HEAP_BASE (0x10000000) |
| #define HEAP_SIZE (0x08000000) // 128MB |
| |
| // for big nna bw test case |
| #define BUFFER_POOL_BASE (0x18100000) |
| #define BUFFER_POOL_SIZE (0x10000000) // 256MB |
| |
| //#define BUFFER_POOL_BLOCK_SIZE (0x10000) // 64KB |
| //#define BUFFER_POOL_BLOCK_SIZE (512) // 0.5KB |
| #define BUFFER_POOL_BLOCK_SIZE (4096) |
| |
| |
| // Total stack size for each core |
| #define STACK_SIZE (0x10000) |
| #define STACKS_SIZE_PER_CORE (4*STACK_SIZE) |
| |
| // for aarch32 |
| #define SVC_STACK_0 (STACK_BOTTOM + STACKS_SIZE_PER_CORE) // 0x0EF40000 |
| #define FIQ_STACK_0 (SVC_STACK_0-STACK_SIZE) // 0x0EF30000 |
| #define IRQ_STACK_0 (FIQ_STACK_0-STACK_SIZE) // 0x0EF20000 |
| #define OTHERS_STACK (IRQ_STACK_0-STACK_SIZE) // 0x0EF10000 |
| // for aarch64 |
| #define EL1_STACK_0 (STACK_BOTTOM + STACKS_SIZE_PER_CORE) // 0x0EF40000 |
| #define EL3_STACK_0 (EL1_STACK_0-STACK_SIZE) // 0x0EF30000 |
| |
| |
| |
| #endif |
