| /* |
| * Copyright Marvell Semiconductor, Inc. 2006. All rights reserved. |
| * |
| * Register address mapping configure file for rom testing code. |
| */ |
| |
| #ifndef __CEC__H__ |
| #define __CEC__H__ |
| |
| #define BA_oneReg_0x00000000 0x0000 |
| #define B16oneReg_0x00000000 0x0000 |
| #define LSb32oneReg_0x00000000 0 |
| #define LSb16oneReg_0x00000000 0 |
| #define boneReg_0x00000000 32 |
| #define MSK32oneReg_0x00000000 0xFFFFFFFF |
| #define RA_Cec_REG_dummy 0x0000 |
| #define RA_Cec_cfgReg 0x0000 |
| #define RA_Cec_regIfCtrl 0x0400 |
| #define BA_Cec_regIfCtrl_mwrWidth 0x0400 |
| #define B16Cec_regIfCtrl_mwrWidth 0x0400 |
| #define LSb32Cec_regIfCtrl_mwrWidth 0 |
| #define LSb16Cec_regIfCtrl_mwrWidth 0 |
| #define bCec_regIfCtrl_mwrWidth 8 |
| #define MSK32Cec_regIfCtrl_mwrWidth 0x000000FF |
| #define BA_Cec_regIfCtrl_hold 0x0401 |
| #define B16Cec_regIfCtrl_hold 0x0400 |
| #define LSb32Cec_regIfCtrl_hold 8 |
| #define LSb16Cec_regIfCtrl_hold 8 |
| #define bCec_regIfCtrl_hold 8 |
| #define MSK32Cec_regIfCtrl_hold 0x0000FF00 |
| #define RA_Cec_CHIP_RESET_TRACKER 0x0404 |
| #define BA_Cec_CHIP_RESET_TRACKER_VALUE 0x0404 |
| #define B16Cec_CHIP_RESET_TRACKER_VALUE 0x0404 |
| #define LSb32Cec_CHIP_RESET_TRACKER_VALUE 0 |
| #define LSb16Cec_CHIP_RESET_TRACKER_VALUE 0 |
| #define bCec_CHIP_RESET_TRACKER_VALUE 32 |
| #define MSK32Cec_CHIP_RESET_TRACKER_VALUE 0xFFFFFFFF |
| |
| #endif |
