| /* |
| * Copyright Marvell Semiconductor, Inc. 2006. All rights reserved. |
| * |
| * Register address mapping configure file for rom testing code. |
| */ |
| |
| #ifndef __sm_memmap_H__ |
| #define __sm_memmap_H__ |
| |
| #define SM_MEMMAP_SM_ITCM_REG_BASE 0x0 |
| #define SM_MEMMAP_SM_ITCM_REG_SIZE 0x20000 |
| #define SM_MEMMAP_SM_ITCM_REG_DEC_BIT 0x11 |
| #define SM_MEMMAP_SM_DTCM_REG_BASE 0x20000 |
| #define SM_MEMMAP_SM_DTCM_REG_SIZE 0x20000 |
| #define SM_MEMMAP_SM_DTCM_REG_DEC_BIT 0x11 |
| #define SM_MEMMAP_SM_APB_REG_BASE 0x40000 |
| #define SM_MEMMAP_SM_APB_REG_SIZE 0x10000 |
| #define SM_MEMMAP_SM_APB_REG_DEC_BIT 0x10 |
| #define SM_MEMMAP_SM_SECM_REG_BASE 0x50000 |
| #define SM_MEMMAP_SM_SECM_REG_SIZE 0x10000 |
| #define SM_MEMMAP_SM_SECM_REG_DEC_BIT 0x10 |
| #define SM_MEMMAP_SM_WOL_BASE 0x60000 |
| #define SM_MEMMAP_SM_WOL_SIZE 0x1000 |
| #define SM_MEMMAP_SM_WOL_DEC_BIT 0xC |
| #define SM_MEMMAP_SM_CEC_REG_BASE 0x61000 |
| #define SM_MEMMAP_SM_CEC_REG_SIZE 0x1000 |
| #define SM_MEMMAP_SM_CEC_REG_DEC_BIT 0xC |
| #define SM_MEMMAP_SM_BIU_REG_BASE 0x62000 |
| #define SM_MEMMAP_SM_BIU_REG_SIZE 0x1000 |
| #define SM_MEMMAP_SM_BIU_REG_DEC_BIT 0xC |
| |
| #endif |
| |
