| #ifndef __PINMUX_SETTING_H__ |
| #define __PINMUX_SETTING_H__ |
| |
| #include "board_config.h" |
| #include "pinmux.h" |
| |
| typedef struct { |
| unsigned int index; |
| unsigned int value; |
| }pinmux_table_t; |
| |
| pinmux_table_t pinmux_table[] = { |
| {I2S1_BCLKIO, 1}, |
| {I2S1_LRCKIO, 1}, |
| {I2S1_DO0, 1}, |
| {I2S1_DO1, 3}, |
| {I2S1_DO2, 3}, |
| {I2S1_DO3, 0}, |
| {I2S1_MCLK, 1}, |
| //{I2S2_BCLKIO, }, |
| //{I2S2_LRCKIO, }, |
| {I2S2_DI0, 1}, |
| {I2S2_DI1, 1}, |
| {I2S2_DI2, 0}, |
| {I2S2_DI3, 1}, |
| {I2S3_DI, 1}, |
| {I2S3_DO, 1}, |
| {I2S3_BCLKIO, 1}, |
| {I2S3_LRCKIO, 1}, |
| {PDM_CLKO, 1}, |
| {PDM_DI0, 1}, |
| {PDM_DI1, 1}, |
| //{PDM_DI2, }, // N/A in pinmux table |
| {PDM_DI3, 0}, |
| {NAND_IO0, 1}, |
| {NAND_IO1, 1}, |
| {NAND_IO2, 1}, |
| {NAND_IO3, 1}, |
| {NAND_IO4, 1}, |
| {NAND_IO5, 1}, |
| {NAND_IO6, 1}, |
| {NAND_IO7, 1}, |
| {NAND_ALE, 3}, |
| {NAND_CLE, 3}, |
| {NAND_WEn, 3}, |
| {NAND_REn, 3}, |
| {NAND_WPn, 1}, |
| {NAND_CEn, 1}, |
| {NAND_RDY, 1}, |
| //{SPI1_SS0n, }, // N/A in pinmux table |
| //{SPI1_SS1n, }, // N/A in pinmux table |
| {SPI1_SS2n, 0}, |
| {SPI1_SS3n, 0}, |
| //{SPI1_SCLK, }, // N/A in pinmux table |
| //{SPI1_SDO, }, // N/A in pinmux table |
| //{SPI1_SDI, }, // N/A in pinmux table |
| {TW1_SCL, 1}, |
| {TW1_SDA, 1}, |
| {TW0_SCL, 1}, |
| {TW0_SDA, 1}, |
| {TMS, 0}, |
| {TDI, 0}, |
| {TDO, 0}, |
| {PWM0, 2}, |
| //{PWM1, }, // N/A in pinmux table |
| //{PWM2, }, // N/A in pinmux table |
| //{PWM3, }, // N/A in pinmux table |
| //{PWM4, }, // N/A in pinmux table |
| //{PWM5, }, // N/A in pinmux table |
| //{PWM6, }, // N/A in pinmux table |
| {PWM7, 0}, |
| {URT1_RTSn, 0}, |
| {URT1_CTSn, 0}, |
| {URT1_RXD, 0}, |
| {URT1_TXD, 0}, |
| {SD0_DAT0, 1}, |
| {SD0_DAT1, 1}, |
| {SD0_DAT2, 1}, |
| {SD0_DAT3, 1}, |
| {SD0_CLK, 0}, // Set with GPIO because it is used for FORCE USB BOOT. Kernel will set it SD0_CLK. |
| {SD0_CMD, 1}, |
| {SD0_CDn, 0}, |
| {SD0_WP, 0}, |
| //{USB0_DRV_VBUS,}, // N/A in pinmux table |
| }; |
| |
| #endif |
