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| <h4 class="subsection">9.1.5 Opcodes</h4> |
| |
| <p><a name="index-AArch64-opcodes-543"></a><a name="index-opcodes-for-AArch64-544"></a><code>as</code> implements all the standard AArch64 opcodes. It also |
| implements several pseudo opcodes, including several synthetic load |
| instructions. |
| |
| |
| <a name="index-g_t_0040code_007bLDR-reg_002c_003d_003cexpr_003e_007d-pseudo-op_002c-AArch64-545"></a> |
| <dl><dt><code>LDR =</code><dd> |
| <pre class="smallexample"> ldr <register> , =<expression> |
| </pre> |
| <p>The constant expression will be placed into the nearest literal pool (if it not |
| already there) and a PC-relative LDR instruction will be generated. |
| |
| </dl> |
| |
| <p>For more information on the AArch64 instruction set and assembly language |
| notation, see ‘<samp><span class="samp">ARMv8 Instruction Set Overview</span></samp>’ available at |
| <a href="http://infocenter.arm.com">http://infocenter.arm.com</a>. |
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