| /* |
| * arch/arm/boot/dts/amlogic/mesontl1.dtsi |
| * |
| * Copyright (C) 2018 Amlogic, Inc. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, but WITHOUT |
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| * more details. |
| * |
| */ |
| |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/gpio/meson-tm2-gpio.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/meson_rc.h> |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/pwm/pwm.h> |
| #include <dt-bindings/pwm/meson.h> |
| #include <dt-bindings/clock/amlogic,tl1-clkc.h> |
| #include <dt-bindings/clock/amlogic,tm2-audio-clk.h> |
| #include <dt-bindings/phy/phy-amlogic-pcie.h> |
| #include "mesong12a-bifrost.dtsi" |
| #include <dt-bindings/iio/adc/amlogic-saradc.h> |
| / { |
| interrupt-parent = <&gic>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus:cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| #cooling-cells = <2>;/* min followed by max */ |
| CPU0:cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0x0>; |
| //timer=<&timer_a>; |
| enable-method = "psci"; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_FCLK_P>, |
| <&clkc CLKID_SYS_PLL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent"; |
| operating-points-v2 = <&cpu_opp_table0>; |
| cpu-supply = <&vddcpu0>; |
| //cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| voltage-tolerance = <0>; |
| clock-latency = <50000>; |
| }; |
| |
| CPU1:cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0x1>; |
| //timer=<&timer_b>; |
| enable-method = "psci"; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_FCLK_P>, |
| <&clkc CLKID_SYS_PLL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent"; |
| operating-points-v2 = <&cpu_opp_table0>; |
| cpu-supply = <&vddcpu0>; |
| //cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| voltage-tolerance = <0>; |
| clock-latency = <50000>; |
| }; |
| |
| CPU2:cpu@2 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0x2>; |
| //timer=<&timer_c>; |
| enable-method = "psci"; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_FCLK_P>, |
| <&clkc CLKID_SYS_PLL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent"; |
| operating-points-v2 = <&cpu_opp_table0>; |
| cpu-supply = <&vddcpu0>; |
| //cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| voltage-tolerance = <0>; |
| clock-latency = <50000>; |
| }; |
| |
| CPU3:cpu@3 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0x3>; |
| //timer=<&timer_d>; |
| enable-method = "psci"; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_FCLK_P>, |
| <&clkc CLKID_SYS_PLL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent"; |
| operating-points-v2 = <&cpu_opp_table0>; |
| cpu-supply = <&vddcpu0>; |
| //cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| voltage-tolerance = <0>; |
| clock-latency = <50000>; |
| }; |
| }; |
| |
| timer { |
| compatible = "arm,armv7-timer"; |
| interrupts = <GIC_PPI 13 0xff01>, |
| <GIC_PPI 14 0xff01>, |
| <GIC_PPI 11 0xff01>, |
| <GIC_PPI 10 0xff01>; |
| }; |
| |
| timer_bc { |
| compatible = "arm, meson-bc-timer"; |
| reg = <0xffd0f190 0x4 0xffd0f194 0x4>; |
| timer_name = "Meson TimerF"; |
| clockevent-rating =<300>; |
| clockevent-shift =<20>; |
| clockevent-features =<0x23>; |
| interrupts = <0 60 1>; |
| bit_enable =<16>; |
| bit_mode =<12>; |
| bit_resolution =<0>; |
| }; |
| |
| arm_pmu { |
| compatible = "arm,cortex-a15-pmu"; |
| /* clusterb-enabled; */ |
| interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0xff634680 0x4>; |
| cpumasks = <0xf>; |
| /* default 10ms */ |
| relax-timer-ns = <10000000>; |
| /* default 10000us */ |
| max-wait-cnt = <10000>; |
| }; |
| |
| gic: interrupt-controller@2c001000 { |
| compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; |
| #interrupt-cells = <3>; |
| #address-cells = <0>; |
| interrupt-controller; |
| reg = <0xffc01000 0x1000>, |
| <0xffc02000 0x0100>; |
| interrupts = <GIC_PPI 9 0xf04>; |
| }; |
| |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| secmon { |
| compatible = "amlogic, secmon"; |
| memory-region = <&secmon_reserved>; |
| in_base_func = <0x82000020>; |
| out_base_func = <0x82000021>; |
| reserve_mem_size = <0x00300000>; |
| }; |
| |
| securitykey { |
| compatible = "amlogic, securitykey"; |
| status = "okay"; |
| storage_query = <0x82000060>; |
| storage_read = <0x82000061>; |
| storage_write = <0x82000062>; |
| storage_tell = <0x82000063>; |
| storage_verify = <0x82000064>; |
| storage_status = <0x82000065>; |
| storage_list = <0x82000067>; |
| storage_remove = <0x82000068>; |
| storage_in_func = <0x82000023>; |
| storage_out_func = <0x82000024>; |
| storage_block_func = <0x82000025>; |
| storage_size_func = <0x82000027>; |
| storage_set_enctype = <0x8200006A>; |
| storage_get_enctype = <0x8200006B>; |
| storage_version = <0x8200006C>; |
| }; |
| |
| mailbox: mhu@ff63c400 { |
| status = "okay"; |
| compatible = "amlogic, meson_mhu"; |
| reg = <0xff63c400 0x4c>, /* MHU registers */ |
| <0xfffdf000 0x800>; /* Payload area */ |
| interrupts = <0 209 1>, /* low priority interrupt */ |
| <0 210 1>; /* high priority interrupt */ |
| #mbox-cells = <1>; |
| mbox-names = "cpu_to_scp_low", "cpu_to_scp_high"; |
| mboxes = <&mailbox 0 &mailbox 1>; |
| }; |
| |
| mailbox_dsp: mhu@ff680150 { |
| status = "okay"; |
| compatible = "amlogic, meson_mhu_dsp"; |
| reg = <0xff680150 0x84>, /* MHU registers */ |
| <0xff690150 0x84>, |
| <0xfffdbc00 0x800>; /* Payload area */ |
| interrupts = <0 242 1>, /* DSPA Receive */ |
| <0 244 1>, /* DSPA Send */ |
| <0 246 1>, /* DSPB Receive */ |
| <0 248 1>; /* DSPB Send */ |
| mbox-names = "dspa_to_ap", |
| "ap_to_dspa", |
| "dspb_to_ap", |
| "ap_to_dspb"; |
| #mbox-cells = <1>; |
| mboxes = <&mailbox_dsp 0>, |
| <&mailbox_dsp 1>, |
| <&mailbox_dsp 2>, |
| <&mailbox_dsp 3>; |
| mbox-nums = <4>; |
| }; |
| |
| cpu_iomap { |
| compatible = "amlogic, iomap"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| io_cbus_base { |
| reg = <0xffd00000 0x101000>; |
| }; |
| io_apb_base { |
| reg = <0xffe01000 0x19f000>; |
| }; |
| io_aobus_base { |
| reg = <0xff800000 0x100000>; |
| }; |
| io_vapb_base { |
| reg = <0xff900000 0x200000>; |
| }; |
| io_hiu_base { |
| reg = <0xff63c000 0x2000>; |
| }; |
| }; |
| |
| xtal: xtal-clk { |
| compatible = "fixed-clock"; |
| clock-frequency = <24000000>; |
| clock-output-names = "xtal"; |
| #clock-cells = <0>; |
| }; |
| |
| aml_pm { |
| compatible = "amlogic, pm"; |
| status = "okay"; |
| device_name = "aml_pm"; |
| debug_reg = <0xff8000a8>; |
| exit_reg = <0xff80023c>; |
| }; |
| |
| cpuinfo { |
| compatible = "amlogic, cpuinfo"; |
| status = "okay"; |
| cpuinfo_cmd = <0x82000044>; |
| }; |
| |
| rtc{ |
| compatible = "amlogic, aml_vrtc"; |
| alarm_reg_addr = <0xff8000a8>; |
| timer_e_addr = <0xffd0f188>; |
| init_date = "2019/01/01"; |
| status = "okay"; |
| }; |
| |
| reboot { |
| compatible = "amlogic,reboot"; |
| sys_reset = <0x84000009>; |
| sys_poweroff = <0x84000008>; |
| }; |
| |
| ram-dump { |
| compatible = "amlogic, ram_dump"; |
| status = "okay"; |
| reg = <0xFF6345E0 4>; |
| reg-names = "PREG_STICKY_REG8"; |
| store_device = "data"; |
| }; |
| |
| vpu { |
| compatible = "amlogic, vpu-tm2"; |
| status = "okay"; |
| clocks = <&clkc CLKID_VAPB_MUX>, |
| <&clkc CLKID_VPU_INTR>, |
| <&clkc CLKID_VPU_P0_COMP>, |
| <&clkc CLKID_VPU_P1_COMP>, |
| <&clkc CLKID_VPU_MUX>; |
| clock-names = "vapb_clk", |
| "vpu_intr_gate", |
| "vpu_clk0", |
| "vpu_clk1", |
| "vpu_clk"; |
| clk_level = <7>; |
| /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */ |
| /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */ |
| }; |
| |
| meson_uvm{ |
| compatible = "amlogic, meson_uvm"; |
| status = "okay"; |
| }; |
| |
| meson_videotunnel{ |
| compatible = "amlogic, meson_videotunnel"; |
| status = "okay"; |
| }; |
| |
| ethmac: ethernet@ff3f0000 { |
| compatible = "amlogic, g12a-eth-dwmac","snps,dwmac"; |
| reg = <0xff3f0000 0x10000 |
| 0xff634540 0x8 |
| 0xff64c000 0xa0 |
| 0xffd01008 0x4>; |
| reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset"; |
| interrupts = <0 8 1>; |
| interrupt-names = "macirq"; |
| status = "disabled"; |
| clocks = <&clkc CLKID_ETH_CORE>; |
| clock-names = "ethclk81"; |
| pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>; |
| analog_val = <0x20200000 0x0000c000 0x00000023>; |
| }; |
| |
| pinctrl_aobus: pinctrl@ff800014 { |
| compatible = "amlogic,meson-tm2-aobus-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| gpio_ao: ao-bank@ff800014 { |
| reg = <0xff800014 0x8>, |
| <0xff800024 0x14>, |
| <0xff80001c 0x8>; |
| reg-names = "mux", "gpio", "drive-strength"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| aoceca_mux:aoceca_mux { |
| mux { |
| groups = "cec_ao_a"; |
| function = "cec_ao"; |
| }; |
| }; |
| |
| aocecb_mux:aocecb_mux { |
| mux { |
| groups = "cec_ao_b"; |
| function = "cec_ao"; |
| }; |
| }; |
| }; |
| |
| pinctrl_testn: pinctrl@ff80035c { |
| compatible = "amlogic,meson-tm2-testn-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| testn: testn@ff80035c { |
| reg = <0xff80035c 0x1>; |
| reg-names = "mux"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| pinctrl_periphs: pinctrl@ff6346c0 { |
| compatible = "amlogic,meson-tm2-periphs-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| gpio: banks@ff6346c0 { |
| reg = <0xff6346c0 0x40>, |
| <0xff6344e8 0x18>, |
| <0xff634520 0x18>, |
| <0xff634440 0x4c>, |
| <0xff634740 0x1c>; |
| reg-names = "mux", |
| "pull", |
| "pull-enable", |
| "gpio", |
| "drive-strength"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| |
| hdmirx_a_mux:hdmirx_a_mux { |
| mux { |
| groups = "hdmirx_a_hpd", "hdmirx_a_det", |
| "hdmirx_a_sda", "hdmirx_a_sck"; |
| function = "hdmirx_a"; |
| }; |
| }; |
| |
| hdmirx_b_mux:hdmirx_b_mux { |
| mux { |
| groups = "hdmirx_b_hpd", "hdmirx_b_det", |
| "hdmirx_b_sda", "hdmirx_b_sck"; |
| function = "hdmirx_b"; |
| }; |
| }; |
| |
| hdmirx_c_mux:hdmirx_c_mux { |
| mux { |
| groups = "hdmirx_c_hpd", "hdmirx_c_det", |
| "hdmirx_c_sda", "hdmirx_c_sck"; |
| function = "hdmirx_c"; |
| }; |
| }; |
| |
| }; |
| |
| dwc3: dwc3@ff500000 { |
| compatible = "synopsys, dwc3"; |
| status = "disabled"; |
| reg = <0xff500000 0x100000>; |
| interrupts = <0 30 4>; |
| usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>; |
| cpu-type = "gxl"; |
| clock-src = "usb3.0"; |
| clocks = <&clkc CLKID_USB_GENERAL>; |
| clock-names = "dwc_general"; |
| snps,quirk-frame-length-adjustment = <0x20>; |
| }; |
| |
| usb2_phy_v2: usb2phy@ffe09000 { |
| compatible = "amlogic, amlogic-new-usb2-v2"; |
| status = "disabled"; |
| reg = <0xffe09000 0x80 |
| 0xffd01008 0x100 |
| 0xff636000 0x2000 |
| 0xff63a000 0x2000 |
| 0xff658000 0x2000>; |
| pll-setting-1 = <0x09400414>; |
| pll-setting-2 = <0x927E0000>; |
| pll-setting-3 = <0xac5f69e5>; |
| pll-setting-4 = <0xfe18>; |
| pll-setting-5 = <0x8000fff>; |
| pll-setting-6 = <0x78000>; |
| pll-setting-7 = <0xe0004>; |
| pll-setting-8 = <0xe000c>; |
| version = <2>; |
| pwr-ctl = <1>; |
| u2-ctrl-sleep-shift = <17>; |
| u2-hhi-mem-pd-shift = <30>; |
| u2-hhi-mem-pd-mask = <0x3>; |
| u2-ctrl-iso-shift = <17>; |
| }; |
| |
| usb3_phy_v2: usb3phy@ffe09080 { |
| compatible = "amlogic, amlogic-new-usb3-v3"; |
| status = "disable"; |
| reg = <0xffe09080 0x20>; |
| phy0-reg = <0xff646000>; |
| phy0-reg-size = <0x2000>; |
| phy1-reg = <0xff65c000>; |
| phy1-reg-size = <0x2000>; |
| reset-reg = <0xffd01008>; |
| reset-reg-size = <0x100>; |
| clocks = <&clkc CLKID_PCIE0_GATE |
| &clkc CLKID_PCIE_PLL |
| &clkc CLKID_PCIE1_GATE>; |
| clock-names = "pcie0_gate", |
| "pcie_refpll", |
| "pcie1_gate"; |
| pwr-ctl = <1>; |
| u30-ctrl-sleep-shift = <18>; |
| u30-hhi-mem-pd-shift = <26>; |
| u30-hhi-mem-pd-mask = <0xf>; |
| u30-ctrl-iso-shift = <18>; |
| usb30-ctrl-a-rst-bit = <12>; |
| u31-ctrl-sleep-shift = <20>; |
| u31-hhi-mem-pd-shift = <4>; |
| u31-hhi-mem-pd-mask = <0xf>; |
| u31-ctrl-iso-shift = <20>; |
| usb31-ctrl-a-rst-bit = <28>; |
| }; |
| |
| usb_otg: usbotg@ffe09080 { |
| compatible = "amlogic, amlogic-new-otg"; |
| status = "disabled"; |
| usb2-phy-reg = <0xffe09000>; |
| usb2-phy-reg-size = <0x100>; |
| interrupts = <0 16 4>; |
| }; |
| |
| |
| dwc2_a: dwc2_a@ff400000 { |
| compatible = "amlogic, dwc2"; |
| status = "disabled"; |
| device_name = "dwc2_a"; |
| reg = <0xff400000 0x40000>; |
| interrupts = <0 31 4>; |
| pl-periph-id = <0>; /** lm name */ |
| clock-src = "usb0"; /** clock src */ |
| port-id = <0>; /** ref to mach/usb.h */ |
| port-type = <2>; /** 0: otg, 1: host, 2: slave */ |
| port-speed = <0>; /** 0: default, high, 1: full */ |
| port-config = <0>; /** 0: default */ |
| /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/ |
| port-dma = <0>; |
| port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/ |
| usb-fifo = <728>; |
| cpu-type = "v2"; |
| phy-reg = <0xffe09000>; |
| phy-reg-size = <0xa0>; |
| /** phy-interface: 0x0: amlogic-v1 phy, 0x1: synopsys phy **/ |
| /** 0x2: amlogic-v2 phy **/ |
| phy-interface = <0x2>; |
| phy-otg = <0x1>; |
| clocks = <&clkc CLKID_USB_GENERAL |
| &clkc CLKID_USB1_TO_DDR>; |
| clock-names = "usb_general", |
| "usb1"; |
| }; |
| |
| dolby_fw: dolby_fw { |
| compatible = "amlogic, dolby_fw"; |
| mem_size = <0x100000>; |
| status = "okay"; |
| }; |
| |
| wdt: watchdog@0xffd0f0d0 { |
| compatible = "amlogic, meson-wdt"; |
| status = "disabled"; |
| default_timeout=<10>; |
| reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */ |
| reset_watchdog_time=<2>; |
| shutdown_timeout=<10>; |
| firmware_timeout=<6>; |
| suspend_timeout=<6>; |
| reg = <0xffd0f0d0 0x10>; |
| clock-names = "xtal"; |
| clocks = <&xtal>; |
| }; |
| |
| jtag { |
| compatible = "amlogic, jtag"; |
| status = "okay"; |
| select = "disable"; /* disable/apao/swd_apao */ |
| pinctrl-names="jtag_apao_pins", "jtag_swd_apao_pins"; |
| pinctrl-0=<&jtag_apao_pins>; |
| pinctrl-1=<&jtag_swd_apao_pins>; |
| }; |
| |
| saradc:saradc { |
| compatible = "amlogic,meson-g12a-saradc"; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>; |
| clock-names = "xtal", "saradc_clk"; |
| interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>; |
| reg = <0xff809000 0x48>; |
| }; |
| |
| vddcpu0: pwmao_d-regulator { |
| compatible = "pwm-regulator"; |
| pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>; |
| regulator-name = "vddcpu0"; |
| regulator-min-microvolt = <690000>; |
| regulator-max-microvolt = <1050000>; |
| regulator-always-on; |
| max-duty-cycle = <1500>; |
| /* Voltage Duty-Cycle */ |
| voltage-table = <1050000 0>, |
| <1040000 3>, |
| <1030000 6>, |
| <1020000 8>, |
| <1010000 11>, |
| <1000000 14>, |
| <990000 17>, |
| <980000 20>, |
| <970000 23>, |
| <960000 26>, |
| <950000 29>, |
| <940000 31>, |
| <930000 34>, |
| <920000 37>, |
| <910000 40>, |
| <900000 43>, |
| <890000 45>, |
| <880000 48>, |
| <870000 51>, |
| <860000 54>, |
| <850000 56>, |
| <840000 59>, |
| <830000 62>, |
| <820000 65>, |
| <810000 68>, |
| <800000 70>, |
| <790000 73>, |
| <780000 76>, |
| <770000 79>, |
| <760000 81>, |
| <750000 84>, |
| <740000 87>, |
| <730000 89>, |
| <720000 92>, |
| <710000 95>, |
| <700000 98>, |
| <690000 100>; |
| status = "okay"; |
| }; |
| |
| aml_dma { |
| compatible = "amlogic,aml_txlx_dma"; |
| reg = <0xff63e000 0x48>; |
| interrupts = <0 180 1>; |
| |
| aml_aes { |
| compatible = "amlogic,aes_g12a_dma"; |
| dev_name = "aml_aes_dma"; |
| status = "okay"; |
| }; |
| |
| aml_sha { |
| compatible = "amlogic,sha_dma"; |
| dev_name = "aml_sha_dma"; |
| status = "okay"; |
| }; |
| }; |
| |
| rng { |
| compatible = "amlogic,meson-rng"; |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0xff630218 0x4>; |
| quality = /bits/ 16 <1000>; |
| }; |
| |
| power_ctrl: power_ctrl@ff8000e8 { |
| compatible = "amlogic, sm1-powerctrl"; |
| reg = <0xff8000e8 0x10>, |
| <0xff63c100 0x10>; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| hiubus: hiubus@ff63c000 { |
| compatible = "simple-bus"; |
| reg = <0xff63c000 0x2000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0xff63c000 0x2000>; |
| |
| clkc: clock-controller@0 { |
| compatible = "amlogic,tl1-clkc"; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| reg = <0x0 0x3fc>; |
| }; |
| |
| clkc1: clock-controller@1 { |
| compatible = "amlogic,tm2-clkc"; |
| #clock-cells = <1>; |
| }; |
| };/* end of hiubus*/ |
| |
| audiobus: audiobus@0xff600000 { |
| compatible = "amlogic, audio-controller", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0xff600000 0x3000>; |
| ranges = <0x0 0xff600000 0x3000>; |
| |
| clkaudio:audio_clocks { |
| compatible = "amlogic, tm2-audio-clocks"; |
| #clock-cells = <1>; |
| reg = <0x0 0xb0>; |
| }; |
| |
| ddr_manager { |
| compatible = "amlogic, tl1-audio-ddr-manager"; |
| interrupts = < |
| GIC_SPI 148 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 149 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 150 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 48 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 152 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 153 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 154 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 49 IRQ_TYPE_EDGE_RISING |
| >; |
| interrupt-names = |
| "toddr_a", "toddr_b", "toddr_c", |
| "toddr_d", |
| "frddr_a", "frddr_b", "frddr_c", |
| "frddr_d"; |
| }; |
| };/* end of audiobus*/ |
| |
| audio_earc: bus@ff603000 { |
| compatible = "simple-bus"; |
| reg = <0xff603000 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0xff603000 0x1000>; |
| |
| earc: earc@0 { |
| compatible = "amlogic, tm2-snd-earc"; |
| #sound-dai-cells = <0>; |
| |
| status = "disabled"; |
| |
| reg = <0x0 0x400>, |
| <0x400 0x200>, |
| <0x600 0x200>, |
| <0x800 0x400>, |
| <0xc00 0x200>, |
| <0xe00 0x200>; |
| reg-names = "tx_cmdc", |
| "tx_dmac", |
| "tx_top", |
| "rx_cmdc", |
| "rx_dmac", |
| "rx_top"; |
| |
| clocks = < &clkaudio CLKID_EARCRX_CMDC |
| &clkaudio CLKID_EARCRX_DMAC |
| &clkc CLKID_FCLK_DIV4 |
| &clkc CLKID_FCLK_DIV4 |
| &clkaudio CLKID_EARCTX_CMDC |
| &clkaudio CLKID_EARCTX_DMAC |
| &clkc CLKID_FCLK_DIV4 |
| &clkc CLKID_MPLL1 |
| >; |
| clock-names = |
| "rx_cmdc", |
| "rx_dmac", |
| "rx_cmdc_srcpll", |
| "rx_dmac_srcpll", |
| "tx_cmdc", |
| "tx_dmac", |
| "tx_cmdc_srcpll", |
| "tx_dmac_srcpll"; |
| |
| interrupts = < |
| GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH |
| GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "earc_rx", "earc_tx"; |
| }; |
| }; |
| |
| /* Sound iomap */ |
| aml_snd_iomap { |
| compatible = "amlogic, snd-iomap"; |
| status = "okay"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| ranges; |
| pdm_bus { |
| reg = <0xFF601000 0x400>; |
| }; |
| audiobus_base { |
| reg = <0xFF600000 0x1000>; |
| }; |
| audiolocker_base { |
| reg = <0xFF601400 0x400>; |
| }; |
| eqdrc_base { |
| reg = <0xFF602000 0x1000>; |
| }; |
| reset_base { |
| reg = <0xFFD01000 0x1000>; |
| }; |
| vad_base { |
| reg = <0xFF601800 0x400>; |
| }; |
| resampleA_base { |
| reg = <0xFF601C00 0x104>; |
| }; |
| resampleB_base { |
| reg = <0xFF604000 0x104>; |
| }; |
| }; |
| |
| cbus: cbus@ffd00000 { |
| compatible = "simple-bus"; |
| reg = <0xffd00000 0x27000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0xffd00000 0x27000>; |
| |
| clk-measure@18004 { |
| compatible = "amlogic,tm2-measure"; |
| reg = <0x18004 0x4 0x1800c 0x4>; |
| }; |
| |
| i2c0: i2c@1f000 { |
| compatible = "amlogic,meson-i2c"; |
| status = "disabled"; |
| reg = <0x1f000 0x20>; |
| interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c1: i2c@1e000 { |
| compatible = "amlogic,meson-i2c"; |
| status = "disabled"; |
| reg = <0x1e000 0x20>; |
| interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c2: i2c@1d000 { |
| compatible = "amlogic,meson-i2c"; |
| status = "disabled"; |
| reg = <0x1d000 0x20>; |
| interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c3: i2c@1c000 { |
| compatible = "amlogic,meson-i2c"; |
| status = "disabled"; |
| reg = <0x1c000 0x20>; |
| interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-frequency = <100000>; |
| }; |
| |
| gpio_intc: interrupt-controller@f080 { |
| compatible = "amlogic,meson-gpio-intc", |
| "amlogic,meson-tm2-gpio-intc"; |
| reg = <0xf080 0x10>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| amlogic,channel-interrupts = |
| <64 65 66 67 68 69 70 71>; |
| status = "okay"; |
| }; |
| |
| pwm_ab: pwm@1b000 { |
| compatible = "amlogic,tl1-ee-pwm"; |
| reg = <0x1b000 0x20>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| /* default xtal 24m clkin0-clkin2 and |
| * clkin1-clkin3 should be set the same |
| */ |
| status = "disabled"; |
| }; |
| |
| pwm_cd: pwm@1a000 { |
| compatible = "amlogic,tl1-ee-pwm"; |
| reg = <0x1a000 0x20>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| pwm_ef: pwm@19000 { |
| compatible = "amlogic,tl1-ee-pwm"; |
| reg = <0x19000 0x20>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| spicc0: spi@13000 { |
| compatible = "amlogic,meson-tl1-spicc", |
| "amlogic,meson-g12a-spicc"; |
| reg = <0x13000 0x44>; |
| interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clkc CLKID_SPICC0>, |
| <&clkc CLKID_SPICC0_COMP>; |
| clock-names = "core", "comp"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| spicc1: spi@15000 { |
| compatible = "amlogic,meson-tl1-spicc", |
| "amlogic,meson-g12a-spicc"; |
| reg = <0x15000 0x44>; |
| interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clkc CLKID_SPICC1>, |
| <&clkc CLKID_SPICC1_COMP>; |
| clock-names = "core", "comp"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| }; |
| |
| aobus: aobus@ff800000 { |
| compatible = "simple-bus"; |
| reg = <0xff800000 0xb000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0xff800000 0xb000>; |
| |
| cpu_version { |
| reg = <0x220 0x4>; |
| }; |
| |
| aoclkc: clock-controller@0 { |
| compatible = "amlogic,tl1-aoclkc"; |
| #clock-cells = <1>; |
| reg = <0x0 0x1000>; |
| }; |
| |
| pwm_AO_ab: pwm@7000 { |
| compatible = "amlogic,tl1-ao-pwm"; |
| reg = <0x7000 0x20>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| pwm_AO_cd: pwm@2000 { |
| compatible = "amlogic,tl1-ao-pwm"; |
| reg = <0x2000 0x20>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| uart_AO: serial@3000 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x3000 0x18>; |
| interrupts = <0 193 1>; |
| status = "okay"; |
| clocks = <&xtal>; |
| clock-names = "clk_uart"; |
| xtal_tick_en = <2>; |
| fifosize = < 64 >; |
| //pinctrl-names = "default"; |
| //pinctrl-0 = <&ao_a_uart_pins>; |
| /* 0 not support; 1 support */ |
| support-sysrq = <0>; |
| }; |
| |
| uart_AO_B: serial@4000 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x4000 0x18>; |
| interrupts = <0 197 1>; |
| status = "disabled"; |
| clocks = <&xtal>; |
| clock-names = "clk_uart"; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ao_b_uart_pins1>; |
| }; |
| |
| remote: rc@8040 { |
| compatible = "amlogic, aml_remote"; |
| reg = <0x8040 0x44>, |
| <0x8000 0x20>; |
| status = "okay"; |
| protocol = <REMOTE_TYPE_NEC>; |
| interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&remote_pins>; |
| map = <&custom_maps>; |
| max_frame_time = <200>; |
| }; |
| |
| irblaster: meson-irblaster@14c { |
| compatible = "amlogic, meson_irblaster"; |
| reg = <0x14c 0x10>, |
| <0x40 0x4>; |
| #irblaster-cells = <2>; |
| interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| }; |
| |
| i2c_AO: i2c@5000 { |
| compatible = "amlogic,meson-i2c"; |
| status = "disabled"; |
| reg = <0x05000 0x20>; |
| interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c_AO_slave:i2c_slave@6000 { |
| compatible = "amlogic, meson-i2c-slave"; |
| status = "disabled"; |
| reg = <0x6000 0x20>; |
| interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c_ao_slave_pins>; |
| }; |
| };/* end of aobus */ |
| |
| ion_dev { |
| compatible = "amlogic, ion_dev"; |
| status = "okay"; |
| memory-region = <&ion_cma_reserved>; |
| };/* end of ion_dev*/ |
| }; /* end of soc*/ |
| |
| custom_maps: custom_maps { |
| mapnum = <4>; |
| map0 = <&map_0>; |
| map1 = <&map_1>; |
| map2 = <&map_2>; |
| map3 = <&map_3>; |
| map_0: map_0{ |
| mapname = "amlogic-remote-1"; |
| customcode = <0xfb04>; |
| release_delay = <80>; |
| size = <44>; /*keymap size*/ |
| keymap = <REMOTE_KEY(0x01, KEY_1) |
| REMOTE_KEY(0x02, KEY_2) |
| REMOTE_KEY(0x03, KEY_3) |
| REMOTE_KEY(0x04, KEY_4) |
| REMOTE_KEY(0x05, KEY_5) |
| REMOTE_KEY(0x06, KEY_6) |
| REMOTE_KEY(0x07, KEY_7) |
| REMOTE_KEY(0x08, KEY_8) |
| REMOTE_KEY(0x09, KEY_9) |
| REMOTE_KEY(0x0a, KEY_0) |
| REMOTE_KEY(0x1F, KEY_FN_F1) |
| REMOTE_KEY(0x15, KEY_MENU) |
| REMOTE_KEY(0x16, KEY_TAB) |
| REMOTE_KEY(0x0c, KEY_CHANNELUP) |
| REMOTE_KEY(0x0d, KEY_CHANNELDOWN) |
| REMOTE_KEY(0x0e, KEY_VOLUMEUP) |
| REMOTE_KEY(0x0f, KEY_VOLUMEDOWN) |
| REMOTE_KEY(0x11, KEY_HOME) |
| REMOTE_KEY(0x1c, KEY_RIGHT) |
| REMOTE_KEY(0x1b, KEY_LEFT) |
| REMOTE_KEY(0x19, KEY_UP) |
| REMOTE_KEY(0x1a, KEY_DOWN) |
| REMOTE_KEY(0x1d, KEY_ENTER) |
| REMOTE_KEY(0x17, KEY_MUTE) |
| REMOTE_KEY(0x49, KEY_FINANCE) |
| REMOTE_KEY(0x43, KEY_BACK) |
| REMOTE_KEY(0x12, KEY_FN_F4) |
| REMOTE_KEY(0x14, KEY_FN_F5) |
| REMOTE_KEY(0x18, KEY_FN_F6) |
| REMOTE_KEY(0x59, KEY_INFO) |
| REMOTE_KEY(0x5a, KEY_STOPCD) |
| REMOTE_KEY(0x10, KEY_POWER) |
| REMOTE_KEY(0x42, KEY_PREVIOUSSONG) |
| REMOTE_KEY(0x44, KEY_NEXTSONG) |
| REMOTE_KEY(0x1e, KEY_REWIND) |
| REMOTE_KEY(0x4b, KEY_FASTFORWARD) |
| REMOTE_KEY(0x58, KEY_PLAYPAUSE) |
| REMOTE_KEY(0x46, KEY_PROPS) |
| REMOTE_KEY(0x40, KEY_UNDO) |
| REMOTE_KEY(0x38, KEY_SCROLLLOCK) |
| REMOTE_KEY(0x57, KEY_FN) |
| REMOTE_KEY(0x5b, KEY_FN_ESC) |
| REMOTE_KEY(0x13, 195) |
| REMOTE_KEY(0x54, KEY_RED) |
| REMOTE_KEY(0x4c, KEY_GREEN) |
| REMOTE_KEY(0x4e, KEY_YELLOW) |
| REMOTE_KEY(0x55, KEY_BLUE) |
| REMOTE_KEY(0x53, KEY_BLUETOOTH) |
| REMOTE_KEY(0x52, KEY_WLAN) |
| REMOTE_KEY(0x39, KEY_CAMERA) |
| REMOTE_KEY(0x41, KEY_SOUND) |
| REMOTE_KEY(0x0b, KEY_QUESTION) |
| REMOTE_KEY(0x00, KEY_CHAT) |
| REMOTE_KEY(0x13, KEY_SEARCH)>; |
| }; |
| |
| map_1: map_1{ |
| mapname = "amlogic-remote-2"; |
| customcode = <0xfe01>; |
| release_delay = <80>; |
| size = <53>; |
| keymap = <REMOTE_KEY(0x01, KEY_1) |
| REMOTE_KEY(0x02, KEY_2) |
| REMOTE_KEY(0x03, KEY_3) |
| REMOTE_KEY(0x04, KEY_4) |
| REMOTE_KEY(0x05, KEY_5) |
| REMOTE_KEY(0x06, KEY_6) |
| REMOTE_KEY(0x07, KEY_7) |
| REMOTE_KEY(0x08, KEY_8) |
| REMOTE_KEY(0x09, KEY_9) |
| REMOTE_KEY(0x0a, KEY_0) |
| REMOTE_KEY(0x1F, KEY_FN_F1) |
| REMOTE_KEY(0x15, KEY_MENU) |
| REMOTE_KEY(0x16, KEY_TAB) |
| REMOTE_KEY(0x0c, KEY_CHANNELUP) |
| REMOTE_KEY(0x0d, KEY_CHANNELDOWN) |
| REMOTE_KEY(0x0e, KEY_VOLUMEUP) |
| REMOTE_KEY(0x0f, KEY_VOLUMEDOWN) |
| REMOTE_KEY(0x11, KEY_HOME) |
| REMOTE_KEY(0x1c, KEY_RIGHT) |
| REMOTE_KEY(0x1b, KEY_LEFT) |
| REMOTE_KEY(0x19, KEY_UP) |
| REMOTE_KEY(0x1a, KEY_DOWN) |
| REMOTE_KEY(0x1d, KEY_ENTER) |
| REMOTE_KEY(0x17, KEY_MUTE) |
| REMOTE_KEY(0x49, KEY_FINANCE) |
| REMOTE_KEY(0x43, KEY_BACK) |
| REMOTE_KEY(0x12, KEY_FN_F4) |
| REMOTE_KEY(0x14, KEY_FN_F5) |
| REMOTE_KEY(0x18, KEY_FN_F6) |
| REMOTE_KEY(0x59, KEY_INFO) |
| REMOTE_KEY(0x5a, KEY_STOPCD) |
| REMOTE_KEY(0x10, KEY_POWER) |
| REMOTE_KEY(0x42, KEY_PREVIOUSSONG) |
| REMOTE_KEY(0x44, KEY_NEXTSONG) |
| REMOTE_KEY(0x1e, KEY_REWIND) |
| REMOTE_KEY(0x4b, KEY_FASTFORWARD) |
| REMOTE_KEY(0x58, KEY_PLAYPAUSE) |
| REMOTE_KEY(0x46, KEY_PROPS) |
| REMOTE_KEY(0x40, KEY_UNDO) |
| REMOTE_KEY(0x38, KEY_SCROLLLOCK) |
| REMOTE_KEY(0x57, KEY_FN) |
| REMOTE_KEY(0x5b, KEY_FN_ESC) |
| REMOTE_KEY(0x54, KEY_RED) |
| REMOTE_KEY(0x4c, KEY_GREEN) |
| REMOTE_KEY(0x4e, KEY_YELLOW) |
| REMOTE_KEY(0x55, KEY_BLUE) |
| REMOTE_KEY(0x53, KEY_BLUETOOTH) |
| REMOTE_KEY(0x52, KEY_WLAN) |
| REMOTE_KEY(0x39, KEY_CAMERA) |
| REMOTE_KEY(0x41, KEY_SOUND) |
| REMOTE_KEY(0x0b, KEY_QUESTION) |
| REMOTE_KEY(0x00, KEY_CHAT) |
| REMOTE_KEY(0x13, KEY_SEARCH)>; |
| }; |
| |
| map_2: map_2{ |
| mapname = "amlogic-remote-3"; |
| customcode = <0xbd02>; |
| release_delay = <80>; |
| size = <17>; |
| keymap = <REMOTE_KEY(0xca,KEY_UP) |
| REMOTE_KEY(0xd2,KEY_DOWN) |
| REMOTE_KEY(0x99,KEY_LEFT) |
| REMOTE_KEY(0xc1,KEY_RIGHT) |
| REMOTE_KEY(0xce,KEY_RIGHTCTRL) |
| REMOTE_KEY(0x45,KEY_POWER) |
| REMOTE_KEY(0xc5,KEY_COPY) |
| REMOTE_KEY(0x80,KEY_MUTE) |
| REMOTE_KEY(0xd0,KEY_TAB) |
| REMOTE_KEY(0xd6,KEY_LEFTMETA) |
| REMOTE_KEY(0x95,KEY_HOME) |
| REMOTE_KEY(0xdd,KEY_PAGEUP) |
| REMOTE_KEY(0x8c,KEY_PAGEDOWN) |
| REMOTE_KEY(0x89,KEY_UNDO) |
| REMOTE_KEY(0x9c,KEY_PROPS) |
| REMOTE_KEY(0x9a,KEY_SCALE) |
| REMOTE_KEY(0xcd,KEY_KPCOMMA)>; |
| }; |
| map_3: map_3{ |
| mapname = "amlogic-remote-4"; |
| customcode = <0xa4e8>; /* Reference Remote Control */ |
| release_delay = <80>; |
| size = <45>; |
| keymap = < |
| REMOTE_KEY(0xc7, 200) /* power */ |
| REMOTE_KEY(0x93, 201) /* eject-->input source */ |
| REMOTE_KEY(0xb2, 202) /* usb */ |
| REMOTE_KEY(0xb8, 203) /* coaxial */ |
| REMOTE_KEY(0xb7, 204) /* aux */ |
| REMOTE_KEY(0x8a, 205) /* scan-->hdmi arc */ |
| REMOTE_KEY(0x96, 206) /* dimmer */ |
| REMOTE_KEY(0x90, 207) /* hdmi1 */ |
| REMOTE_KEY(0xa8, 208) /* hdmi2 */ |
| REMOTE_KEY(0x85, 209) /* mute */ |
| REMOTE_KEY(0x80, 210) /* vol+ */ |
| REMOTE_KEY(0x81, 211) /* vol- */ |
| REMOTE_KEY(0x61, 212) /* DAP */ |
| REMOTE_KEY(0x62, 213) /* BM */ |
| REMOTE_KEY(0x63, 214) /* DRC */ |
| REMOTE_KEY(0x64, 215) /* POST */ |
| REMOTE_KEY(0x65, 216) /* UPMIX */ |
| REMOTE_KEY(0x66, 217) /* VIRT */ |
| REMOTE_KEY(0x67, 218) /* LEGACY */ |
| REMOTE_KEY(0x68, 219) /* HFILT */ |
| REMOTE_KEY(0x69, 220) /* Loundness */ |
| REMOTE_KEY(0x60, 221) /* Audio_info */ |
| REMOTE_KEY(0xb1, 222) /* CD */ |
| REMOTE_KEY(0xb4, 223) /* CD */ |
| REMOTE_KEY(0xb9, 224) /* CD */ |
| REMOTE_KEY(0xab, 225) /* CD */ |
| REMOTE_KEY(0x91, 226) /* CD */ |
| REMOTE_KEY(0x92, 227) /* CD */ |
| REMOTE_KEY(0x89, 228) /* CD */ |
| REMOTE_KEY(0x88, 229) /* CD */ |
| REMOTE_KEY(0xa5, 230) /* CD */ |
| REMOTE_KEY(0x84, 231) /* CD */ |
| REMOTE_KEY(0x72, 232) /* CD */ |
| REMOTE_KEY(0x73, 233) /* CD */ |
| REMOTE_KEY(0x9a, 234) /* CD */ |
| REMOTE_KEY(0x9b, 235) /* CD */ |
| REMOTE_KEY(0xa0, 236) /* CD */ |
| REMOTE_KEY(0x71, 237) /* CD */ |
| REMOTE_KEY(0x74, 238) /* CD */ |
| REMOTE_KEY(0x75, 239) /* CD */ |
| REMOTE_KEY(0x7e, 240) /* CD */ |
| REMOTE_KEY(0x7f, 241) /* CD */ |
| REMOTE_KEY(0x7a, 242) /* CD */ |
| REMOTE_KEY(0xa7, 243) /* CD */ |
| REMOTE_KEY(0xa9, 244) /* CD */ |
| >; |
| }; |
| }; |
| |
| uart_A: serial@ffd24000 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0xffd24000 0x18>; |
| interrupts = <0 26 1>; |
| status = "disabled"; |
| clocks = <&xtal |
| &clkc CLKID_UART0>; |
| clock-names = "clk_uart", |
| "clk_gate"; |
| fifosize = < 128 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&a_uart_pins>; |
| }; |
| |
| uart_B: serial@ffd23000 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0xffd23000 0x18>; |
| interrupts = <0 75 1>; |
| status = "disabled"; |
| clocks = <&xtal |
| &clkc CLKID_UART1>; |
| clock-names = "clk_uart", |
| "clk_gate"; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&b_uart_pins>; |
| }; |
| |
| uart_C: serial@ffd22000 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0xffd22000 0x18>; |
| interrupts = <0 93 1>; |
| status = "disabled"; |
| clocks = <&xtal |
| &clkc CLKID_UART1>; |
| clock-names = "clk_uart", |
| "clk_gate"; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&c_uart_pins>; |
| }; |
| |
| |
| pcie_A: pcieA@fc000000 { |
| compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie"; |
| reg = <0xfc000000 0x400000 |
| 0xff648000 0x2000 |
| 0xfc400000 0x200000 |
| 0xff646000 0x2000 |
| 0xffd01080 0x10>; |
| reg-names = "elbi", "cfg", "config", "phy", "reset"; |
| interrupts = <0 221 0>; |
| #interrupt-cells = <1>; |
| bus-range = <0x0 0xff>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| interrupt-map-mask = <0 0 0 0>; |
| interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_EDGE_RISING>; |
| device_type = "pci"; |
| ranges = <0x81000000 0 0 0xfc600000 0x0 0x100000 |
| /* downstream I/O */ |
| 0x82000000 0x0 0xfc700000 0xfc700000 0 0x1900000>; |
| /* non-prefetchable memory */ |
| num-lanes = <1>; |
| pcie-num = <1>; |
| |
| clocks = <&clkc CLKID_PCIE_PLL |
| &clkc CLKID_PCIE0 |
| &clkc CLKID_PCIE0PHY |
| &clkc CLKID_PCIE0_GATE>; |
| clock-names = "pcie_refpll", |
| "pcie", |
| "pcie_phy", |
| "pcie_hcsl"; |
| /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ |
| gpio-type = <2>; |
| pcie-apb-rst-bit = <15>; |
| pcie-phy-rst-bit = <14>; |
| pcie-ctrl-a-rst-bit = <12>; |
| pwr-ctl = <1>; |
| pcie-ctrl-sleep-shift = <18>; |
| pcie-hhi-mem-pd-shift = <26>; |
| pcie-hhi-mem-pd-mask = <0xf>; |
| pcie-ctrl-iso-shift = <18>; |
| status = "disabled"; |
| }; |
| |
| pcie_B: pcieB@fc000000 { |
| compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie"; |
| reg = <0xfA000000 0x400000 |
| 0xff65E000 0x2000 |
| 0xfA400000 0x200000 |
| 0xff65C000 0x2000 |
| 0xffd01080 0x10>; |
| reg-names = "elbi", "cfg", "config", "phy", |
| "reset"; |
| interrupts = <0 229 0>; |
| #interrupt-cells = <1>; |
| bus-range = <0x0 0xff>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| interrupt-map-mask = <0 0 0 0>; |
| interrupt-map = <0 0 0 0 &gic GIC_SPI 231 IRQ_TYPE_EDGE_RISING>; |
| device_type = "pci"; |
| ranges = <0x81000000 0 0 0xfA600000 0x0 0x100000 |
| /* downstream I/O */ |
| 0x82000000 0x0 0xfA700000 0xfA700000 0 0x1900000>; |
| /* non-prefetchable memory */ |
| num-lanes = <1>; |
| pcie-num = <1>; |
| |
| clocks = <&clkc CLKID_PCIE_PLL |
| &clkc CLKID_PCIE1 |
| &clkc CLKID_PCIE1PHY |
| &clkc CLKID_PCIE1_GATE>; |
| clock-names = "pcie_refpll", |
| "pcie", |
| "pcie_phy", |
| "pcie_hcsl"; |
| /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ |
| gpio-type = <2>; |
| pcie-apb-rst-bit = <30>; |
| pcie-phy-rst-bit = <29>; |
| pcie-ctrl-a-rst-bit = <28>; |
| pwr-ctl = <1>; |
| pcie-ctrl-sleep-shift = <20>; |
| pcie-hhi-mem-pd-shift = <4>; |
| pcie-hhi-mem-pd-mask = <0xf>; |
| pcie-ctrl-iso-shift = <20>; |
| status = "disabled"; |
| }; |
| galcore { |
| compatible = "amlogic, galcore"; |
| dev_name = "galcore"; |
| status = "okay"; |
| interrupts = <0 147 4>; |
| interrupt-names = "galcore"; |
| reg = <0xff100000 0x800 |
| 0xff000000 0x400000 |
| 0xff63c118 0x0 |
| 0xff63c11c 0x0 |
| 0xffd01088 0x0 |
| 0xff63c1c8 0x0 |
| >; |
| reg-names = "NN_REG","NN_SRAM","NN_MEM0", |
| "NN_MEM1","NN_RESET","NN_CLK"; |
| nn_power_version = <3>; |
| nn_efuse = <0xff63003c 0x20>; |
| }; |
| sd_emmc_c: emmc@ffe07000 { |
| status = "disabled"; |
| compatible = "amlogic, meson-mmc-tm2"; |
| reg = <0xffe07000 0x800>; |
| interrupts = <0 191 1>; |
| pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins"; |
| pinctrl-0 = <&emmc_clk_cmd_pins>; |
| pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>; |
| clocks = <&clkc CLKID_SD_EMMC_C>, |
| <&clkc CLKID_SD_EMMC_C_P0_COMP>, |
| <&clkc CLKID_FCLK_DIV2>, |
| <&clkc CLKID_FCLK_DIV2P5>, |
| <&xtal>; |
| clock-names = "core","clkin0","clkin1","clkin2","xtal"; |
| |
| bus-width = <8>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| /* mmc-ddr-1_8v; */ |
| /* mmc-hs200-1_8v; */ |
| |
| max-frequency = <200000000>; |
| non-removable; |
| disable-wp; |
| emmc { |
| pinname = "emmc"; |
| ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ |
| /*caps defined in dts*/ |
| tx_delay = <0>; |
| save_para = <0>; |
| max_req_size = <0x20000>; /**128KB*/ |
| gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>; |
| hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>; |
| card_type = <1>; |
| /* 1:mmc card(include eMMC), |
| * 2:sd card(include tSD) |
| */ |
| }; |
| }; |
| |
| /* to use "dirspi" of amlogic-driver for T312 */ |
| spicc_b:spicc_b { |
| compatible = "amlogic, spicc"; |
| status = "disabled"; |
| device_id = <1>; |
| reg = <0xffd15000 0x3c>; |
| clocks = <&clkc CLKID_SPICC1>, |
| <&clkc CLKID_SPICC1_COMP>; |
| clock-names = "cts_spicc_hclk", "spicc_clk"; |
| clk_rate = <166666666>; |
| //interrupts = <0 90 1>; |
| enhance = <1>; |
| dma_tx_threshold = <3>; |
| dma_rx_threshold = <3>; |
| dma_num_per_read_burst = <3>; |
| dma_num_per_write_burst = <3>; |
| ssctl = <0>; |
| dma_en = <0>; |
| delay_control = <0x15>; |
| cs_delay = <10>; |
| enhance_dlyctl = <0>; |
| }; |
| |
| spifc: spifc@ffd14000 { |
| compatible = "amlogic,aml-spi-nor"; |
| status = "disabled"; |
| |
| reg = <0xffd14000 0x80>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spifc_all_pins>; |
| clock-names = "core"; |
| clocks = <&clkc CLKID_CLK81>; |
| |
| spi-nor@0 { |
| compatible = "jedec,spi-nor"; |
| spifc-frequency = <40000000>; |
| read-capability = <4>;/* dual read 1_1_2 */ |
| spifc-io-width = <4>; |
| }; |
| }; |
| |
| slc_nand: nand-controller@0xFFE07800 { |
| compatible = "amlogic, aml_mtd_nand"; |
| status = "disabled"; |
| reg = <0xFFE07800 0x200>; |
| interrupts = <0 34 1>; |
| |
| pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only"; |
| pinctrl-0 = <&all_nand_pins>; |
| pinctrl-1 = <&all_nand_pins>; |
| pinctrl-2 = <&nand_cs_pins>; |
| device_id = <0>; |
| clocks = <&clkc CLKID_SD_EMMC_C>, |
| <&clkc CLKID_FCLK_DIV2>; |
| clock-names = "gate", "fdiv2pll"; |
| bl_mode = <1>; |
| fip_copies = <4>; |
| fip_size = <0x200000>; |
| nand_clk_ctrl = <0xFFE07000>; |
| }; |
| |
| mesonstream { |
| compatible = "amlogic, codec, streambuf"; |
| status = "okay"; |
| clocks = <&clkc CLKID_U_PARSER |
| &clkc CLKID_DEMUX |
| &clkc CLKID_AHB_ARB0 |
| &clkc CLKID_CLK81 |
| &clkc CLKID_DOS |
| &clkc CLKID_VDEC_MUX |
| &clkc CLKID_HCODEC_MUX |
| &clkc CLKID_HEVC_MUX |
| &clkc CLKID_HEVCF_MUX>; |
| clock-names = "parser_top", |
| "demux", |
| "ahbarb0", |
| "clk_81", |
| "vdec", |
| "clk_vdec_mux", |
| "clk_hcodec_mux", |
| "clk_hevc_mux", |
| "clk_hevcb_mux"; |
| }; |
| |
| vcodec-dec { |
| compatible = "amlogic, vcodec-dec"; |
| status = "okay"; |
| }; |
| |
| vdec { |
| compatible = "amlogic, vdec"; |
| status = "okay"; |
| interrupts = <0 3 1 |
| 0 23 1 |
| 0 32 1 |
| 0 43 1 |
| 0 44 1 |
| 0 45 1 |
| 0 74 1>; |
| interrupt-names = "vsync", |
| "demux", |
| "parser", |
| "mailbox_0", |
| "mailbox_1", |
| "mailbox_2", |
| "parser_b"; |
| }; |
| video_composer { |
| compatible = "amlogic, video_composer"; |
| dev_name = "video_composer"; |
| status = "okay"; |
| }; |
| |
| amvenc_avc{ |
| compatible = "amlogic, amvenc_avc"; |
| dev_name = "amvenc_avc"; |
| status = "okay"; |
| interrupts = <0 45 1>; |
| interrupt-names = "mailbox_2"; |
| }; |
| |
| canvas: canvas { |
| compatible = "amlogic, meson, canvas"; |
| status = "okay"; |
| reg = <0xff638000 0x2000>; |
| }; |
| |
| codec_io: codec_io { |
| compatible = "amlogic, codec_io"; |
| status = "okay"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| ranges; |
| io_cbus_base{ |
| reg = <0xffd00000 0x100000>; |
| }; |
| io_dos_base{ |
| reg = <0xff620000 0x10000>; |
| }; |
| io_hiubus_base{ |
| reg = <0xff63c000 0x2000>; |
| }; |
| io_aobus_base{ |
| reg = <0xff800000 0x10000>; |
| }; |
| io_vcbus_base{ |
| reg = <0xff900000 0x40000>; |
| }; |
| io_dmc_base{ |
| reg = <0xff638000 0x2000>; |
| }; |
| io_efuse_base{ |
| reg = <0xff630000 0x2000>; |
| }; |
| }; |
| |
| rdma { |
| compatible = "amlogic, meson-tl1, rdma"; |
| status = "okay"; |
| interrupts = <0 89 1>; |
| interrupt-names = "rdma"; |
| }; |
| |
| meson_fb: fb { |
| compatible = "amlogic, meson-tm2"; |
| memory-region = <&logo_reserved>; |
| status = "disabled"; |
| interrupts = <0 3 1 |
| 0 56 1 |
| 0 89 1>; |
| interrupt-names = "viu-vsync", "viu2-vsync", "rdma"; |
| /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/ |
| display_mode_default = "1080p60hz"; |
| scale_mode = <1>; |
| /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */ |
| display_size_default = <1920 1080 1920 2160 32>; |
| /*1920*1080*4*3 = 0x17BB000*/ |
| clocks = <&clkc CLKID_VPU_CLKC_MUX>; |
| clock-names = "vpu_clkc"; |
| }; |
| |
| amhdmitx: amhdmitx{ |
| compatible = "amlogic, amhdmitx"; |
| dev_name = "amhdmitx"; |
| status = "disabled"; |
| vend-data = <&vend_data>; |
| pinctrl-names="default", "hdmitx_i2c"; |
| pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>; |
| pinctrl-1=<&hdmitx_hpd_gpio>; |
| clocks = <&clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_VAPB_MUX |
| &clkc CLKID_VPU_MUX>; |
| clock-names = "venci_top_gate", |
| "venci_0_gate", |
| "venci_1_gate", |
| "hdmi_vapb_clk", |
| "hdmi_vpu_clk"; |
| interrupts = <0 7 1 |
| 0 3 1>; |
| interrupt-names = "hdmitx_hpd", "viu1_vsync"; |
| /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM |
| * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD |
| * 10:G12A 11:G12B 12:SM1 13:TM2 |
| */ |
| ic_type = <13>; |
| vend_data: vend_data{ /* Should modified by Customer */ |
| vendor_name = "Amlogic"; /* Max Chars: 8 */ |
| product_desc = "MBox Meson Ref"; /* Max Chars: 16 */ |
| /* standards.ieee.org/develop/regauth/oui/oui.txt */ |
| vendor_id = <0x000000>; |
| }; |
| }; |
| |
| ge2d { |
| compatible = "amlogic, ge2d-sm1"; |
| status = "okay"; |
| interrupts = <0 146 1>; |
| interrupt-names = "ge2d"; |
| clocks = <&clkc CLKID_VAPB_MUX>, |
| <&clkc CLKID_G2D>, |
| <&clkc CLKID_GE2D_GATE>; |
| clock-names = "clk_vapb_0", |
| "clk_ge2d", |
| "clk_ge2d_gate"; |
| reg = <0xff940000 0x10000>; |
| }; |
| |
| meson-amvideom { |
| compatible = "amlogic, amvideom"; |
| status = "okay"; |
| interrupts = <0 3 1>; |
| interrupt-names = "vsync"; |
| }; |
| |
| ionvideo { |
| compatible = "amlogic, ionvideo"; |
| status = "okay"; |
| }; |
| |
| amlvideo { |
| compatible = "amlogic, amlvideo"; |
| status = "okay"; |
| }; |
| |
| vout: vout { |
| compatible = "amlogic, vout"; |
| status = "okay"; |
| |
| fr_policy = <0>; |
| }; |
| |
| vout2: vout2 { |
| compatible = "amlogic, vout2"; |
| status = "disabled"; |
| clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>, |
| <&clkc CLKID_VPU_CLKC_MUX>; |
| clock-names = "vpu_clkc0", |
| "vpu_clkc"; |
| |
| fr_policy = <0>; |
| }; |
| |
| vdac { |
| compatible = "amlogic, vdac-tm2"; |
| status = "okay"; |
| }; |
| |
| dummy_venc: dummy_venc { |
| compatible = "amlogic, dummy_venc"; |
| status = "okay"; |
| clocks = <&clkc CLKID_VCLK2_ENCP |
| &clkc CLKID_VCLK2_VENCP0 |
| &clkc CLKID_VCLK2_VENCP1 |
| &clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_VCLK2_ENCL |
| &clkc CLKID_VCLK2_VENCL>; |
| clock-names = "encp_top_gate", |
| "encp_int_gate0", |
| "encp_int_gate1", |
| "venci_top_gate", |
| "enci_int_gate0", |
| "enci_int_gate1", |
| "encl_top_gate", |
| "encl_int_gate"; |
| }; |
| |
| ddr_bandwidth { |
| compatible = "amlogic, ddr-bandwidth"; |
| status = "okay"; |
| reg = <0xff638000 0x100 |
| 0xff638c00 0x100>; |
| sec_base = <0xff639000>; |
| interrupts = <0 52 1>; |
| interrupt-names = "ddr_bandwidth"; |
| }; |
| |
| dmc_monitor { |
| compatible = "amlogic, dmc_monitor"; |
| status = "okay"; |
| reg_base = <0xff639000>; |
| interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>; |
| }; |
| |
| efuse: efuse{ |
| compatible = "amlogic, efuse"; |
| read_cmd = <0x82000030>; |
| write_cmd = <0x82000031>; |
| get_max_cmd = <0x82000033>; |
| key = <&efusekey>; |
| clocks = <&clkc CLKID_EFUSE>; |
| clock-names = "efuse_clk"; |
| status = "disabled"; |
| }; |
| |
| efusekey:efusekey{ |
| keynum = <4>; |
| key0 = <&key_0>; |
| key1 = <&key_1>; |
| key2 = <&key_2>; |
| key3 = <&key_3>; |
| key_0:key_0{ |
| keyname = "mac"; |
| offset = <0>; |
| size = <6>; |
| }; |
| key_1:key_1{ |
| keyname = "mac_bt"; |
| offset = <6>; |
| size = <6>; |
| }; |
| key_2:key_2{ |
| keyname = "mac_wifi"; |
| offset = <12>; |
| size = <6>; |
| }; |
| key_3:key_3{ |
| keyname = "usid"; |
| offset = <18>; |
| size = <16>; |
| }; |
| }; |
| |
| audio_data: audio_data { |
| compatible = "amlogic, audio_data"; |
| query_licence_cmd = <0x82000050>; |
| status = "disabled"; |
| }; |
| |
| defendkey: defendkey { |
| compatible = "amlogic, defendkey"; |
| mem_size = <0 0x100000>; |
| status = "okay"; |
| }; |
| cpu_ver_name { |
| compatible = "amlogic, cpu-major-id-tm2"; |
| }; |
| |
| hifi4dsp: hifi4dsp { |
| compatible = "amlogic, hifi4dsp"; |
| memory-region = <&dsp_fw_reserved>; |
| reserved_mem_size = <0x00400000>; |
| reg = <0xff680000 0x10000 |
| 0xff690000 0x10000>; |
| reg-names = "dspa_top_reg","dspb_top_reg"; |
| interrupts = <0 242 1 |
| 0 246 1>; |
| interrupt-names = "irq_frm_dspa","irq_frm_dspb"; |
| clocks = <&clkc CLKID_DSPA |
| &clkc CLKID_DSPA_MUX |
| &clkc CLKID_DSPB |
| &clkc CLKID_DSPB_MUX>; |
| clock-names = "dspa_gate", "dspa_clk", |
| "dspb_gate", "dspb_gate"; |
| dsp-cnt = <2>; |
| status = "okay"; |
| }; |
| |
| p_tsensor: p_tsensor@ff634800 { |
| compatible = "amlogic, r1p1-tsensor"; |
| status = "okay"; |
| reg = <0xff634800 0x50>, |
| <0xff800268 0x4>; |
| cal_type = <0x1>; |
| cal_a = <324>; |
| cal_b = <424>; |
| cal_c = <3159>; |
| cal_d = <9411>; |
| rtemp = <115000>; |
| interrupts = <0 35 0>; |
| clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
| clock-names = "ts_comp"; |
| #thermal-sensor-cells = <1>; |
| }; |
| |
| d_tsensor: d_tsensor@ff634c00 { |
| compatible = "amlogic, r1p1-tsensor"; |
| status = "okay"; |
| reg = <0xff634c00 0x50>, |
| <0xff800230 0x4>; |
| cal_type = <0x1>; |
| cal_a = <324>; |
| cal_b = <424>; |
| cal_c = <3159>; |
| cal_d = <9411>; |
| rtemp = <115000>; |
| interrupts = <0 36 0>; |
| clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
| clock-names = "ts_comp"; |
| #thermal-sensor-cells = <1>; |
| }; |
| |
| s_tsensor: s_tsensor@ff635000 { |
| compatible = "amlogic, r1p1-tsensor"; |
| status = "okay"; |
| reg = <0xff635000 0x50>, |
| <0xff80026c 0x4>; |
| cal_type = <0x1>; |
| cal_a = <324>; |
| cal_b = <424>; |
| cal_c = <3159>; |
| cal_d = <9411>; |
| rtemp = <115000>; |
| interrupts = <0 38 0>; |
| clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
| clock-names = "ts_comp"; |
| #thermal-sensor-cells = <1>; |
| }; |
| |
| meson_cooldev: meson-cooldev@0 { |
| status = "okay"; |
| compatible = "amlogic, meson-cooldev"; |
| cooling_devices { |
| cpufreq_cool_cluster0 { |
| min_state = <1000000>; |
| dyn_coeff = <140>; |
| gpu_pp = <2>; |
| cluster_id = <0>; |
| node_name = "cpufreq_cool0"; |
| device_type = "cpufreq"; |
| }; |
| cpucore_cool_cluster0 { |
| min_state = <1>; |
| dyn_coeff = <0>; |
| gpu_pp = <2>; |
| cluster_id = <0>; |
| node_name = "cpucore_cool0"; |
| device_type = "cpucore"; |
| }; |
| gpufreq_cool { |
| min_state = <400>; |
| dyn_coeff = <160>; |
| gpu_pp = <2>; |
| cluster_id = <0>; |
| node_name = "gpufreq_cool0"; |
| device_type = "gpufreq"; |
| }; |
| gpucore_cool { |
| min_state = <1>; |
| dyn_coeff = <0>; |
| gpu_pp = <2>; |
| cluster_id = <0>; |
| node_name = "gpucore_cool0"; |
| device_type = "gpucore"; |
| }; |
| }; |
| cpufreq_cool0:cpufreq_cool0 { |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| cpucore_cool0:cpucore_cool0 { |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| gpufreq_cool0:gpufreq_cool0 { |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| gpucore_cool0:gpucore_cool0 { |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| };/*meson cooling devices end*/ |
| |
| thermal-zones { |
| pll_thermal: pll_thermal { |
| polling-delay = <1000>; |
| polling-delay-passive = <100>; |
| sustainable-power = <1230>; |
| thermal-sensors = <&p_tsensor 0>; |
| trips { |
| pswitch_on: trip-point@0 { |
| temperature = <60000>; |
| hysteresis = <5000>; |
| type = "passive"; |
| }; |
| pcontrol: trip-point@1 { |
| temperature = <75000>; |
| hysteresis = <5000>; |
| type = "passive"; |
| }; |
| phot: trip-point@2 { |
| temperature = <85000>; |
| hysteresis = <5000>; |
| type = "hot"; |
| }; |
| pcritical: trip-point@3 { |
| temperature = <110000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| cooling-maps { |
| cpufreq_cooling_map { |
| trip = <&pcontrol>; |
| cooling-device = <&cpufreq_cool0 0 11>; |
| contribution = <1024>; |
| }; |
| cpucore_cooling_map { |
| trip = <&pcontrol>; |
| cooling-device = <&cpucore_cool0 0 4>; |
| contribution = <1024>; |
| }; |
| gpufreq_cooling_map { |
| trip = <&pcontrol>; |
| cooling-device = <&gpufreq_cool0 0 4>; |
| contribution = <1024>; |
| }; |
| }; |
| }; |
| ddr_thermal: ddr_thermal { |
| polling-delay = <2000>; |
| polling-delay-passive = <1000>; |
| sustainable-power = <1230>; |
| thermal-sensors = <&d_tsensor 1>; |
| trips { |
| dswitch_on: trip-point@0 { |
| temperature = <60000>; |
| hysteresis = <5000>; |
| type = "passive"; |
| }; |
| dcontrol: trip-point@1 { |
| temperature = <75000>; |
| hysteresis = <5000>; |
| type = "passive"; |
| }; |
| dhot: trip-point@2 { |
| temperature = <85000>; |
| hysteresis = <5000>; |
| type = "hot"; |
| }; |
| dcritical: trip-point@3 { |
| temperature = <110000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| sar_thermal: sar_thermal { |
| polling-delay = <2000>; |
| polling-delay-passive = <1000>; |
| sustainable-power = <1230>; |
| thermal-sensors = <&s_tsensor 2>; |
| trips { |
| sswitch_on: trip-point@0 { |
| temperature = <60000>; |
| hysteresis = <5000>; |
| type = "passive"; |
| }; |
| scontrol: trip-point@1 { |
| temperature = <75000>; |
| hysteresis = <5000>; |
| type = "passive"; |
| }; |
| shot: trip-point@2 { |
| temperature = <85000>; |
| hysteresis = <5000>; |
| type = "hot"; |
| }; |
| scritical: trip-point@3 { |
| temperature = <110000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| }; /*thermal zone end*/ |
| }; /* end of / */ |
| |
| &pinctrl_aobus { |
| sd_to_ao_uart_clr_pins: sd_to_ao_uart_clr_pins { |
| mux { |
| groups = "GPIOAO_0", |
| "GPIOAO_1", |
| "GPIOAO_2", |
| "GPIOAO_3", |
| "GPIOAO_4", |
| "GPIOAO_5", |
| "GPIOAO_6", |
| "GPIOAO_7", |
| "GPIOAO_8", |
| "GPIOAO_9", |
| "GPIOAO_10", |
| "GPIOAO_11", |
| "GPIOE_0", |
| "GPIOE_1", |
| "GPIOE_2", |
| "GPIO_TEST_N"; |
| function = "gpio_aobus"; |
| }; |
| }; |
| |
| sd_to_ao_uart_pins: sd_to_ao_uart_pins { |
| mux { |
| groups = "uart_ao_a_tx", |
| "uart_ao_a_rx", |
| "uart_ao_a_cts", |
| "uart_ao_a_rts"; |
| function = "uart_ao_a"; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| |
| remote_pins:remote_pin { |
| mux { |
| groups = "remote_input_ao"; |
| function = "remote_input_ao"; |
| }; |
| }; |
| |
| pwm_ao_a_pins: pwm_ao_a { |
| mux { |
| groups = "pwm_ao_a"; |
| function = "pwm_ao_a"; |
| }; |
| }; |
| |
| pwm_ao_a_hiz_pins: pwm_ao_a_hiz { |
| mux { |
| groups = "pwm_ao_a_hiz"; |
| function = "pwm_ao_a"; |
| }; |
| }; |
| |
| pwm_ao_b_pins: pwm_ao_b { |
| mux { |
| groups = "pwm_ao_b"; |
| function = "pwm_ao_b"; |
| }; |
| }; |
| |
| pwm_ao_c_pins1: pwm_ao_c_pins1 { |
| mux { |
| groups = "pwm_ao_c_4"; |
| function = "pwm_ao_c"; |
| }; |
| }; |
| |
| pwm_ao_c_pins2: pwm_ao_c_pins2 { |
| mux { |
| groups = "pwm_ao_c_6"; |
| function = "pwm_ao_c"; |
| }; |
| }; |
| |
| pwm_ao_c_hiz_pins1: pwm_ao_c_hiz1 { |
| mux { |
| groups = "pwm_ao_c_hiz_4"; |
| function = "pwm_ao_c"; |
| }; |
| }; |
| |
| pwm_ao_c_hiz_pins2: pwm_ao_c_hiz2 { |
| mux { |
| groups = "pwm_ao_c_hiz_7"; |
| function = "pwm_ao_c"; |
| }; |
| }; |
| |
| pwm_ao_d_pins1: pwm_ao_d_pins1 { |
| mux { |
| groups = "pwm_ao_d_5"; |
| function = "pwm_ao_d"; |
| }; |
| }; |
| |
| pwm_ao_d_pins2: pwm_ao_d_pins2 { |
| mux { |
| groups = "pwm_ao_d_10"; |
| function = "pwm_ao_d"; |
| }; |
| }; |
| |
| pwm_ao_d_pins3: pwm_ao_d_pins3 { |
| mux { |
| groups = "pwm_ao_d_e"; |
| function = "pwm_ao_d"; |
| }; |
| }; |
| |
| pwm_a_e2: pwm_a_e2 { |
| mux { |
| groups = "pwm_a_e2"; |
| function = "pwm_a_e2"; |
| }; |
| }; |
| |
| i2c_ao_2_pins:i2c_ao_2 { |
| mux { |
| groups = "i2c_ao_sck_2", |
| "i2c_ao_sda_3"; |
| function = "i2c_ao"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c_ao_e_pins:i2c_ao_e { |
| mux { |
| groups = "i2c_ao_sck_e", |
| "i2c_ao_sda_e"; |
| function = "i2c_ao"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c_ao_slave_pins:i2c_ao_slave { |
| mux { |
| groups = "i2c_ao_slave_sck", |
| "i2c_ao_slave_sda"; |
| function = "i2c_ao_slave"; |
| }; |
| }; |
| |
| ao_uart_pins:ao_uart { |
| mux { |
| groups = "uart_ao_a_rx", |
| "uart_ao_a_tx"; |
| function = "uart_ao_a"; |
| }; |
| }; |
| |
| ao_b_uart_pins1:ao_b_uart1 { |
| mux { |
| groups = "uart_ao_b_tx_2", |
| "uart_ao_b_rx_3"; |
| function = "uart_ao_b"; |
| }; |
| }; |
| |
| ao_b_uart_pins2:ao_b_uart2 { |
| mux { |
| groups = "uart_ao_b_tx_8", |
| "uart_ao_b_rx_9"; |
| function = "uart_ao_b"; |
| }; |
| }; |
| |
| irblaster_pins:irblaster_pin { |
| mux { |
| groups = "remote_out_ao"; |
| function = "remote_out_ao"; |
| }; |
| }; |
| |
| irblaster_pins1:irblaster_pin1 { |
| mux { |
| groups = "remote_out_ao9"; |
| function = "remote_out_ao"; |
| }; |
| }; |
| |
| jtag_apao_pins:jtag_apao_pin { |
| mux { |
| groups = "jtag_a_tdi", |
| "jtag_a_tdo", |
| "jtag_a_clk", |
| "jtag_a_tms"; |
| function = "jtag_a"; |
| }; |
| }; |
| |
| jtag_swd_apao_pins:swd_apao_pin { |
| mux { |
| groups = "swclk", |
| "swdio"; |
| function = "sw"; |
| }; |
| }; |
| }; |
| |
| &pinctrl_periphs { |
| /* sdemmc portC */ |
| emmc_clk_cmd_pins: emmc_clk_cmd_pins { |
| mux { |
| groups = "emmc_clk", |
| "emmc_cmd"; |
| function = "emmc"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| emmc_conf_pull_up: emmc_conf_pull_up { |
| mux { |
| groups = "emmc_nand_d7", |
| "emmc_nand_d6", |
| "emmc_nand_d5", |
| "emmc_nand_d4", |
| "emmc_nand_d3", |
| "emmc_nand_d2", |
| "emmc_nand_d1", |
| "emmc_nand_d0", |
| "emmc_clk", |
| "emmc_cmd"; |
| function = "emmc"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| emmc_conf_pull_done: emmc_conf_pull_done { |
| mux { |
| groups = "emmc_nand_ds"; |
| function = "emmc"; |
| input-enable; |
| bias-pull-down; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| /* sdemmc portB */ |
| sd_clk_cmd_pins: sd_clk_cmd_pins { |
| mux { |
| groups = "sdcard_cmd", |
| "sdcard_clk"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| sd_all_pins: sd_all_pins { |
| mux { |
| groups = "sdcard_d0", |
| "sdcard_d1", |
| "sdcard_d2", |
| "sdcard_d3", |
| "sdcard_cmd", |
| "sdcard_clk"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| sd_1bit_pins: sd_1bit_pins { |
| mux { |
| groups = "sdcard_d0", |
| "sdcard_cmd", |
| "sdcard_clk"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| ao_to_sd_uart_pins: ao_to_sd_uart_pins { |
| mux { |
| groups ="uart_ao_a_rx_w3", |
| "uart_ao_a_tx_w2", |
| "uart_ao_a_rx_w7", |
| "uart_ao_a_tx_w6", |
| "uart_ao_a_rx_w11", |
| "uart_ao_a_tx_w10"; |
| function = "uart_ao_a_ee"; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| |
| all_nand_pins: all_nand_pins { |
| mux { |
| groups = "emmc_nand_d0", |
| "emmc_nand_d1", |
| "emmc_nand_d2", |
| "emmc_nand_d3", |
| "emmc_nand_d4", |
| "emmc_nand_d5", |
| "emmc_nand_d6", |
| "emmc_nand_d7", |
| "nand_ce0", |
| "nand_ale", |
| "nand_cle", |
| "nand_wen_clk", |
| "nand_ren_wr"; |
| function = "nand"; |
| input-enable; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| nand_cs_pins:nand_cs { |
| mux { |
| groups = "nand_ce0"; |
| function = "nand"; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| /* sdemmc port */ |
| sdio_clk_cmd_pins: sdio_clk_cmd_pins { |
| mux { |
| groups = "sdcard_clk", |
| "sdcard_cmd"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| sdio_all_pins: sdio_all_pins { |
| mux { |
| groups = "sdcard_d0", |
| "sdcard_d1", |
| "sdcard_d2", |
| "sdcard_d3", |
| "sdcard_clk", |
| "sdcard_cmd"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| spifc_cs_pin:spifc_cs_pin { |
| mux { |
| groups = "nor_cs"; |
| function = "nor"; |
| bias-pull-up; |
| }; |
| }; |
| |
| spifc_pulldown: spifc_pulldown { |
| mux { |
| groups = "nor_d", |
| "nor_q", |
| "nor_c"; |
| function = "nor"; |
| bias-pull-down; |
| }; |
| }; |
| |
| spifc_pullup: spifc_pullup { |
| mux { |
| groups = "nor_cs"; |
| function = "nor"; |
| bias-pull-up; |
| }; |
| }; |
| |
| spifc_all_pins: spifc_all_pins { |
| mux { |
| groups = "nor_d", |
| "nor_q", |
| "nor_c", |
| "nor_hold", |
| "nor_wp"; |
| function = "nor"; |
| input-enable; |
| bias-pull-down; |
| }; |
| }; |
| |
| pwm_a_pins: pwm_a { |
| mux { |
| groups = "pwm_a"; |
| function = "pwm_a"; |
| }; |
| }; |
| |
| pwm_b_pins1: pwm_b_pins1 { |
| mux { |
| groups = "pwm_b_c"; |
| function = "pwm_b"; |
| }; |
| }; |
| |
| pwm_b_pins2: pwm_b_pins2 { |
| mux { |
| groups = "pwm_b_z"; |
| function = "pwm_b"; |
| }; |
| }; |
| |
| pwm_c_pins1: pwm_c_pins1 { |
| mux { |
| groups = "pwm_c_dv"; |
| function = "pwm_c"; |
| }; |
| }; |
| |
| pwm_c_pins2: pwm_c_pins2 { |
| mux { |
| groups = "pwm_c_h"; |
| function = "pwm_c"; |
| }; |
| }; |
| |
| pwm_c_pins3: pwm_c_pins3 { |
| mux { |
| groups = "pwm_c_z"; |
| function = "pwm_c"; |
| }; |
| }; |
| |
| pwm_d_pins1: pwm_d_pins1 { |
| mux { |
| groups = "pwm_d_dv"; |
| function = "pwm_d"; |
| }; |
| }; |
| |
| pwm_d_pins2: pwm_d_pins2 { |
| mux { |
| groups = "pwm_d_z"; |
| function = "pwm_d"; |
| }; |
| }; |
| |
| pwm_e_pins1: pwm_e1 { |
| mux { |
| groups = "pwm_e_dv"; |
| function = "pwm_e"; |
| }; |
| }; |
| |
| pwm_e_pins2: pwm_e2 { |
| mux { |
| groups = "pwm_e_z"; |
| function = "pwm_e"; |
| }; |
| }; |
| |
| pwm_f_pins1: pwm_f_pins1 { |
| mux { |
| groups = "pwm_f_dv"; |
| function = "pwm_f"; |
| }; |
| }; |
| |
| pwm_f_pins2: pwm_f_pins2 { |
| mux { |
| groups = "pwm_f_z"; |
| function = "pwm_f"; |
| }; |
| }; |
| |
| i2c0_c_pins:i2c0_c { |
| mux { |
| groups = "i2c0_sda_c", |
| "i2c0_sck_c"; |
| function = "i2c0"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c0_dv_pins:i2c0_dv { |
| mux { |
| groups = "i2c0_sda_dv", |
| "i2c0_sck_dv"; |
| function = "i2c0"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c1_z_pins:i2c1_z { |
| mux { |
| groups = "i2c1_sda_z", |
| "i2c1_sck_z"; |
| function = "i2c1"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c1_h_pins:i2c1_h { |
| mux { |
| groups = "i2c1_sda_h", |
| "i2c1_sck_h"; |
| function = "i2c1"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c2_h_pins:i2c2_h { |
| mux { |
| groups = "i2c2_sda_h", |
| "i2c2_sck_h"; |
| function = "i2c2"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c2_z_pins:i2c2_z { |
| mux { |
| groups = "i2c2_sda_z", |
| "i2c2_sck_z"; |
| function = "i2c2"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c3_h1_pins:i2c3_h1 { |
| mux { |
| groups = "i2c3_sda_h1", |
| "i2c3_sck_h0"; |
| function = "i2c3"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c3_h20_pins:i2c3_h3 { |
| mux { |
| groups = "i2c3_sda_h20", |
| "i2c3_sck_h19"; |
| function = "i2c3"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c3_dv_pins:i2c3_dv { |
| mux { |
| groups = "i2c3_sda_dv", |
| "i2c3_sck_dv"; |
| function = "i2c3"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| i2c3_c_pins:i2c3_c { |
| mux { |
| groups = "i2c3_sda_c", |
| "i2c3_sck_c"; |
| function = "i2c3"; |
| bias-pull-up; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| spicc0_pins_h: spicc0_pins_h { |
| mux { |
| groups = "spi0_mosi_h", |
| "spi0_miso_h", |
| "spi0_clk_h"; |
| function = "spi0"; |
| drive-strength = <1>; |
| }; |
| }; |
| |
| spicc1_pins_dv: spicc1_pins_dv { |
| mux { |
| groups = "spi1_mosi_dv", |
| "spi1_miso_dv", |
| "spi1_clk_dv"; |
| function = "spi1"; |
| drive-strength = <1>; |
| }; |
| }; |
| |
| spicc1_pins_h: spicc1_pins_h { |
| mux { |
| groups = "spi1_mosi_h", |
| "spi1_miso_h", |
| "spi1_clk_h"; |
| function = "spi1"; |
| drive-strength = <1>; |
| }; |
| }; |
| |
| internal_eth_pins: internal_eth_pins { |
| mux { |
| groups = "eth_link_led", |
| "eth_act_led"; |
| function = "eth"; |
| }; |
| }; |
| |
| internal_gpio_pins: internal_gpio_pins { |
| mux { |
| groups = "GPIOH_0", |
| "GPIOH_1"; |
| function = "gpio_periphs"; |
| bias-disable; |
| input-enable; |
| }; |
| }; |
| |
| external_eth_pins: external_eth_pins { |
| mux { |
| groups = "eth_mdio", |
| "eth_mdc", |
| "eth_rgmii_rx_clk", |
| "eth_rx_dv", |
| "eth_rxd0", |
| "eth_rxd1", |
| "eth_rxd2_rgmii", |
| "eth_rxd3_rgmii", |
| "eth_rgmii_tx_clk", |
| "eth_txen", |
| "eth_txd0", |
| "eth_txd1", |
| "eth_txd2_rgmii", |
| "eth_txd3_rgmii"; |
| function = "eth"; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| a_uart_pins:a_uart { |
| mux { |
| groups = "uart_a_tx", |
| "uart_a_rx", |
| "uart_a_cts", |
| "uart_a_rts"; |
| function = "uart_a"; |
| }; |
| }; |
| |
| b_uart_pins:b_uart { |
| mux { |
| groups = "uart_b_tx", |
| "uart_b_rx"; |
| function = "uart_b"; |
| }; |
| }; |
| |
| c_uart_pins:c_uart { |
| mux { |
| groups = "uart_c_tx", |
| "uart_c_rx"; |
| function = "uart_c"; |
| }; |
| }; |
| hdmitx_hpd: hdmitx_hpd { |
| mux { |
| groups = "hdmitx_hpd_in"; |
| function = "hdmitx"; |
| bias-disable; |
| }; |
| }; |
| |
| hdmitx_hpd_gpio: hdmitx_hpd_gpio { |
| mux { |
| groups = "GPIOH_16"; |
| function = "gpio_periphs"; |
| bias-disable; |
| }; |
| }; |
| |
| hdmitx_ddc: hdmitx_ddc { |
| mux { |
| groups = "hdmitx_sda", |
| "hdmitx_sck"; |
| function = "hdmitx"; |
| bias-disable; |
| drive-strength = <3>; |
| }; |
| }; |
| atvdemod_agc_pins: atvdemod_agc_pins { |
| mux { |
| groups = "atv_if_agc_dv"; |
| function = "atv"; |
| }; |
| }; |
| |
| dtvdemod_agc_pins: dtvdemod_agc_pins { |
| mux { |
| groups = "dtv_if_agc_dv2"; |
| function = "dtv"; |
| }; |
| }; |
| |
| lcd_vbyone_pins: lcd_vbyone_pin { |
| mux { |
| groups = "vx1_lockn","vx1_htpdn"; |
| function = "vx1"; |
| }; |
| }; |
| |
| lcd_vbyone_off_pins: lcd_vbyone_off_pin { |
| mux { |
| groups = "GPIOH_15","GPIOH_16"; |
| function = "gpio_periphs"; |
| input-enable; |
| }; |
| }; |
| |
| lcd_tcon_pins: lcd_tcon_pin { |
| mux { |
| groups = "tcon_0","tcon_1","tcon_2","tcon_3", |
| "tcon_4","tcon_5","tcon_6","tcon_7", |
| "tcon_8","tcon_9","tcon_10","tcon_11", |
| "tcon_12","tcon_13","tcon_14","tcon_15", |
| "tcon_lock","tcon_spi_mo","tcon_spi_mi", |
| "tcon_spi_clk","tcon_spi_ss"; |
| function = "tcon"; |
| }; |
| }; |
| lcd_tcon_off_pins: lcd_tcon_off_pin { |
| mux { |
| groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3", |
| "GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7", |
| "GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11", |
| "GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15", |
| "GPIOH_16","GPIOH_17","GPIOH_18","GPIOH_19", |
| "GPIOH_20"; |
| function = "gpio_periphs"; |
| input-enable; |
| }; |
| }; |
| |
| dvb_s_ts0_pins: dvb_s_ts0_pins { |
| mux_1 { |
| groups = "tsin_a_din0", |
| "tsin_a_clk", |
| "tsin_a_sop", |
| "tsin_a_valid"; |
| function = "tsin_a"; |
| }; |
| |
| mux_2 { |
| groups = "tsout_dout0", |
| "tsout_dout1", |
| "tsout_dout2", |
| "tsout_dout3", |
| "tsout_dout4", |
| "tsout_dout5", |
| "tsout_dout6", |
| "tsout_dout7", |
| "tsout_clk", |
| "tsout_sop", |
| "tsout_valid"; |
| function = "tsout"; |
| }; |
| mux_3 { |
| groups = "tsin_c_din0_z", |
| "tsin_c_din1_z", |
| "tsin_c_din2_z", |
| "tsin_c_din3_z", |
| "tsin_c_din4_z", |
| "tsin_c_din5_z", |
| "tsin_c_din6_z", |
| "tsin_c_din7_z", |
| "tsin_c_clk_z", |
| "tsin_c_sop_z", |
| "tsin_c_valid_z"; |
| function = "tsin_c"; |
| }; |
| }; |
| }; |
| |
| &gpu{ |
| tbl = <&dvfs285_cfg |
| &dvfs400_cfg |
| &dvfs500_cfg |
| &dvfs666_cfg |
| &dvfs800_cfg |
| &dvfs800_cfg>; |
| }; |