| mlogic Meson DWC3 USB SoC controller |
| |
| Required properties: |
| - compatible: depending on the SoC this should contain one of: |
| * amlogic,meson-axg-dwc3 |
| * amlogic,meson-gxl-dwc3 |
| - clocks: a handle for the "USB general" clock |
| - clock-names: must be "usb_general" |
| - resets: a handle for the shared "USB OTG" reset line |
| - reset-names: must be "usb_otg" |
| |
| Required child node: |
| A child node must exist to represent the core DWC3 IP block. The name of |
| the node is not important. The content of the node is defined in dwc3.txt. |
| |
| PHY documentation is provided in the following places: |
| - Documentation/devicetree/bindings/phy/phy-aml-new-usb2-v2.txt |
| - Documentation/devicetree/bindings/phy/phy-aml-new-usb3-v2.txt |
| Example device nodes: |
| usb0: usb@ff500000 { |
| compatible = "amlogic,meson-g12a-dwc3"; |
| status = "disable"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| clocks = <&clkc CLKID_USB>; |
| clock-names = "usb_general"; |
| resets = <&reset RESET_USB>; |
| |
| dwc3: dwc3@ff500000 { |
| compatible = "snps,dwc3"; |
| reg = <0x0 0xff500000 0x0 0x100000>; |
| interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
| dr_mode = "host"; |
| maximum-speed = "high-speed"; |
| snps,dis_u2_susphy_quirk; |
| snps,quirk-frame-length-adjustment; |
| usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>; |
| clocks = <&clkc CLKID_USB>; |
| clock-names = "usb_general"; |
| }; |
| }; |
| |
| |
| dwc2_a: dwc2_a@ff400000 { |
| compatible = "amlogic,dwc2"; |
| status = "disable"; |
| device_name = "dwc2_a"; |
| reg = <0xff400000 0x40000>; |
| interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
| pl-periph-id = <0>; /** lm name */ |
| clock-src = "usb0"; /** clock src */ |
| port-id = <0>; /** ref to mach/usb.h */ |
| port-type = <2>; /** 0: otg, 1: host, 2: slave */ |
| port-speed = <0>; /** 0: default, high, 1: full */ |
| port-config = <0>; /** 0: default */ |
| /*0:default,1:single,2:incr,3:incr4,4:*/ |
| /*incr8,5:incr16,6:disable*/ |
| port-dma = <0>; |
| /** 0: hardware, 1: sw_host, 2: sw_slave*/ |
| port-id-mode = <0>; |
| usb-fifo = <728>; |
| cpu-type = "v2"; |
| phy-reg = <0xffe09000>; |
| phy-reg-size = <0xa0>; |
| /** phy-interface: 0x0: amlogic phy,*/ |
| /*0x1: synopsys phy **/ |
| phy-interface = <0x2>; |
| clocks = <&clkc CLKID_USB>, |
| <&clkc CLKID_USB1_DDR_BRIDGE>; |
| clock-names = "usb_general", |
| "usb1"; |
| }; |