| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| */ |
| |
| /dts-v1/; |
| |
| #include "mesont5d.dtsi" |
| #include "partition_normal_linux.dtsi" |
| #include "mesont5d_am301_linux-panel.dtsi" |
| #include "mesont5_drm.dtsi" |
| |
| / { |
| model = "Amlogic T5D T950X4 AM311 512M"; |
| amlogic-dt-id = "t5d_t950x4_am311-512m"; |
| |
| aliases { |
| serial0 = &uart_B; |
| serial1 = &uart_A; |
| serial2 = &uart_C; |
| //serial3 = &uart_C; |
| //serial4 = &uart_AO_B; |
| tsensor0 = &p_tsensor; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| spi0 = &spifc; |
| spi1 = &spicc0; |
| }; |
| |
| memory@00000000 { |
| device_type = "memory"; |
| linux,usable-memory = <0x0 0x20000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| /* global autoconfigured region for contiguous allocations */ |
| ramoops@0x07400000 { |
| compatible = "ramoops"; |
| reg = <0x07400000 0x00100000>; |
| record-size = <0x20000>; |
| console-size = <0x40000>; |
| ftrace-size = <0x80000>; |
| pmsg-size = <0x10000>; |
| bconsole-size = <0x10000>; |
| }; |
| |
| secmon_reserved: linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x400000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x05000000 0x400000>; |
| }; |
| |
| logo_reserved:linux,meson-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x1f800000 0x800000>; |
| }; |
| |
| lcd_tcon_reserved:linux,lcd_tcon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x1f000000 0x800000>; |
| }; |
| |
| codec_mm_cma:linux,codec_mm_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* yuv420(32x3)96M + di(7x4,11x5)84M + workbuf(12M) |
| * the sum with align 4M then is equal to 192M |
| */ |
| size = <0x7400000>; |
| alignment = <0x400000>; |
| linux,contiguous-region; |
| //alloc-ranges = <0x0 0x1f800000>; |
| }; |
| |
| /* codec shared reserved */ |
| /* codec_mm_reserved:linux,codec_mm_reserved { |
| * compatible = "amlogic, codec-mm-reserved"; |
| * size = <0x0>; |
| * alignment = <0x100000>; |
| * //no-map; |
| * alloc-ranges = <0x0 0x1f000000>; |
| * }; |
| */ |
| |
| ion_cma_reserved:linux,ion-dev { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* device/amlogic/xxx/BoardConfig.mk |
| * |HWC_PRIMARY_FRAMEBUFFER_WIDTH := 1920 |
| * | |HWC_PRIMARY_FRAMEBUFFER_HEIGHT := 1080 |
| * | | |NUM_FRAMEBUFFER_SURFACE_BUFFERS := 3 |
| * size = 1920 * 1080 * 3 * 4(RGBA: 4 bytes/pixel) + 4M(10% * afbc) |
| */ |
| size = <0x02000000>; |
| alignment = <0x400000>; |
| //alloc-ranges = <0x0 0x1f000000>; |
| }; |
| ion_fb_reserved:linux,ion-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x000000>; |
| alignment = <0x400000>; |
| }; |
| |
| /* vdin0 CMA pool */ |
| //vdin0_cma_reserved:linux,vdin0_cma { |
| // compatible = "shared-dma-pool"; |
| // reusable; |
| /* 3840x2160x4x4 ~=128 M */ |
| // size = <0xc400000>; |
| // alignment = <0x400000>; |
| //}; |
| |
| /* vdin1 CMA pool */ |
| //vdin1_cma_reserved:linux,vdin1_cma { |
| // compatible = "shared-dma-pool"; |
| // reusable; |
| /* 420 mode:1280x720x2x4=8MB */ |
| /* 444 mode:1280x720x3x4=12MB */ |
| // size = <0x800000>; |
| // alignment = <0x400000>; |
| // alloc-ranges = <0x0 0x1f000000>; |
| //}; |
| |
| /* demod_reserved:linux,demod { |
| * compatible = "amlogic, demod-mem"; |
| * size = <0x6400000>; //8M //100m 0x6400000 |
| * alloc-ranges = <0x0 0x30000000>; |
| * //multi-use; |
| * //no-map; |
| * }; |
| */ |
| |
| demod_cma_reserved:linux,demod_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 36M */ |
| size = <0x2400000>; |
| alignment = <0x400000>; |
| //alloc-ranges = <0x0 0x1f000000>; |
| }; |
| |
| /*di CMA pool */ |
| di_cma_reserved:linux,di_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* buffer_size = 3621952(yuv422 8bit) |
| * | 4736064(yuv422 10bit) |
| * | 4074560(yuv422 10bit full pack mode) |
| * 10x3621952=34.6M(0x23) support 8bit |
| * 10x4736064=45.2M(0x2e) support 12bit |
| * 10x4074560=40M(0x28) support 10bit |
| */ |
| //size = <0x7800000>; |
| alignment = <0x400000>; |
| }; |
| |
| /* for hdmi rx emp use */ |
| /*hdmirx_emp_cma_reserved:linux,emp_cma {*/ |
| /*compatible = "shared-dma-pool";*/ |
| /*linux,phandle = <5>;*/ |
| /*reusable;*/ |
| /* 4M for emp to ddr */ |
| /* 32M for tmds to ddr */ |
| /*size = <0x8000>;*/ |
| /*alignment = <0x400000>;*/ |
| /*};*/ |
| |
| /* POST PROCESS MANAGER */ |
| ppmgr_reserved:linux,ppmgr { |
| compatible = "amlogic, ppmgr_memory"; |
| size = <0x0>; |
| }; |
| |
| picdec_cma_reserved:linux,picdec { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0>; |
| alignment = <0x0>; |
| linux,contiguous-region; |
| }; |
| }; /* end of reserved-memory */ |
| galcore { |
| status = "disabled"; |
| }; |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| status = "okay"; |
| //memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| memory-region = <&codec_mm_cma>; |
| }; |
| |
| picdec { |
| compatible = "amlogic, picdec"; |
| memory-region = <&picdec_cma_reserved>; |
| dev_name = "picdec"; |
| status = "okay"; |
| }; |
| |
| ppmgr { |
| compatible = "amlogic, ppmgr"; |
| memory-region = <&ppmgr_reserved>; |
| status = "okay"; |
| }; |
| |
| multi-di { |
| //status = "okay"; |
| /*************************************************** |
| * memory: default is 4 |
| * 0:use reserved; |
| * 1:use cma; |
| * 2:use cma as reserved |
| * 4:use codec mem |
| ***************************************************/ |
| //flag_cma = <4>;//t5d unsupport 4K,di 1CH need 42M |
| //memory-region = <&di_cma_reserved>; |
| /*************************************************** |
| * clock-range: <min max> |
| * default: <334 334> |
| ***************************************************/ |
| //clock-range = <334 334>; |
| /*************************************************** |
| * en_4k: t5d not support 4k |
| ***************************************************/ |
| //en_4k = <0>; |
| //keep_dec_vf = <0>; |
| //po_fmt = <0>; |
| /*************************************************** |
| * post_nub: default is 9 |
| ***************************************************/ |
| //post_nub = <9>; |
| }; |
| |
| aml_dtv_demod { |
| compatible = "amlogic, ddemod-t5d-revB"; |
| dev_name = "aml_dtv_demod"; |
| status = "okay"; |
| diseqc_name = "sgm_41286"; |
| pinctrl-names="if_agc_pins", "diseqc", "rf_agc_pins"; |
| pinctrl-0=<&dtvdemod_if_agc_pins>; |
| pinctrl-1=<&diseqc_out>; |
| pinctrl-2=<&dtvdemod_rf_agc_pins>; |
| lnb_en-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>; |
| lnb_sel-gpios = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>; |
| interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "demod_isr"; |
| |
| power-domains = <&pwrdm PDID_T5_DEMOD>; |
| clocks = <&clkc CLKID_DAC_CLK>; |
| clock-names = "vdac_clk_gate"; |
| |
| reg = <0xff670000 0x10000 /*dtv demod base*/ |
| 0xff646000 0x2000 /*hiu reg base*/ |
| 0xff800000 0x1000 /*io_aobus_base*/ |
| 0xffd01000 0x1000 /*reset*/ |
| >; |
| |
| dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? |
| spectrum = <1>; |
| cma_flag = <1>; |
| cma_mem_size = <8>; |
| memory-region = <&demod_cma_reserved>;//<&demod_reserved>; |
| }; |
| |
| /* Audio Related start */ |
| auge_sound { |
| compatible = "amlogic, auge-sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| |
| avout_mute-gpios = <&gpio_ao GPIOD_6 GPIO_ACTIVE_HIGH>; |
| |
| interrupts = <GIC_SPI 235 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "audio_exception64"; |
| |
| aml-audio-card,dai-link@0 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdma>; |
| frame-master = <&tdma>; |
| /* slave mode */ |
| /* |
| * bitclock-master = <&tdmacodec>; |
| * frame-master = <&tdmacodec>; |
| */ |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-pcm"; |
| tdmacpu: cpu { |
| sound-dai = <&tdma>; |
| dai-tdm-slot-tx-mask = |
| <1 1>; |
| dai-tdm-slot-rx-mask = |
| <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmacodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@1 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmb>; |
| frame-master = <&tdmb>; |
| /* slave mode */ |
| //bitclock-master = <&tdmbcodec>; |
| //frame-master = <&tdmbcodec>; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&tdmb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmbcodec: codec { |
| prefix-names = "AMP"; |
| sound-dai = <&tas5805 &acodec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@2 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmc>; |
| frame-master = <&tdmc>; |
| /* slave mode */ |
| //bitclock-master = <&tdmccodec>; |
| //frame-master = <&tdmccodec>; |
| /* suffix-name, sync with android audio hal used for */ |
| //suffix-name = "alsaPORT-tdm"; |
| cpu { |
| sound-dai = <&tdmc>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmccodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@3 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-pdm"; |
| cpu { |
| sound-dai = <&pdm>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@4 { |
| mclk-fs = <128>; |
| continuous-clock; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-spdif"; |
| cpu { |
| sound-dai = <&spdifa>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@5 { |
| mclk-fs = <128>; |
| suffix-name = "alsaPORT-spdifb"; |
| cpu { |
| sound-dai = <&spdifb>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@6 { |
| mclk-fs = <256>; |
| suffix-name = "alsaPORT-tv"; |
| cpu { |
| sound-dai = <&extn>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@7 { |
| mclk-fs = <256>; |
| continuous-clock; |
| suffix-name = "alsaPORT-loopback"; |
| cpu { |
| sound-dai = <&loopbacka>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| }; |
| /* Audio Related end */ |
| |
| dvb-extern { |
| compatible = "amlogic, dvb-extern"; |
| dev_name = "dvb-extern"; |
| status = "okay"; |
| |
| fe_num = <1>; |
| fe0_demod = "internal"; |
| |
| tuner_num = <2>; /* tuner number, multi tuner support */ |
| tuner0_name = "mxl661_tuner"; |
| tuner0_i2c_adap = <&i2c0>; |
| tuner0_i2c_addr = <0x60>; |
| tuner0_xtal = <1>; /* 0: 16MHz, 1: 24MHz */ |
| tuner0_xtal_mode = <3>; |
| /* NO_SHARE_XTAL(0) |
| * SLAVE_XTAL_SHARE(3) |
| */ |
| tuner0_xtal_cap = <25>; |
| |
| tuner1_name = "rt710_tuner"; |
| tuner1_i2c_adap = <&i2c0>; |
| tuner1_i2c_addr = <0xF4>; |
| tuner1_xtal = <0>; /* 0: 16MHz, 1: 24MHz */ |
| tuner1_xtal_mode = <0>; |
| /* NO_SHARE_XTAL(0) |
| * SLAVE_XTAL_SHARE(3) |
| */ |
| tuner1_xtal_cap = <25>; |
| }; |
| |
| dvb-demux { |
| compatible = "amlogic, dvb-demux"; |
| dev_name = "dvb-demux"; |
| status = "okay"; |
| |
| dmx = <&demux>; |
| key_endia = <1>; |
| add_s2p2 = <1>; |
| add_ts_in = <1>; |
| add_asyncfifo = <1>; |
| |
| /*"parallel","serial","disable"*/ |
| ts2 = "parallel"; |
| ts2_control = <0>; |
| ts2_invert = <0>; |
| |
| clocks = <&clkc CLKID_DEMUX |
| &clkc CLKID_AHB_ARB0 |
| &clkc CLKID_PARSER0>; |
| clock-names = "demux", "ahbarb0", "parser_top"; |
| }; |
| |
| tvafe_avin_detect { |
| compatible = "amlogic, t5d_tvafe_avin_detect"; |
| status = "okay"; |
| device_mask = <1>;/*bit0:ch1;bit1:ch2*/ |
| interrupts = <0 12 1>, |
| <0 13 1>; |
| }; |
| |
| amlvecm { |
| compatible = "amlogic, vecm-t5d"; |
| dev_name = "aml_vecm"; |
| status = "okay"; |
| gamma_en = <1>;/*1:enabel ;0:disable*/ |
| wb_en = <1>;/*1:enabel ;0:disable*/ |
| cm_en = <1>;/*1:enabel ;0:disable*/ |
| wb_sel = <0>;/*1:mtx ;0:gainoff*/ |
| hist_sel = <1>;/*1:vd2 ;0:vd1*/ |
| vlock_en = <1>;/*1:enable;0:disable*/ |
| vlock_mode = <0x8>; |
| /* vlock work mode: |
| *bit0:auto ENC |
| *bit1:auto PLL |
| *bit2:manual PLL |
| *bit3:manual ENC |
| *bit4:manual soft ENC |
| *bit5:manual MIX PLL ENC |
| */ |
| vlock_pll_m_limit = <1>; |
| vlock_line_limit = <2>; |
| clocks = <&peripheral_clkc CLKID_VID_LOCK_CLK>; |
| clock-names = "cts_vid_lock_clk"; |
| interrupts = <0 87 1>; |
| interrupt-names = "lc_curve"; |
| }; |
| |
| vdin@0 { |
| compatible = "amlogic, vdin-t5d"; |
| /*memory-region = <&vdin0_cma_reserved>;*/ |
| status = "okay"; |
| /*bit0:(1:share with codec_mm;0:cma alone) |
| *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
| */ |
| flag_cma = <0x101>; |
| /*MByte, if 10bit disable: 64M(YUV422), |
| *if 10bit enable: 64*1.5 = 96M(YUV422) |
| *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M |
| *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M |
| *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M |
| *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M |
| *worst case:(4096*2160*4 + 2M(afbce issue)) *6buf = 214.5M |
| */ |
| cma_size = <80>; |
| frame_buff_num = <10>; |
| interrupts = <0 83 1>; |
| rdma-irq = <2>; |
| /*clocks = <&clkc CLKID_FCLK_DIV5>, |
| * <&clkc CLKID_VDIN_MEAS_COMP>; |
| *clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| */ |
| vdin_id = <0>; |
| clocks = <&clkc CLKID_FCLK_DIV5>, |
| <&peripheral_clkc CLKID_VDIN_MEAS_GATE>; |
| clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| /*vdin write mem color depth support: |
| * bit0:support 8bit |
| * bit1:support 9bit |
| * bit2:support 10bit |
| * bit3:support 12bit |
| * bit4:support yuv422 10bit full pack mode (from txl new add) |
| * bit5:force yuv422 to yuv444 malloc (for vdin0 debug) |
| * bit8:use 8bit at 4k_50/60hz_10bit |
| * bit9:use 10bit at 4k_50/60hz_10bit |
| */ |
| tv_bit_mode = <0x235>; |
| /* afbce_bit_mode: (amlogic frame buff compression encoder) |
| * bit0 -- enable afbce |
| * bit1 -- enable afbce compression-lossy |
| * bit4 -- afbce for 4k |
| * bit5 -- afbce for 1080p |
| * bit6 -- afbce for 720p |
| * bit7 -- afbce for smaller resolution |
| */ |
| afbce_bit_mode = <0x11>; |
| /*urgent_en*/ |
| double_write_en; |
| /* secure_en; */ |
| v4l_support_en; |
| }; |
| |
| vdin@1 { |
| compatible = "amlogic, vdin-t5d"; |
| /*memory-region = <&vdin1_cma_reserved>;*/ |
| status = "disabled"; |
| /*bit0:(1:share with codec_mm;0:cma alone) |
| *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
| */ |
| flag_cma = <0>; |
| interrupts = <0 85 1>; |
| rdma-irq = <4>; |
| /*clocks = <&clkc CLKID_FCLK_DIV5>, |
| * <&clkc CLKID_VDIN_MEAS_COMP>; |
| *clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| */ |
| vdin_id = <1>; |
| /*vdin write mem color depth support: |
| *bit0:support 8bit |
| *bit1:support 9bit |
| *bit2:support 10bit |
| *bit3:support 12bit |
| */ |
| tv_bit_mode = <0x15>; |
| /*urgent_en*/ |
| }; |
| |
| tvafe { |
| compatible = "amlogic, tvafe-t5d"; |
| /*memory-region = <&tvafe_cma_reserved>;*/ |
| status = "okay"; |
| flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ |
| cma_size = <5>;/*MByte*/ |
| reg = <0xff654000 0x2000>;/*tvafe reg base*/ |
| reserve-iomap = "true"; |
| tvafe_id = <0>; |
| //pinctrl-names = "default"; |
| /*!!particular sequence, no more and no less!!!*/ |
| tvafe_pin_mux = < |
| 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ |
| 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ |
| 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ |
| 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ |
| >; |
| clocks = <&clkc CLKID_DAC_CLK>; |
| clock-names = "vdac_clk_gate"; |
| |
| cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */ |
| cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */ |
| }; |
| |
| vbi { |
| compatible = "amlogic, vbi"; |
| status = "okay"; |
| interrupts = <0 83 1>; |
| }; |
| |
| cvbsout { |
| compatible = "amlogic, cvbsout-t5d"; |
| status = "okay"; |
| clocks = <&clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_DAC_CLK>; |
| clock-names = "venci_top_gate", |
| "venci_0_gate", |
| "venci_1_gate", |
| "vdac_clk_gate"; |
| /* clk path */ |
| /* 0:vid_pll vid2_clk */ |
| /* 1:gp0_pll vid2_clk */ |
| /* 2:vid_pll vid1_clk */ |
| /* 3:gp0_pll vid1_clk */ |
| clk_path = <0>; |
| |
| /* performance: reg_address, reg_value */ |
| /* tm2 */ |
| performance = <0x1bf0 0x9 |
| 0x1b56 0x333 |
| 0x1b12 0x8080 |
| 0x1b05 0xfd |
| 0x1c59 0xf850 |
| 0xffff 0x0>; /* ending flag */ |
| performance_sarft = <0x1bf0 0x9 |
| 0x1b56 0x333 |
| 0x1b12 0x0 |
| 0x1b05 0x9 |
| 0x1c59 0xfc48 |
| 0xffff 0x0>; /* ending flag */ |
| performance_revB_telecom = <0x1bf0 0x9 |
| 0x1b56 0x546 |
| 0x1b12 0x8080 |
| 0x1b05 0x9 |
| 0x1c59 0xf850 |
| 0xffff 0x0>; /* ending flag */ |
| }; |
| |
| /* for external keypad */ |
| adc_keypad { |
| compatible = "amlogic, adc_keypad"; |
| status = "okay"; |
| key_name = "power","vol-","vol+","enter","menu","source","exit"; |
| key_num = <7>; |
| io-channels = <&saradc SARADC_CH1>,<&saradc SARADC_CH2>; |
| io-channel-names = "key-chan-1", "key-chan-2"; |
| key_chan = <SARADC_CH1 SARADC_CH1 SARADC_CH1 SARADC_CH1 |
| SARADC_CH2 SARADC_CH2 SARADC_CH2>; |
| key_code = <116 114 115 28 139 466 174>; |
| key_val = <0 143 266 389 0 143 266>; //val=voltage/1800mV*1023 |
| key_tolerance = <40 40 40 40 40 40 40>; |
| }; |
| |
| provisionkey { |
| compatible = "amlogic, provisionkey"; |
| status = "okay"; |
| key-permit-default = "write"; |
| //new key not need add dts if started with KEY_PROVISION_ |
| KEY_PROVISION_XXX { }; |
| //test_my_added_keyname { }; |
| };//End provisionkey |
| |
| unifykey { |
| compatible = "amlogic,unifykey"; |
| status = "okay"; |
| |
| unifykey-num = <25>; |
| unifykey-index-0 = <&keysn_0>; |
| unifykey-index-1 = <&keysn_1>; |
| unifykey-index-2 = <&keysn_2>; |
| unifykey-index-3 = <&keysn_3>; |
| unifykey-index-4 = <&keysn_4>; |
| unifykey-index-5 = <&keysn_5>; |
| unifykey-index-6 = <&keysn_6>; |
| unifykey-index-7 = <&keysn_7>; |
| unifykey-index-8 = <&keysn_8>; |
| unifykey-index-9 = <&keysn_9>; |
| unifykey-index-10= <&keysn_10>; |
| unifykey-index-11 = <&keysn_11>; |
| unifykey-index-12 = <&keysn_12>; |
| unifykey-index-13 = <&keysn_13>; |
| unifykey-index-14 = <&keysn_14>; |
| unifykey-index-15 = <&keysn_15>; |
| unifykey-index-16 = <&keysn_16>; |
| unifykey-index-17 = <&keysn_17>; |
| unifykey-index-18 = <&keysn_18>; |
| unifykey-index-19 = <&keysn_19>; |
| unifykey-index-20 = <&keysn_20>; |
| unifykey-index-21 = <&keysn_21>; |
| unifykey-index-22 = <&keysn_22>; |
| unifykey-index-23 = <&keysn_23>; |
| unifykey-index-24 = <&keysn_24>; |
| |
| keysn_0: key_0{ |
| key-name = "usid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_1:key_1{ |
| key-name = "mac"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_2:key_2{ |
| key-name = "hdcp"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_3:key_3{ |
| key-name = "secure_boot_set"; |
| key-device = "efuse"; |
| key-permit = "write"; |
| }; |
| keysn_4:key_4{ |
| key-name = "mac_bt"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_5:key_5{ |
| key-name = "mac_wifi"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_6:key_6{ |
| key-name = "hdcp2_tx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_7:key_7{ |
| key-name = "hdcp2_rx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_8:key_8{ |
| key-name = "widevinekeybox"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_9:key_9{ |
| key-name = "deviceid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_10:key_10{ |
| key-name = "hdcp22_fw_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_11:key_11{ |
| key-name = "hdcp22_rx_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_12:key_12{ |
| key-name = "hdcp22_rx_fw"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_13:key_13{ |
| key-name = "hdcp14_rx"; |
| key-device = "normal"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_14:key_14{ |
| key-name = "prpubkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_15:key_15{ |
| key-name = "prprivkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_16:key_16{ |
| key-name = "lcd"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_17:key_17{ |
| key-name = "lcd_extern"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_18:key_18{ |
| key-name = "backlight"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_19:key_19{ |
| key-name = "lcd_tcon"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_20:key_20{ |
| key-name = "attestationkeybox";// attestation key |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_21:key_21{ |
| key-name = "lcd_tcon_spi"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_22:key_22{ |
| key-name = "attestationdevidbox";// attest dev id box |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_23:key_23{ |
| key-name = "oemkey"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_24:key_24{ |
| key-name = "lcd_optical"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| }; /* End unifykey */ |
| |
| vdetect { |
| compatible = "amlogic, vdetect"; |
| dev_name = "vdetect"; |
| status = "okay"; |
| }; |
| |
| amlvideo2_0 { |
| compatible = "amlogic, amlvideo2"; |
| dev_name = "amlvideo2"; |
| status = "okay"; |
| amlvideo2_id = <0>; |
| cma_mode = <1>; |
| }; |
| |
| amlvideo2_1 { |
| compatible = "amlogic, amlvideo2"; |
| dev_name = "amlvideo2"; |
| status = "okay"; |
| amlvideo2_id = <1>; |
| cma_mode = <1>; |
| }; |
| |
| hdmirx { |
| compatible = "amlogic, hdmirx_t5d"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| /*memory-region = <&hdmirx_emp_cma_reserved>;*/ |
| status = "okay"; |
| pinctrl-names = "hdmirx_pins"; |
| pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux |
| &hdmirx_c_mux>; |
| repeat = <0>; |
| /* bit 4: tdr enable |
| * bit [3:0]: tdr level control |
| */ |
| term_lvl = <0x10>; |
| interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&peripheral_clkc CLKID_HDMIRX_MODET_GATE>, |
| <&peripheral_clkc CLKID_HDMIRX_CFG_GATE>, |
| <&peripheral_clkc CLKID_HDMIRX_ACR_GATE>, |
| <&peripheral_clkc CLKID_HDMIRX_METER_GATE>, |
| <&peripheral_clkc CLKID_HDMI_AXI_GATE>, |
| <&xtal>, |
| <&clkc CLKID_FCLK_DIV3>, |
| <&clkc CLKID_FCLK_DIV5>, |
| <&clkc CLKID_FCLK_DIV7>, |
| <&peripheral_clkc CLKID_HDCP22_SKP_GATE>, |
| <&peripheral_clkc CLKID_HDCP22_ESM_GATE>; |
| //<&clkc CLK_AUD_PLL2FS>, |
| //<&clkc CLK_AUD_PLL4FS>, |
| //<&clkc CLK_AUD_OUT>; |
| clock-names = "hdmirx_modet_clk", |
| "hdmirx_cfg_clk", |
| "hdmirx_acr_ref_clk", |
| "cts_hdmirx_meter_clk", |
| "cts_hdmi_axi_clk", |
| "xtal", |
| "fclk_div3", |
| "fclk_div5", |
| "fclk_div7", |
| "hdcp_rx22_skp", |
| "hdcp_rx22_esm"; |
| //"hdmirx_aud_pll2fs", |
| //"hdmirx_aud_pll4f", |
| //"clk_aud_out"; |
| hdmirx_id = <0>; |
| en_4k_2_2k = <0>; |
| en_4k_timing = <0>; |
| hpd_low_cec_off = <1>; |
| arc_port = <1>; |
| /* bit4: enable feature, bit3~0: port number */ |
| disable_port = <0x0>; |
| hdcp_tee_path = <1>; |
| /* MAP_ADDR_MODULE_CBUS */ |
| /* MAP_ADDR_MODULE_HIU */ |
| /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */ |
| /* MAP_ADDR_MODULE_SEC_AHB */ |
| /* MAP_ADDR_MODULE_SEC_AHB2 */ |
| /* MAP_ADDR_MODULE_APB4 */ |
| /* MAP_ADDR_MODULE_TOP */ |
| /* MAP_ADDR_MODULE_CLK_CTRL */ |
| reg = < 0x0 0x0 |
| 0xff63C000 0x2000 |
| 0xffe0d000 0x2000 |
| 0x0 0x0 |
| 0x0 0x0 |
| 0x0 0x0 |
| 0xff610000 0xffff |
| 0xff646000 0x1fff>; |
| }; |
| |
| amhdmitx: amhdmitx { |
| compatible = "amlogic, amhdmitx"; |
| dev_name = "amhdmitx"; |
| status = "disabled"; |
| repeater_tx = <0x0>; |
| }; |
| |
| aocec: aocec { |
| compatible = "amlogic, aocec-t5d"; |
| /*device_name = "aocec";*/ |
| status = "okay"; |
| vendor_name = "Amlogic"; /* Max Chars: 8 */ |
| /* Refer to the following URL at: |
| * http://standards.ieee.org/develop/regauth/oui/oui.txt |
| */ |
| vendor_id = <0xffffff>; |
| product_desc = "t5d"; /* Max Chars: 16 */ |
| cec_osd_string = "AML_TV"; /* Max Chars: 14 */ |
| port_num = <4>; |
| ee_cec; |
| /*cec_sel = <2>;*/ |
| output = <1>; /*output port number*/ |
| arc_port_mask = <0x2>; |
| interrupts = <0 203 1>; |
| interrupt-names = "hdmi_aocecb"; |
| pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; |
| pinctrl-0=<&aocecb_mux>; |
| pinctrl-1=<&aocecb_mux>; |
| pinctrl-2=<&aocecb_mux>; |
| clocks = <&clkc_AO CLKID_CECB_32K_CLKOUT>; |
| clock-names = "cecb_clk"; |
| reg = <0xFF80023c 0x4 |
| 0xFF800000 0x400>; |
| reg-names = "ao_exit","ao"; |
| }; |
| |
| atv-demod { |
| compatible = "amlogic, atv-demod"; |
| status = "okay"; |
| btsc_sap_mode = <1>; |
| interrupts = <0 236 1>; |
| /* pinctrl-names="atvdemod_agc_pins"; */ |
| /* pinctrl-0=<&atvdemod_agc_pins>; */ |
| reg = <0xff656000 0x2000 /* demod reg */ |
| 0xff646000 0x2000 /* hiu reg */ |
| 0xff634400 0x400 /* periphs reg */ |
| 0xff64a000 0x2000>; /* audio reg */ |
| reg_23cf = <0x88188832>; |
| /*default:0x88188832;r840 on haier:0x48188832*/ |
| }; |
| |
| /* |
| * sd_emmc_b: sdio@ffe05000 { |
| * status = "disabled"; |
| * compatible = "amlogic, meson-mmc-t5"; |
| * reg = <0xffe05000 0x800>; |
| * interrupts = <0 190 4>; |
| * |
| * pinctrl-names = "sdio_all_pins", |
| * "sdio_clk_cmd_pins"; |
| * pinctrl-0 = <&sdio_all_pins>; |
| * pinctrl-1 = <&sdio_clk_cmd_pins>; |
| * |
| * clocks = <&clkc CLKID_SD_EMMC_B>, |
| * <&clkc CLKID_SD_EMMC_B_P0_COMP>, |
| * <&clkc CLKID_FCLK_DIV2>, |
| * <&clkc CLKID_FCLK_DIV5>, |
| * <&xtal>; |
| * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
| * |
| * bus-width = <4>; |
| * cap-sd-highspeed; |
| * cap-mmc-highspeed; |
| * max-frequency = <100000000>; |
| * disable-wp; |
| * sdio { |
| * pinname = "sdio"; |
| * ocr_avail = <0x200080>; |
| * caps = "MMC_CAP_4_BIT_DATA", |
| * "MMC_CAP_MMC_HIGHSPEED", |
| * "MMC_CAP_SD_HIGHSPEED", |
| * "MMC_CAP_NONREMOVABLE", |
| * "MMC_CAP_UHS_SDR12", |
| * "MMC_CAP_UHS_SDR25", |
| * "MMC_CAP_UHS_SDR50", |
| * "MMC_CAP_UHS_SDR104", |
| * "MMC_PM_KEEP_POWER", |
| * "MMC_CAP_SDIO_IRQ"; |
| * f_min = <400000>; |
| * f_max = <200000000>; |
| * max_req_size = <0x20000>; |
| * card_type = <3>; |
| * }; |
| * }; |
| */ |
| |
| sd_emmc_b: sd@ffe05000 { |
| status = "disabled"; |
| compatible = "amlogic, meson-mmc-t5"; |
| reg = <0xffe05000 0x800>; |
| interrupts = <0 190 1>; |
| |
| pinctrl-names = "sd_all_pins", |
| "sd_clk_cmd_pins", |
| "sd_1bit_pins"; |
| pinctrl-0 = <&sd_all_pins>; |
| pinctrl-1 = <&sd_clk_cmd_pins>; |
| pinctrl-2 = <&sd_1bit_pins>; |
| |
| /*clocks = <&clkc CLKID_SD_EMMC_B>, |
| * <&clkc CLKID_SD_EMMC_B_P0_COMP>, |
| * <&clkc CLKID_FCLK_DIV2>, |
| * <&clkc CLKID_FCLK_DIV5>, |
| * <&xtal>; |
| *clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
| */ |
| |
| bus-width = <4>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| max-frequency = <100000000>; |
| disable-wp; |
| sd { |
| pinname = "sd"; |
| ocr_avail = <0x200080>; |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED"; |
| // "MMC_CAP_NONREMOVABLE"; /**ptm debug */ |
| f_min = <400000>; |
| f_max = <200000000>; |
| max_req_size = <0x20000>; |
| no_sduart = <1>; |
| //gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>; |
| //jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>; |
| //gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>; |
| card_type = <5>; |
| }; |
| }; |
| |
| }; /* end of / */ |
| |
| &i2c0 { |
| status = "okay"; |
| clock-frequency = <300000>; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c0_z_pins>; |
| }; |
| |
| &pinctrl_audio { |
| tdm_d0_pins: tdm_d0_pin { |
| mux { |
| groups = "tdm_d0"; |
| function = "tdmoutb_lane0"; |
| }; |
| }; |
| |
| tdm_clk_pins: tdm_clk_pin { |
| mux { |
| groups = "tdm_sclk0", "tdm_lrclk0"; |
| function = "tdm_clk_outb"; |
| }; |
| }; |
| }; |
| |
| &audiobus { |
| tdma:tdm@0 { |
| compatible = "amlogic, t5-snd-tdma"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-slot-mask-in = <1 0>; |
| dai-tdm-lane-slot-mask-out = <1 1>; |
| dai-tdm-clk-sel = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
| &clkc CLKID_MPLL0>; |
| clock-names = "mclk", "clk_srcpll"; |
| |
| /* enable control gain */ |
| ctrl_gain = <1>; |
| |
| status = "okay"; |
| }; |
| |
| tdmb:tdm@1 { |
| compatible = "amlogic, t5-snd-tdmb"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 1 1 1>; |
| dai-tdm-clk-sel = <1>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| &clkaudio CLKID_AUDIO_MCLK_PAD0 |
| &clkc CLKID_MPLL1>; |
| clock-names = "mclk", "mclk_pad", "clk_srcpll"; |
| |
| /* |
| * 0: tdmout_a; |
| * 1: tdmout_b; |
| * 2: tdmout_c; |
| * 3: spdifout; |
| * 4: spdifout_b; |
| */ |
| samesource_sel = <3>; |
| |
| pinctrl-names = "tdm_pins","tdmout_a_gpio"; |
| pinctrl-0 = <&mclk_1_pins |
| &tdmout_b_pins |
| &tdm_d0_pins |
| &tdm_clk_pins>; |
| pinctrl-1 = <&tdmout_a_gpio>; |
| |
| /* In for ACODEC_ADC */ |
| tdmin-src-name = "acodec_adc"; |
| /*enable default mclk(12.288M), before extern codec start*/ |
| start_clk_enable = <1>; |
| |
| /*tdm clk tuning enable*/ |
| clk_tuning_enable = <1>; |
| |
| /* enable control gain */ |
| ctrl_gain = <1>; |
| |
| status = "okay"; |
| |
| /* !!!For --TV platform-- ONLY */ |
| Channel_Mask { |
| /*i2s has 4 pins, 8channel, mux output*/ |
| Spdif_samesource_Channel_Mask = "i2s_2/3"; |
| }; |
| }; |
| |
| tdmc:tdm@2 { |
| compatible = "amlogic, t5-snd-tdmc"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
| dai-tdm-clk-sel = <2>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
| &clkc CLKID_MPLL2>; |
| clock-names = "mclk", "clk_srcpll"; |
| |
| /* enable control gain */ |
| ctrl_gain = <1>; |
| |
| status = "okay"; |
| }; |
| |
| pdm:pdm { |
| compatible = "amlogic, tm2-snd-pdm"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
| &clkc CLKID_FCLK_DIV3 |
| &clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_PDMIN0 |
| &clkaudio CLKID_AUDIO_PDMIN1>; |
| clock-names = "gate", |
| "sysclk_srcpll", |
| "dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk"; |
| |
| pinctrl-names = "pdm_pins"; |
| pinctrl-0 = <&pdmin>; |
| |
| /* mode 0~4, defalut:1 */ |
| filter_mode = <1>; |
| |
| status = "okay"; |
| }; |
| |
| spdifa:spdif@0 { |
| compatible = "amlogic, tm2-revb-snd-spdif-a"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkc CLKID_MPLL0 |
| &clkc CLKID_FCLK_DIV4 |
| &clkaudio CLKID_AUDIO_GATE_SPDIFIN |
| &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A |
| &clkaudio CLKID_AUDIO_SPDIFIN |
| &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
| clock-names = "sysclk", "fixed_clk", "gate_spdifin", |
| "gate_spdifout", "clk_spdifin", "clk_spdifout"; |
| |
| interrupts = |
| <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_spdifin"; |
| |
| pinctrl-names = "spdif_pins", |
| "spdif_pins_mute"; |
| pinctrl-0 = <&spdifout_a>; |
| pinctrl-1 = <&spdifout_a_mute>; |
| |
| samesource_sel = <4>; |
| |
| /*spdif clk tuning enable*/ |
| clk_tuning_enable = <1>; |
| status = "okay"; |
| }; |
| |
| spdifb:spdif@1 { |
| compatible = "amlogic, tm2-revb-snd-spdif-b"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkc CLKID_MPLL2 /*CLKID_HIFI_PLL*/ |
| &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B |
| &clkaudio CLKID_AUDIO_SPDIFOUT_B>; |
| clock-names = "sysclk", |
| "gate_spdifout", "clk_spdifout"; |
| pinctrl-names = "spdif_pins", |
| "spdif_pins_mute"; |
| pinctrl-0 = <&spdifout_b>; |
| pinctrl-1 = <&spdifout_b_mute>; |
| |
| status = "okay"; |
| }; |
| |
| extn:extn { |
| compatible = "amlogic, tm2-snd-extn"; |
| #sound-dai-cells = <0>; |
| |
| interrupts = |
| <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_frhdmirx"; |
| |
| status = "okay"; |
| }; |
| |
| aed:effect { |
| compatible = "amlogic, snd-effect-v4"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC |
| &clkc CLKID_FCLK_DIV5 |
| &clkaudio CLKID_AUDIO_EQDRC>; |
| clock-names = "gate", "srcpll", "eqdrc"; |
| |
| /* |
| * 0:tdmout_a |
| * 1:tdmout_b |
| * 2:tdmout_c |
| * 3:spdifout |
| * 4:spdifout_b |
| */ |
| eqdrc_module = <1>; |
| /* max 0xf, each bit for one lane, usually one lane */ |
| lane_mask = <0x1>; |
| /* max 0xff, each bit for one channel */ |
| channel_mask = <0xff>; |
| |
| status = "okay"; |
| }; |
| |
| asrca: resample@0 { |
| compatible = "amlogic, t5-resample-a"; |
| clocks = <&clkc CLKID_MPLL1 |
| &clkaudio CLKID_AUDIO_MCLK_B |
| &clkaudio CLKID_AUDIO_RESAMPLE_A>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*same with toddr_src |
| * TDMIN_A, 0 |
| * TDMIN_B, 1 |
| * TDMIN_C, 2 |
| * SPDIFIN, 3 |
| * PDMIN, 4 |
| * FRATV, 5 |
| * TDMIN_LB, 6 |
| * LOOPBACK_A, 7 |
| * FRHDMIRX, 8 |
| * LOOPBACK_B, 9 |
| * SPDIFIN_LB, 10 |
| * EARC_RX, 11 |
| */ |
| resample_module = <8>; |
| |
| status = "okay"; |
| }; |
| |
| asrcb: resample@1 { |
| compatible = "amlogic, t5-resample-b"; |
| clocks = <&clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_MCLK_F |
| &clkaudio CLKID_AUDIO_RESAMPLE_B>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*this resample is only used for loopback_A.*/ |
| |
| status = "disabled"; |
| }; |
| |
| vad:vad { |
| compatible = "amlogic, snd-vad"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD |
| &clkc CLKID_FCLK_DIV5 |
| &clkaudio CLKID_AUDIO_VAD>; |
| clock-names = "gate", "pll", "clk"; |
| |
| interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 47 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_wakeup", "irq_frame_sync"; |
| |
| /* |
| * Data src sel: |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| * 5: loopback_b; |
| * 6: tdmin_lb; |
| * 7: loopback_a; |
| */ |
| src = <4>; |
| |
| /* |
| * deal with hot word in user space or kernel space |
| * 0: in user space |
| * 1: in kernel space |
| */ |
| level = <1>; |
| |
| mic-src = <&pdm>; |
| wakeup_sample_rate = <16000>; |
| |
| status = "okay"; |
| }; |
| |
| loopbacka:loopback@0 { |
| compatible = "amlogic, t5-loopbacka"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
| &clkc CLKID_FCLK_DIV3 |
| &clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_PDMIN0 |
| &clkaudio CLKID_AUDIO_PDMIN1 |
| &clkc CLKID_MPLL0 |
| &clkaudio CLKID_AUDIO_MCLK_A>; |
| clock-names = "pdm_gate", |
| "pdm_sysclk_srcpll", |
| "pdm_dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk", |
| "tdminlb_mpll", |
| "tdminlb_mclk"; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <4>; |
| datain_chmask = <0xf>; |
| /* config which data pin for loopback */ |
| datain-lane-mask-in = <1 1 0 0>; |
| |
| /* calc mclk for datalb */ |
| mclk-fs = <256>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_TDMINA_DIN*, refer to core pinmux |
| * 4: PAD_TDMINB_DIN*, refer to core pinmux |
| * 5: PAD_TDMINC_DIN*, refer to core pinmux |
| * 6: PAD_TDMINA_D*, oe, refer to core pinmux |
| * 7: PAD_TDMINB_D*, oe, refer to core pinmux |
| */ |
| /* if tdmin_lb >= 3, use external loopback */ |
| datalb_src = <1>; |
| datalb_chnum = <2>; |
| datalb_chmask = <0x3>; |
| /* config which data pin as loopback */ |
| datalb-lane-mask-in = <1 0 0 0>; |
| |
| /* define loopack with pdm mic. */ |
| mic-src = <&pdm>; |
| |
| status = "okay"; |
| }; |
| |
| loopbackb:loopback@1 { |
| compatible = "amlogic, t5-loopbackb"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
| &clkc CLKID_FCLK_DIV3 |
| &clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_PDMIN0 |
| &clkaudio CLKID_AUDIO_PDMIN1 |
| &clkc CLKID_MPLL0 |
| &clkaudio CLKID_AUDIO_MCLK_A>; |
| clock-names = "pdm_gate", |
| "pdm_sysclk_srcpll", |
| "pdm_dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk", |
| "tdminlb_mpll", |
| "tdminlb_mclk"; |
| |
| /* calc mclk for datain_lb */ |
| mclk-fs = <256>; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <4>; |
| datain_chmask = <0xf>; |
| /* config which data pin for loopback */ |
| datain-lane-mask-in = <1 0 1 0>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_TDMINA_DIN*, refer to core pinmux |
| * 4: PAD_TDMINB_DIN*, refer to core pinmux |
| * 5: PAD_TDMINC_DIN*, refer to core pinmux |
| * 6: PAD_TDMINA_D*, oe, refer to core pinmux |
| * 7: PAD_TDMINB_D*, oe, refer to core pinmux |
| */ |
| /* if tdmin_lb >= 3, use external loopback */ |
| datalb_src = <1>; |
| datalb_chnum = <2>; |
| datalb_chmask = <0x3>; |
| /* config which data pin as loopback */ |
| datalb-lane-mask-in = <1 0 0 0>; |
| |
| status = "disabled"; |
| }; |
| }; /* end of audiobus */ |
| |
| &pinctrl_periphs { |
| /* audio pin mux */ |
| tdmout_b_pins: tdmout_b_pin { |
| mux { /* GPIOH_15, GPIOH_16, GPIOH_17 */ |
| groups = "tdm_fs1", |
| "tdm_sclk1", |
| "tdm_d0"; |
| function = "tdm"; |
| bias-pull-down; |
| }; |
| }; |
| |
| tdmout_a_gpio: tdmout_a_gpio { |
| mux { /* GPIOH_14, GPIOH_15, GPIOH_16, GPIOH_17 */ |
| groups ="GPIOH_14", |
| "GPIOH_15", |
| "GPIOH_16", |
| "GPIOH_17"; |
| function = "gpio_periphs"; |
| output-low; |
| }; |
| }; |
| |
| pdmin: pdmin { |
| mux { /* GPIOH_19, GPIOH_18 */ |
| groups = "pdm_dclk_h", |
| "pdm_din0_h18"; |
| function = "pdm"; |
| }; |
| }; |
| |
| /* backlight */ |
| bl_pwm_vs_on_pins:bl_pwm_vs_on_pin { |
| mux { |
| groups = "pwm_vs_h12"; |
| function = "pwm_vs"; |
| }; |
| }; |
| bl_pwm_off_pins:bl_pwm_off_pin { |
| mux { |
| groups = "GPIOH_12"; |
| function = "gpio_periphs"; |
| output-low; |
| }; |
| }; |
| bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin { |
| mux { |
| groups = "pwm_vs_h12"; |
| function = "pwm_vs"; |
| }; |
| }; |
| bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin { |
| mux { |
| groups = "pwm_vs_h13"; |
| function = "pwm_vs"; |
| }; |
| }; |
| bl_pwm_combo_off_pins:bl_pwm_combo_off_pin { |
| mux { |
| groups = "GPIOH_12", |
| "GPIOH_13"; |
| function = "gpio_periphs"; |
| output-low; |
| }; |
| }; |
| |
| }; /* end of pinctrl_periphs */ |
| |
| &sd_emmc_c { |
| status = "okay"; |
| pinctrl-names = "default", "clk-gate"; |
| pinctrl-0 = <&emmc_clk_cmd_pins>; |
| pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>; |
| pinctrl-2 = <&emmc_pins_sleep>; |
| |
| bus-width = <8>; |
| cap-mmc-highspeed; |
| //mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| mmc-hs400-1_8v; |
| max-frequency = <200000000>; |
| non-removable; |
| disable-wp; |
| |
| // mmc-pwrseq = <&emmc_pwrseq>; |
| // vmmc-supply = <&vddao_3v3>; |
| // vqmmc-supply = <&vddao_1v8>; |
| }; |
| |
| &spifc { |
| status = "disabled"; |
| spi-nor@0 { |
| status = "disabled"; |
| }; |
| }; |
| |
| &mtd_nand { |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| bl_mode = <1>; |
| fip_copies = <4>; |
| fip_size = <0x200000>; |
| ship_bad_block = <1>; |
| disa_irq_flag = <1>; |
| |
| nand@bootloader { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-ecc-maximize; |
| partition@0 { |
| label = "bootloader"; |
| reg = <0x0 0x00000000>; |
| }; |
| }; |
| nand@normal { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-ecc-maximize; |
| |
| partition@0 { |
| label = "tpl"; |
| reg = <0x0 0x00000000>; |
| }; |
| partition@1 { |
| label = "logo"; |
| reg = <0x0 0x00200000>; |
| }; |
| partition@2 { |
| label = "recovery"; |
| reg = <0x0 0x1000000>; |
| }; |
| partition@3 { |
| label = "boot"; |
| reg = <0x0 0x0F00000>; |
| }; |
| partition@4 { |
| label = "system"; |
| reg = <0x0 0x11800000>; |
| }; |
| partition@5 { |
| label = "data"; |
| reg = <0x0 0xffffffff>; |
| }; |
| }; |
| }; |
| |
| ðmac { |
| status = "okay"; |
| phy-handle = <&internal_ephy>; |
| phy-mode = "rmii"; |
| }; |
| |
| &uart_A { |
| status = "disabled"; |
| }; |
| |
| &crg { |
| status = "okay"; |
| }; |
| |
| &usb2_phy_v2 { |
| status = "okay"; |
| portnum = <3>; |
| }; |
| |
| &usb3_phy_v2 { |
| status = "okay"; |
| portnum = <0>; |
| portconfig-30 = <0>; |
| portconfig-31 = <0>; |
| otg = <0>; |
| }; |
| |
| &dwc2_a { |
| status = "okay"; |
| /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
| controller-type = <1>; |
| }; |
| |
| &spicc0 { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc0_pins_h>; |
| cs-gpios = <&gpio GPIOH_8 0>; |
| spi-nor@0 { |
| compatible = "jedec,spi-nor"; |
| status = "disabled"; |
| reg = <0>; |
| spi-max-frequency = <16000000>; |
| }; |
| }; |
| |
| &meson_fb { |
| status = "disabled"; |
| display_size_default = <1280 720 1280 2160 32>; |
| mem_size = <0x00800000 0xb00000 0x100000 0x100000 0x400000>; |
| logo_addr = "0x1f800000"; |
| mem_alloc = <0>; |
| pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
| }; |
| |
| &drm_vpu { |
| status = "okay"; |
| logo_addr = "0x1f800000"; |
| }; |
| |
| &drm_amhdmitx { |
| status = "disabled"; |
| hdcp = "disabled"; |
| }; |
| |
| &drm_amcvbsout { |
| status = "disabled"; |
| }; |
| |
| &drm_lcd { |
| status = "okay"; |
| }; |
| |
| &saradc { |
| status = "okay"; |
| }; |
| |
| &pwm_ab { |
| status = "okay"; |
| }; |
| |
| &pwm_ef { |
| status = "okay"; |
| }; |
| |
| &vddcpu0 { |
| status = "okay"; |
| }; |
| |
| &efuse { |
| status = "disabled"; |
| }; |
| |
| &lut_dma { |
| status = "disabled"; |
| }; |
| |
| &p_tsensor { |
| status = "okay"; |
| }; |
| |
| &meson_cooldev { |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c1_pins>; |
| |
| lcd_extern_i2c0: lcd_extern_i2c@36 { |
| compatible = "lcd_ext, i2c"; |
| dev_name = "i2c_RT6965"; |
| reg = <0x36>; |
| status = "disabled"; |
| }; |
| |
| tas5805: tas5805@2e { |
| compatible = "ti, tas5805"; |
| #sound-dai-cells = <0>; |
| codec_name = "tas5805"; |
| reg = <0x2e>; |
| reset_pin = <&gpio_ao GPIOD_9 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| }; |
| }; |
| |
| &aml_bt { |
| status = "okay"; |
| power_down_disable = <1>; |
| reset-gpios = <&gpio_ao GPIOD_3 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &aml_wifi{ |
| status = "okay"; |
| power_on-gpios = <&gpio_ao GPIOD_2 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &cma_shrinker { |
| free = <7680 24288 28528 32600 32768 36624>; |
| }; |
