| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2019 BayLibre SAS. All rights reserved. |
| */ |
| |
| /dts-v1/; |
| |
| #include "meson-sm1.dtsi" |
| #include "partition_mbox_ab.dtsi" |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/gpio/meson-g12a-gpio.h> |
| #include "mesonsm1_skt-panel.dtsi" |
| |
| / { |
| compatible = "amlogic,sm1"; |
| model = "AML AC214"; |
| |
| aliases { |
| serial0 = &uart_AO; |
| serial1 = &uart_A; |
| serial2 = &uart_B; |
| serial3 = &uart_C; |
| serial4 = &uart_AO_B; |
| ethernet0 = ðmac; |
| tsensor0 = &p_tsensor; |
| tsensor1 = &d_tsensor; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| i2c4 = &i2c_AO; |
| spi1 = &spicc0; |
| spi2 = &spicc1; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| emmc_pwrseq: emmc-pwrseq { |
| compatible = "mmc-pwrseq-emmc"; |
| reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; |
| }; |
| |
| gpio_keypad{ |
| compatible = "amlogic, gpio_keypad"; |
| status = "okay"; |
| scan_period = <20>; |
| key_num = <4>; |
| key_name = "reset", "A", "B", "C"; |
| key_code = <116 BTN_0 BTN_1 BTN_2>; |
| key-gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH |
| &gpio GPIOH_6 GPIO_ACTIVE_HIGH |
| &gpio GPIOH_7 GPIO_ACTIVE_HIGH |
| &gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; |
| detect_mode = <0>;/*0:polling mode, 1:irq mode*/ |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| |
| bluetooth { |
| label = "sei610:blue:bt"; |
| gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; |
| default-state = "off"; |
| }; |
| |
| sys_led { |
| label = "sys_led"; |
| gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; |
| default-state = "on"; |
| }; |
| }; |
| |
| pwmleds { |
| compatible = "pwm-leds"; |
| status = "disabled"; |
| |
| power { |
| label = "sei610:red:power"; |
| pwms = <&pwm_AO_ab 0 30518 0>; |
| max-brightness = <255>; |
| linux,default-trigger = "default-on"; |
| active-low; |
| }; |
| }; |
| |
| memory@0 { |
| device_type = "memory"; |
| reg = <0x0 0x0 0x0 0x80000000>; |
| }; |
| |
| ao_5v: regulator-ao_5v { |
| compatible = "regulator-fixed"; |
| regulator-name = "AO_5V"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| vin-supply = <&dc_in>; |
| regulator-always-on; |
| }; |
| |
| dc_in: regulator-dc_in { |
| compatible = "regulator-fixed"; |
| regulator-name = "DC_IN"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| emmc_1v8: regulator-emmc_1v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "EMMC_1V8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| vin-supply = <&vddao_3v3>; |
| regulator-always-on; |
| }; |
| |
| vddao_3v3: regulator-vddao_3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDDAO_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&dc_in>; |
| regulator-always-on; |
| }; |
| |
| vddio_ao1v8: regulator-vddio_ao1v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDDIO_AO1V8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| vin-supply = <&vddao_3v3>; |
| regulator-always-on; |
| }; |
| |
| reserved-memory { |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x400000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x05000000 0x0 0x400000>; |
| }; |
| |
| secos_reserved:linux,secos { |
| status = "disable"; |
| compatible = "amlogic, aml_secos_memory"; |
| reg = <0x0 0x05300000 0x0 0x2000000>; |
| no-map; |
| }; |
| |
| logo_reserved:linux,meson-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x800000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x3f800000 0x0 0x800000>; |
| }; |
| |
| ion_cma_reserved:linux,ion-dev { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x6400000>; |
| alignment = <0x0 0x400000>; |
| }; |
| ion_fb_reserved:linux,ion-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 1920x1080x4x3 round up 4M align */ |
| size = <0x0 0x1c00000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| /*di CMA pool */ |
| di_cma_reserved:linux,di_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* buffer_size = 3621952(yuv422 8bit) |
| * | 4736064(yuv422 10bit) |
| * | 4074560(yuv422 10bit full pack mode) |
| * 10x3621952=34.6M(0x23) support 8bit |
| * 10x4736064=45.2M(0x2e) support 12bit |
| * 10x4074560=40M(0x28) support 10bit |
| */ |
| size = <0x0 0x05800000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| /* POST PROCESS MANAGER */ |
| ppmgr_reserved:linux,ppmgr { |
| compatible = "shared-dma-pool"; |
| size = <0x0>; |
| }; |
| |
| codec_mm_cma:linux,codec_mm_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* ion_codec_mm max can alloc size 80M*/ |
| size = <0x0 0x13400000>; |
| alignment = <0x0 0x400000>; |
| linux,contiguous-region; |
| }; |
| |
| /* codec shared reserved */ |
| codec_mm_reserved:linux,codec_mm_reserved { |
| compatible = "amlogic, codec-mm-reserved"; |
| size = <0x0 0x0>; |
| alignment = <0x0 0x100000>; |
| //no-map; |
| }; |
| |
| autocap_reserved:linux,autocap_reserved { |
| compatible = "amlogic, aml_autocap_memory"; |
| status = "disabled"; |
| //size = <0x0 0x4000000>; |
| //alloc-ranges = <0x0 0x40000000 0x0 0x25800000>; |
| }; |
| |
| /* vdin0 CMA pool */ |
| //vdin0_cma_reserved:linux,vdin0_cma { |
| // compatible = "shared-dma-pool"; |
| // reusable; |
| /* 3840x2160x4x4 ~=128 M */ |
| // size = <0x0 0xc400000>; |
| // alignment = <0x0 0x400000>; |
| //}; |
| |
| /* vdin1 CMA pool */ |
| vdin1_cma_reserved:linux,vdin1_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /*keystone need 4 buffers,each has 1920*1080*3 |
| *for keystone, change to 0x1800000(24M) |
| */ |
| size = <0x0 0x1400000>;/*20M*/ |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x30000000 0x0 0x10000000>; |
| }; |
| }; |
| |
| free_reserved { |
| compatible = "amlogic, free_reserved"; |
| memory-region = <&autocap_reserved>; |
| status = "disabled"; |
| }; |
| |
| ppmgr { |
| compatible = "amlogic, ppmgr"; |
| memory-region = <&ppmgr_reserved>; |
| dev_name = "ppmgr"; |
| status = "okay"; |
| }; |
| |
| amlvecm { |
| compatible = "amlogic, vecm"; |
| dev_name = "aml_vecm"; |
| status = "okay"; |
| gamma_en = <0>;/*1:enabel ;0:disable*/ |
| wb_en = <0>;/*1:enabel ;0:disable*/ |
| cm_en = <0>;/*1:enabel ;0:disable*/ |
| }; |
| |
| multi-di { |
| compatible = "amlogic, dim-sm1"; |
| status = "okay"; |
| /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
| flag_cma = <1>; |
| //memory-region = <&di_reserved>; |
| memory-region = <&di_cma_reserved>; |
| interrupts = <0 46 1 |
| 0 40 1>; |
| interrupt-names = "pre_irq", "post_irq"; |
| clocks = <&clkc CLKID_VPU_CLKB_TMP |
| &clkc CLKID_VPU_CLKB |
| &clkc CLKID_VPU>; |
| clock-names = "vpu_clkb_tmp", |
| "vpu_clkb", |
| "vpu_mux"; |
| clock-range = <334 667>; |
| /* buffer-size = <3621952>;(yuv422 8bit) */ |
| buffer-size = <4074560>;/*yuv422 fullpack*/ |
| /* reserve-iomap = "true"; */ |
| /* if enable nr10bit, set nr10bit-support to 1 */ |
| post-wr-support = <1>; |
| nr10bit-support = <1>; |
| nrds-enable = <1>; |
| pps-enable = <1>; |
| }; |
| |
| deinterlace { |
| compatible = "amlogic, deinterlace"; |
| status = "disable"; |
| /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
| flag_cma = <1>; |
| //memory-region = <&di_reserved>; |
| //memory-region = <&di_cma_reserved>; |
| interrupts = <0 46 1 |
| 0 40 1>; |
| interrupt-names = "pre_irq", "post_irq"; |
| clocks = <&clkc CLKID_VPU_CLKB_TMP |
| &clkc CLKID_VPU_CLKB |
| &clkc CLKID_VPU>; |
| clock-names = "vpu_clkb_tmp", |
| "vpu_clkb", |
| "vpu_mux"; |
| clock-range = <334 667>; |
| /* buffer-size = <3621952>;(yuv422 8bit) */ |
| buffer-size = <4074560>;/*yuv422 fullpack*/ |
| /* reserve-iomap = "true"; */ |
| /* if enable nr10bit, set nr10bit-support to 1 */ |
| post-wr-support = <1>; |
| nr10bit-support = <1>; |
| nrds-enable = <1>; |
| pps-enable = <1>; |
| }; |
| |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| dev_name = "codec_mm"; |
| status = "okay"; |
| }; |
| |
| amdolby_vision { |
| compatible = "amlogic, dolby_vision_sm1"; |
| dev_name = "aml_amdolby_vision_driver"; |
| status = "okay"; |
| tv_mode = <0>;/*1:enabel ;0:disable*/ |
| }; |
| |
| auge_sound { |
| compatible = "amlogic, sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| |
| /* Power Amplifier Enable gpio */ |
| //pa-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; |
| |
| aml-audio-card,dai-link@0 { |
| format = "dsp_a"; |
| mclk-fs = <512>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdma>; |
| frame-master = <&tdma>; |
| /* slave mode */ |
| /* |
| * bitclock-master = <&tdmacodec>; |
| * frame-master = <&tdmacodec>; |
| */ |
| suffix-name = "alsaPORT-pcm"; |
| tdmacpu: cpu { |
| sound-dai = <&tdma>; |
| dai-tdm-slot-tx-mask = |
| <1 1 1 1 1 1 1 1>; |
| dai-tdm-slot-rx-mask = |
| <1 1 1 1 1 1 1 1>; |
| dai-tdm-slot-num = <8>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <24576000>; |
| }; |
| tdmacodec: codec { |
| sound-dai = <&dummy_codec &dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@1 { |
| format = "i2s";// "dsp_a"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmb>; |
| frame-master = <&tdmb>; |
| /* slave mode */ |
| //bitclock-master = <&tdmbcodec>; |
| //frame-master = <&tdmbcodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&tdmb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| /* |
| * dai-tdm-slot-tx-mask = |
| * <1 1 1 1 1 1 1 1>; |
| * dai-tdm-slot-rx-mask = |
| * <1 1 1 1 1 1 1 1>; |
| * dai-tdm-slot-num = <8>; |
| */ |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmbcodec: codec { |
| sound-dai = <&amlogic_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@2 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmc>; |
| frame-master = <&tdmc>; |
| /* slave mode */ |
| //bitclock-master = <&tdmccodec>; |
| //frame-master = <&tdmccodec>; |
| /* suffix-name, sync with android audio hal used for */ |
| //suffix-name = "alsaPORT-tdm"; |
| cpu { |
| sound-dai = <&tdmc>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmccodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@3 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pdm-builtinmic"; |
| cpu { |
| sound-dai = <&apdm>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@4 { |
| mclk-fs = <128>; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-spdif"; |
| cpu { |
| sound-dai = <&spdifa>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| /* spdif_b to hdmi, only playback */ |
| aml-audio-card,dai-link@5 { |
| mclk-fs = <128>; |
| continuous-clock; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-spdifb"; |
| cpu { |
| sound-dai = <&spdifb>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| aml-audio-card,dai-link@6 { |
| mclk-fs = <256>; |
| continuous-clock; |
| suffix-name = "alsaPORT-loopback"; |
| cpu { |
| sound-dai = <&loopbacka>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| }; |
| |
| picdec { |
| compatible = "amlogic, picdec"; |
| status = "okay"; |
| }; |
| |
| cvbsout { |
| compatible = "amlogic, cvbsout-sm1"; |
| status = "okay"; |
| clocks = <&clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_DAC_CLK>; |
| clock-names = "venci_top_gate", |
| "venci_0_gate", |
| "venci_1_gate", |
| "vdac_clk_gate"; |
| /* clk path */ |
| /* 0:vid_pll vid2_clk */ |
| /* 1:gp0_pll vid2_clk */ |
| /* 2:vid_pll vid1_clk */ |
| /* 3:gp0_pll vid1_clk */ |
| clk_path = <0>; |
| |
| /* performance: reg_address, reg_value */ |
| /* tm2 */ |
| performance = <0x1bf0 0x9 |
| 0x1b56 0x333 |
| 0x1b12 0x8080 |
| 0x1b05 0xfd |
| 0x1c59 0xf850 |
| 0xffff 0x0>; /* ending flag */ |
| performance_sarft = <0x1bf0 0x9 |
| 0x1b56 0x333 |
| 0x1b12 0x0 |
| 0x1b05 0x9 |
| 0x1c59 0xfc48 |
| 0xffff 0x0>; /* ending flag */ |
| performance_revB_telecom = <0x1bf0 0x9 |
| 0x1b56 0x546 |
| 0x1b12 0x8080 |
| 0x1b05 0x9 |
| 0x1c59 0xf850 |
| 0xffff 0x0>; /* ending flag */ |
| }; |
| |
| cpu_opp_table: opp-table { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp-100000000 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <770000>; |
| }; |
| |
| opp-250000000 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <770000>; |
| }; |
| |
| opp-500000000 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <770000>; |
| }; |
| |
| opp-667000000 { |
| opp-hz = /bits/ 64 <666666666>; |
| opp-microvolt = <790000>; |
| }; |
| |
| opp-1000000000 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <810000>; |
| }; |
| |
| opp-1200000000 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <820000>; |
| }; |
| |
| opp-1404000000 { |
| opp-hz = /bits/ 64 <1404000000>; |
| opp-microvolt = <830000>; |
| }; |
| |
| opp-1512000000 { |
| opp-hz = /bits/ 64 <1500000000>; |
| opp-microvolt = <840000>; |
| }; |
| |
| opp-1608000000 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <870000>; |
| }; |
| |
| opp-1704000000 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <910000>; |
| }; |
| |
| opp-1800000000 { |
| opp-hz = /bits/ 64 <1800000000>; |
| opp-microvolt = <950000>; |
| }; |
| |
| opp-1908000000 { |
| opp-hz = /bits/ 64 <1908000000>; |
| opp-microvolt = <1010000>; |
| }; |
| }; |
| |
| cpufreq-meson { |
| compatible = "amlogic, cpufreq-meson"; |
| status = "okay"; |
| }; |
| |
| dvb-extern { |
| compatible = "amlogic, dvb-extern"; |
| dev_name = "dvb-extern"; |
| status = "okay"; |
| |
| fe_num = <1>; |
| fe0_demod = "cxd2856"; |
| fe0_i2c_adap_id = <&i2c3>; |
| fe0_demod_i2c_addr = <0xD8>; |
| fe0_reset_value = <0>; |
| fe0_reset_gpio = <&gpio_ao GPIOAO_10 GPIO_ACTIVE_HIGH>; |
| fe0_ant_poweron_value = <0>; |
| fe0_ant_power_gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; |
| fe0_ts = <0>; |
| fe0_tuner0 = <0>; /* T/C */ |
| fe0_tuner1 = <1>; /* S */ |
| |
| tuner_num = <2>; /* for extern demod use tuner */ |
| tuner0_name = "r836_tuner"; |
| tuner1_name = "av2018_tuner"; |
| }; |
| |
| dvb-demux { |
| compatible = "amlogic, dvb-demux"; |
| dev_name = "dvb-demux"; |
| status = "okay"; |
| |
| dmx = <&demux>; |
| key_endia = <1>; |
| add_s2p2 = <1>; |
| add_ts_in = <1>; |
| add_asyncfifo = <1>; |
| |
| ts0 = "serial"; |
| ts0_control = <0x800>; |
| ts0_invert = <0>; |
| |
| pinctrl-names = "s_ts0"; |
| pinctrl-0 = <&dvb_s_ts0_pins>; |
| clocks = <&clkc CLKID_DEMUX |
| &clkc CLKID_AHB_ARB0 |
| &clkc CLKID_PARSER>; |
| clock-names = "demux", "ahbarb0", "parser_top"; |
| }; |
| |
| vdin@0 { |
| compatible = "amlogic, vdin"; |
| /*memory-region = <&vdin0_cma_reserved>;*/ |
| status = "okay"; |
| /*bit0:(1:share with codec_mm;0:cma alone) |
| *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
| */ |
| flag_cma = <0x101>; |
| /*MByte, if 10bit disable: 64M(YUV422), |
| *if 10bit enable: 64*1.5 = 96M(YUV422) |
| *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M |
| *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M |
| *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M |
| *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M |
| *worst case:(4096*2160*4 + 2M(afbce issue)) *6buf = 214.5M |
| */ |
| cma_size = <215>; |
| interrupts = <0 83 1>; |
| rdma-irq = <2>; |
| clocks = <&clkc CLKID_FCLK_DIV5>, |
| <&clkc CLKID_VDIN_MEAS_GATE>; |
| clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| vdin_id = <0>; |
| /*vdin write mem color depth support: |
| * bit0:support 8bit |
| * bit1:support 9bit |
| * bit2:support 10bit |
| * bit3:support 12bit |
| * bit4:support yuv422 10bit full pack mode (from txl new add) |
| * bit8:use 8bit at 4k_50/60hz_10bit |
| * bit9:use 10bit at 4k_50/60hz_10bit |
| */ |
| tv_bit_mode = <0x215>; |
| /* afbce_bit_mode: (amlogic frame buff compression encoder) |
| * bit0 -- enable afbce |
| * bit1 -- enable afbce compression-lossy |
| * bit4 -- afbce for 4k |
| * bit5 -- afbce for 1080p |
| * bit6 -- afbce for 720p |
| * bit7 -- afbce for smaller resolution |
| */ |
| afbce_bit_mode = <0x31>; |
| }; |
| |
| vdin@1 { |
| compatible = "amlogic, vdin"; |
| memory-region = <&vdin1_cma_reserved>; |
| status = "okay"; |
| /*bit0:(1:share with codec_mm;0:cma alone) |
| *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
| */ |
| flag_cma = <0>; |
| interrupts = <0 85 1>; |
| rdma-irq = <4>; |
| clocks = <&clkc CLKID_FCLK_DIV5>, |
| <&clkc CLKID_VDIN_MEAS_GATE>; |
| clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| vdin_id = <1>; |
| /*vdin write mem color depth support: |
| *bit0:support 8bit |
| *bit1:support 9bit |
| *bit2:support 10bit |
| *bit3:support 12bit |
| */ |
| tv_bit_mode = <0x15>; |
| }; |
| |
| amvdec_656in { |
| /*bt656 gpio conflict with i2c0*/ |
| compatible = "amlogic, bt656in-sm1"; |
| status = "disabled"; |
| reg = <0x0 0xffe02000 0x0 0x7c>; |
| clocks = <&clkc CLKID_BT656_GATE>, |
| <&clkc CLKID_BT656>; |
| clock-names = "cts_bt656_clk1", |
| "clk_gate_bt656"; |
| /* bt656in1, bt656in2 */ |
| bt656in1 { |
| bt656_id = <1>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| |
| /* |
| &cec_AO { |
| pinctrl-0 = <&cec_ao_a_h_pins>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| hdmi-phandle = <&hdmi_tx>; |
| }; |
| |
| &cecb_AO { |
| pinctrl-0 = <&cec_ao_b_h_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| hdmi-phandle = <&hdmi_tx>; |
| }; |
| */ |
| |
| &cpu0 { |
| cpu-supply = <&vddcpu>; |
| operating-points-v2 = <&cpu_opp_table>; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_CLK_DYN>, |
| <&clkc CLKID_SYS_PLL>, |
| <&clkc CLKID_DSU_CLK>, |
| <&clkc CLKID_DSU_CLK_FINAL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent", |
| "dsu_clk", |
| "dsu_pre_parent"; |
| clock-latency = <50000>; |
| }; |
| |
| &cpu1 { |
| cpu-supply = <&vddcpu>; |
| operating-points-v2 = <&cpu_opp_table>; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_CLK_DYN>, |
| <&clkc CLKID_SYS_PLL>, |
| <&clkc CLKID_DSU_CLK>, |
| <&clkc CLKID_DSU_CLK_FINAL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent", |
| "dsu_clk", |
| "dsu_pre_parent"; |
| clock-latency = <50000>; |
| }; |
| |
| &cpu2 { |
| cpu-supply = <&vddcpu>; |
| operating-points-v2 = <&cpu_opp_table>; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_CLK_DYN>, |
| <&clkc CLKID_SYS_PLL>, |
| <&clkc CLKID_DSU_CLK>, |
| <&clkc CLKID_DSU_CLK_FINAL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent", |
| "dsu_clk", |
| "dsu_pre_parent"; |
| clock-latency = <50000>; |
| }; |
| |
| &cpu3 { |
| cpu-supply = <&vddcpu>; |
| operating-points-v2 = <&cpu_opp_table>; |
| clocks = <&clkc CLKID_CPU_CLK>, |
| <&clkc CLKID_CPU_CLK_DYN>, |
| <&clkc CLKID_SYS_PLL>, |
| <&clkc CLKID_DSU_CLK>, |
| <&clkc CLKID_DSU_CLK_FINAL>; |
| clock-names = "core_clk", |
| "low_freq_clk_parent", |
| "high_freq_clk_parent", |
| "dsu_clk", |
| "dsu_pre_parent"; |
| clock-latency = <50000>; |
| }; |
| |
| &vddcpu { |
| pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>; |
| regulator-min-microvolt = <720000>; |
| regulator-max-microvolt = <1020000>; |
| max-duty-cycle = <1250>; |
| /* Voltage Duty-Cycle */ |
| voltage-table = <1020000 0>, |
| <1010000 4>, |
| <1000000 8>, |
| <990000 11>, |
| <980000 14>, |
| <970000 17>, |
| <960000 20>, |
| <950000 24>, |
| <940000 27>, |
| <930000 31>, |
| <920000 35>, |
| <910000 38>, |
| <900000 42>, |
| <890000 45>, |
| <880000 48>, |
| <870000 52>, |
| <860000 56>, |
| <850000 59>, |
| <840000 63>, |
| <830000 65>, |
| <820000 67>, |
| <810000 70>, |
| <800000 74>, |
| <790000 78>, |
| <780000 80>, |
| <770000 84>, |
| <760000 88>, |
| <750000 92>, |
| <740000 95>, |
| <730000 98>, |
| <720000 100>; |
| }; |
| |
| /* open this comment for ext phy |
| *&ext_mdio { |
| external_phy: ethernet-phy@0 { |
| reg = <0>; |
| max-speed = <1000>; |
| |
| reset-assert-us = <10000>; |
| reset-deassert-us = <30000>; |
| reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | |
| GPIO_OPEN_DRAIN)>; |
| |
| interrupt-parent = <&gpio_intc>; |
| interrupts = <26 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| }; |
| ðmac { |
| pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| phy-mode = "rgmii"; |
| phy-handle = <&external_phy>; |
| amlogic,tx-delay-ns = <2>; |
| }; |
| */ |
| |
| ðmac { |
| status = "okay"; |
| phy-handle = <&internal_ephy>; |
| phy-mode = "rmii"; |
| }; |
| |
| &fb { |
| status = "okay"; |
| display_size_default = <1920 1080 1920 2160 32>; |
| mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>; |
| logo_addr = "0x3f800000"; |
| mem_alloc = <0>; |
| pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
| }; |
| |
| /* |
| &hdmi_tx { |
| status = "okay"; |
| pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; |
| pinctrl-names = "default"; |
| }; |
| |
| &hdmi_tx_tmds_port { |
| hdmi_tx_tmds_out: endpoint { |
| remote-endpoint = <&hdmi_connector_in>; |
| }; |
| }; |
| */ |
| |
| &i2c3 { |
| status = "okay"; |
| pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; |
| pinctrl-names = "default"; |
| clock-frequency = <300000>; /* default 100k */ |
| }; |
| |
| &ir { |
| status = "okay"; |
| pinctrl-0 = <&remote_input_ao_pins>; |
| pinctrl-names = "default"; |
| }; |
| |
| &pwm_AO_ab { |
| status = "okay"; |
| }; |
| |
| &pwm_AO_cd { |
| pinctrl-0 = <&pwm_ao_d_e_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |
| |
| &pwm_ef { |
| pinctrl-0 = <&pwm_e_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |
| |
| &saradc { |
| status = "okay"; |
| vref-supply = <&vddio_ao1v8>; |
| }; |
| |
| /* SDIO */ |
| &sd_emmc_a { |
| status = "okay"; |
| pinctrl-0 = <&sdio_pins>; |
| pinctrl-1 = <&sdio_clk_gate_pins>; |
| pinctrl-names = "default", "clk-gate"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| bus-width = <4>; |
| cap-sd-highspeed; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| max-frequency = <200000000>; |
| |
| non-removable; |
| disable-wp; |
| cap-sdio-irq; |
| |
| vmmc-supply = <&vddao_3v3>; |
| vqmmc-supply = <&vddio_ao1v8>; |
| |
| brcmf: wifi@1 { |
| reg = <1>; |
| compatible = "brcm,bcm4329-fmac"; |
| }; |
| }; |
| |
| /* SD card */ |
| &sd_emmc_b { |
| status = "okay"; |
| pinctrl-0 = <&sdcard_c_pins>; |
| pinctrl-1 = <&sdcard_clk_gate_c_pins>; |
| pinctrl-2 = <&sd_1bit_pins>; |
| pinctrl-3 = <&sd_to_ao_uart_clr_pins |
| &sdcard_clk_gate_c_pins &ao_to_sd_uart_pins>; |
| pinctrl-4 = <&sd_to_ao_uart_clr_pins |
| &sd_1bit_pins &ao_to_sd_uart_pins>; |
| pinctrl-5 = <&sdcard_c_pins &uart_ao_a_pins>; |
| pinctrl-6 = <&sd_to_ao_uart_clr_pins |
| &ao_to_sd_uart_pins>; |
| pinctrl-7 = <&sdcard_c_pins &uart_ao_a_pins>; |
| pinctrl-8 = <&sd_to_ao_uart_clr_pins |
| &ao_to_sd_uart_pins>; |
| pinctrl-names = "sd_default", |
| "clk-gate", |
| "sd_1bit_pins", |
| "sd_clk_cmd_uart_pins", |
| "sd_1bit_uart_pins", |
| "sd_to_ao_uart_pins", |
| "ao_to_sd_uart_pins", |
| "sd_to_ao_jtag_pins", |
| "ao_to_sd_jtag_pins"; |
| bus-width = <4>; |
| cap-sd-highspeed; |
| // sd-uhs-sdr12; |
| // sd-uhs-sdr25; |
| // sd-uhs-sdr50; |
| // sd-uhs-sdr104; |
| max-frequency = <200000000>; |
| disable-wp; |
| |
| cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; |
| dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; |
| vmmc-supply = <&vddao_3v3>; |
| vqmmc-supply = <&emmc_1v8>; |
| }; |
| |
| /* eMMC */ |
| &sd_emmc_c { |
| status = "okay"; |
| pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; |
| pinctrl-1 = <&emmc_clk_gate_pins>; |
| pinctrl-names = "default", "clk-gate"; |
| |
| bus-width = <8>; |
| cap-mmc-highspeed; |
| //mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| mmc-hs400-1_8v; |
| max-frequency = <200000000>; |
| non-removable; |
| disable-wp; |
| |
| mmc-pwrseq = <&emmc_pwrseq>; |
| vmmc-supply = <&vddao_3v3>; |
| vqmmc-supply = <&emmc_1v8>; |
| }; |
| |
| &emmc_pwrseq { |
| status = "okay"; |
| }; |
| |
| &mtd_nand { |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| pinctrl-names = "nand_norb_mod","nand_cs_only"; |
| pinctrl-0 = <&all_nand_pins>; |
| pinctrl-1 = <&nand_cs_pins>; |
| bl_mode = <1>; |
| fip_copies = <4>; |
| fip_size = <0x200000>; |
| ship_bad_block = <1>; |
| nand@bootloader { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-ecc-maximize; |
| partition@0 { |
| label = "bootloader"; |
| reg = <0x0 0x00000000>; |
| }; |
| }; |
| nand@normal { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-ecc-maximize; |
| |
| partition@0 { |
| label = "tpl"; |
| reg = <0x0 0x00000000>; |
| }; |
| partition@1 { |
| label = "logo"; |
| reg = <0x0 0x00200000>; |
| }; |
| partition@2 { |
| label = "recovery"; |
| reg = <0x0 0x1000000>; |
| }; |
| partition@3 { |
| label = "boot"; |
| reg = <0x0 0x0F00000>; |
| }; |
| partition@4 { |
| label = "system"; |
| reg = <0x0 0x11800000>; |
| }; |
| partition@5 { |
| label = "data"; |
| reg = <0x0 0xffffffff>; |
| }; |
| }; |
| }; |
| |
| &uart_A { |
| status = "okay"; |
| pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; |
| pinctrl-names = "default"; |
| uart-has-rtscts; |
| |
| //bluetooth { |
| // compatible = "brcm,bcm43438-bt"; |
| // shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; |
| // max-speed = <2000000>; |
| // clocks = <&wifi32k>; |
| // clock-names = "lpo"; |
| // vbat-supply = <&vddao_3v3>; |
| // vddio-supply = <&vddio_ao1v8>; |
| //}; |
| }; |
| |
| /* Exposed via the on-board USB to Serial FT232RL IC */ |
| &uart_AO { |
| status = "okay"; |
| // pinctrl-0 = <&uart_ao_a_pins>; |
| // pinctrl-names = "default"; |
| }; |
| |
| &dwc2_a { |
| status = "okay"; |
| /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
| controller-type = <1>; |
| }; |
| |
| &usb0 { |
| status = "okay"; |
| }; |
| |
| &usb2_phy_v2 { |
| status = "okay"; |
| portnum = <2>; |
| }; |
| |
| &usb3_phy_v2 { |
| status = "okay"; |
| portnum = <1>; |
| otg = <0>; |
| }; |
| |
| &aml_wifi{ |
| status = "okay"; |
| interrupt-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; |
| power_on-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &aml_bt { |
| status = "okay"; |
| reset-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; |
| hostwake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &pcie { |
| status = "disable"; |
| reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &spicc0 { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc0_pins_x>; |
| cs-gpios = <&gpio GPIOX_10 0>; |
| }; |
| |
| &spicc1 { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc1_pins>; |
| cs-gpios = <&gpio GPIOH_6 0>; |
| }; |
| |
| &ao_pinctrl { |
| dvb_s_ts0_pins: dvb_s_ts0_pins { |
| tsin_a { |
| groups = "tsin_ao_asop", |
| "tsin_ao_a_valid", |
| "tsin_ao_aclk", |
| "tsin_ao_adin0"; |
| function = "tsin_ao_a"; |
| }; |
| }; |
| }; |
