blob: dd533ddd6e8d9dce1be95fa9257bce24193b055d [file] [log] [blame]
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
*/
#define PDID_A1_CPU_PWR0 0
#define PDID_A1_CPU_CORE0 1
#define PDID_A1_CPU_CORE1 2
#define PDID_A1_DSP_A 8
#define PDID_A1_DSP_B 9
#define PDID_A1_UART 10
#define PDID_A1_MMC 11
#define PDID_A1_I2C 12
#define PDID_A1_PSRAM 13
#define PDID_A1_ACODEC 14
#define PDID_A1_AUDIO 15
#define PDID_A1_MKL_OTP 16
#define PDID_A1_DMA 17
#define PDID_A1_SDEMMC 18
#define PDID_A1_SRAM_A 19
#define PDID_A1_SRAM_B 20
#define PDID_A1_IR 21
#define PDID_A1_SPICC 22
#define PDID_A1_SPIFC 23
#define PDID_A1_USB 24
#define PDID_A1_NIC 25
#define PDID_A1_PDM 26
#define PDID_A1_RSA 27
#define PDID_A1_MAX 28