| /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| */ |
| |
| #define PDID_C1_CPU_PWR0 0 |
| #define PDID_C1_CPU_CORE0 1 |
| #define PDID_C1_CPU_CORE1 2 |
| #define PDID_C1_DSP_A 8 |
| #define PDID_C1_DSP_B 9 |
| #define PDID_C1_UART 10 |
| #define PDID_C1_DMC 11 |
| #define PDID_C1_I2C 12 |
| #define PDID_C1_SDEMMC_B 13 |
| #define PDID_C1_ACODEC 14 |
| #define PDID_C1_AUDIO 15 |
| #define PDID_C1_MKL_OTP 16 |
| #define PDID_C1_DMA 17 |
| #define PDID_C1_SDEMMC_A 18 |
| #define PDID_C1_SRAM_A 19 |
| #define PDID_C1_SRAM_B 20 |
| #define PDID_C1_IR 21 |
| #define PDID_C1_SPICC 22 |
| #define PDID_C1_SPIFC 23 |
| #define PDID_C1_USB 24 |
| #define PDID_C1_NIC 25 |
| #define PDID_C1_PDM 26 |
| #define PDID_C1_RSA 27 |
| #define PDID_C1_MIPI_ISP 28 |
| #define PDID_C1_HCODEC 29 |
| #define PDID_C1_WAVE 30 |
| #define PDID_C1_SDEMMC_C 31 |
| #define PDID_C1_SRAM_C 32 |
| #define PDID_C1_GDC 33 |
| #define PDID_C1_GE2D 34 |
| #define PDID_C1_NNA 35 |
| #define PDID_C1_ETH 36 |
| #define PDID_C1_GIC 37 |
| #define PDID_C1_DDR 38 |
| #define PDID_C1_SPICC_B 39 |
| #define PDID_C1_MAX 40 |
