Documentation/devicetree/bindings/clock/amlogic,meson-clkc.txt

* Amlogic Meson Clock and Reset Unit

The Amlogic Meson clock controller generates and supplies clock to various
controllers of the SoC.

Required Properties:

- compatible: Should be one of the following:
	"amlogic,gxl-aoclkc"   - for gxl ao clock
	"amlogic,gxl-clkc"     - for gxl ee clock
	"amlogic,axg-clkc"     - for axg ee clock
	"amlogic,axg-aoclkc"    - for axg ao clock
	"amlogic,txl-clkc"      - for txl ee clock
	"amlogic,txl-aoclkc"    - for txl ao clock
	"amlogic,txlx-clkc"     - for txlx ee clock
	"amlogic,txlx-aoclkc"    - for txlx ao clock
	"amlogic,g12a-clkc"	- for g12a ee clock
	"amlogic,g12a-aoclkc"   - for g12a ao clock
	"amlogic,g12b-clkc-1"   - for g12b ee part1 clock
	"amlogic,g12b-clkc-2"   - for g12b ee part2 clock
	"amlogic,g12b-aoclkc"   - for g12b ao clock
	"amlogic,tl1-clkc"      - for tl1 ee clock
	"amlogic,tl1-aoclkc"    - for tl1 ao clock
	"amlogic,tl1-measure"    - for tl1 clock measurement
	"amlogic,sm1-clkc-1"   - for sm1 ee part1 clock
	"amlogic,sm1-clkc-2"   - for sm1 ee part2 clock
	"amlogic,sm1-aoclkc"   - for sm1 ao clock

- reg: physical base address of the clock controller and length of memory
       mapped region.

- #clock-cells: should be 1.

- #reset-cells: should be 1.

Example: gxl AO Clock controller node:

	clkc_AO: clock-controller@040 {
		compatible = "amlogic,gxl-aoclkc";
		reg = <0x0 0x040 0x0 0x4>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

Example: UART controller node that consumes the clock and reset generated
  by the clock controller:

	uart_AO: serial@4c0 {
		compatible = "amlogic,meson-uart";
		reg = <0x4c0 0x14>;
		interrupts = <0 90 1>;
		clocks = <&clkc_AO CLKID_AO_UART1>;
		resets = <&clkc_AO RESET_AO_UART1>;
		status = "disabled";
	};