| /* |
| * arch/arm/boot/dts/amlogic/g12a_s905d2_u200.dts |
| * |
| * Copyright (C) 2017 Amlogic, Inc. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, but WITHOUT |
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| * more details. |
| * |
| */ |
| |
| /dts-v1/; |
| |
| #include "mesong12a.dtsi" |
| #include "partition_mbox_normal.dtsi" |
| #include "mesong12a_skt-panel.dtsi" |
| |
| / { |
| model = "Amlogic"; |
| amlogic-dt-id = "g12a_u200_1g"; |
| compatible = "amlogic, g12a"; |
| interrupt-parent = <&gic>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| aliases { |
| serial0 = &uart_AO; |
| serial1 = &uart_A; |
| serial2 = &uart_B; |
| serial3 = &uart_C; |
| serial4 = &uart_AO_B; |
| tsensor0 = &p_tsensor; |
| tsensor1 = &d_tsensor; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| i2c4 = &i2c_AO; |
| }; |
| |
| memory@00000000 { |
| device_type = "memory"; |
| linux,usable-memory = <0x000000 0x40000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| /* global autoconfigured region for contiguous allocations */ |
| ramoops@0x07400000 { |
| compatible = "ramoops"; |
| reg = <0x07400000 0x00100000>; |
| record-size = <0x8000>; |
| console-size = <0x8000>; |
| ftrace-size = <0x0>; |
| pmsg-size = <0x8000>; |
| }; |
| |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x400000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x05000000 0x400000>; |
| }; |
| secos_reserved:linux,secos { |
| status = "disable"; |
| compatible = "amlogic, aml_secos_memory"; |
| reg = <0x05300000 0x2000000>; |
| no-map; |
| }; |
| logo_reserved:linux,meson-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x3f800000 0x800000>; |
| }; |
| |
| codec_mm_cma:linux,codec_mm_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* ion_codec_mm max can alloc size 80M*/ |
| size = <0xC400000>; |
| alignment = <0x400000>; |
| linux,contiguous-region; |
| alloc-ranges = <0x30000000 0x10000000>; |
| }; |
| ion_cma_reserved:linux,ion-dev { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x8000000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x0 0x30000000>; |
| }; |
| //di_reserved:linux,di { |
| //compatible = "amlogic, di-mem"; |
| /* buffer_size = 3621952(yuv422 8bit) */ |
| /* 4179008(yuv422 10bit full pack mode) */ |
| /** 10x3621952=34.6M(0x23) support 8bit **/ |
| /** 10x4736064=45.2M(0x2e) support 12bit **/ |
| /** 10x4179008=40M(0x28) support 10bit **/ |
| //size = <0x2800000>; |
| //no-map; |
| //}; |
| /*di CMA pool */ |
| di_cma_reserved:linux,di_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* buffer_size = 3621952(yuv422 8bit) |
| * | 4736064(yuv422 10bit) |
| * | 4074560(yuv422 10bit full pack mode) |
| * 10x3621952=34.6M(0x23) support 8bit |
| * 10x4736064=45.2M(0x2e) support 12bit |
| * 10x4074560=40M(0x28) support 10bit |
| */ |
| size = <0x02800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x30000000 0x10000000>; |
| }; |
| /* POST PROCESS MANAGER */ |
| ppmgr_reserved:linux,ppmgr { |
| compatible = "shared-dma-pool"; |
| size = <0x0>; |
| }; |
| |
| /* codec shared reserved */ |
| codec_mm_reserved:linux,codec_mm_reserved { |
| compatible = "amlogic, codec-mm-reserved"; |
| size = <0x0>; |
| alignment = <0x100000>; |
| //no-map; |
| }; |
| /* vdin0 CMA pool */ |
| vdin0_cma_reserved:linux,vdin0_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 1920x1080x2x4 =16+4 M */ |
| size = <0x04000000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x0 0x30000000>; |
| }; |
| /* vdin1 CMA pool */ |
| vdin1_cma_reserved:linux,vdin1_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 1920x1080x2x4 =16 M */ |
| size = <0x04000000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x0 0x30000000>; |
| }; |
| vm0_cma_reserved:linux,vm0_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x2000000>; |
| alignment = <0x400000>; |
| }; |
| }; |
| |
| gpioleds { |
| compatible = "gpio-leds"; |
| status = "okay"; |
| |
| sys_led { |
| label="sys_led"; |
| gpios=<&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; |
| default-state ="on"; |
| }; |
| }; |
| |
| cvbsout { |
| compatible = "amlogic, cvbsout-g12a"; |
| dev_name = "cvbsout"; |
| status = "okay"; |
| clocks = <&clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_DAC_CLK>; |
| clock-names = "venci_top_gate", |
| "venci_0_gate", |
| "venci_1_gate", |
| "vdac_clk_gate"; |
| /* clk path */ |
| /* 0:vid_pll vid2_clk */ |
| /* 1:gp0_pll vid2_clk */ |
| /* 2:vid_pll vid1_clk */ |
| /* 3:gp0_pll vid1_clk */ |
| clk_path = <0>; |
| |
| /* performance: reg_address, reg_value */ |
| /* g12a */ |
| performance = <0x1bf0 0x9 |
| 0x1b56 0x333 |
| 0x1b12 0x8080 |
| 0x1b05 0xfd |
| 0x1c59 0xf850 |
| 0xffff 0x0>; /* ending flag */ |
| performance_sarft = <0x1bf0 0x9 |
| 0x1b56 0x333 |
| 0x1b12 0x0 |
| 0x1b05 0x9 |
| 0x1c59 0xfc48 |
| 0xffff 0x0>; /* ending flag */ |
| performance_revB_telecom = <0x1bf0 0x9 |
| 0x1b56 0x546 |
| 0x1b12 0x8080 |
| 0x1b05 0x9 |
| 0x1c59 0xf850 |
| 0xffff 0x0>; /* ending flag */ |
| }; |
| |
| bt-dev{ |
| compatible = "amlogic, bt-dev"; |
| dev_name = "bt-dev"; |
| status = "okay"; |
| gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; |
| gpio_hostwake = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| wifi{ |
| compatible = "amlogic, aml_wifi"; |
| dev_name = "aml_wifi"; |
| status = "okay"; |
| interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; |
| irq_trigger_type = "GPIO_IRQ_LOW"; |
| power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>; |
| dhd_static_buf; //if use bcm wifi, config dhd_static_buf |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_e_pins>; |
| pwm_config = <&wifi_pwm_conf>; |
| }; |
| |
| wifi_pwm_conf:wifi_pwm_conf{ |
| pwm_channel1_conf { |
| pwms = <&pwm_ef MESON_PWM_0 30541 0>; |
| duty-cycle = <15270>; |
| times = <10>; |
| }; |
| pwm_channel2_conf { |
| pwms = <&pwm_ef MESON_PWM_2 30500 0>; |
| duty-cycle = <15250>; |
| times = <12>; |
| }; |
| }; |
| |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| dev_name = "codec_mm"; |
| status = "okay"; |
| }; |
| |
| ppmgr { |
| compatible = "amlogic, ppmgr"; |
| memory-region = <&ppmgr_reserved>; |
| dev_name = "ppmgr"; |
| status = "okay"; |
| }; |
| |
| deinterlace { |
| compatible = "amlogic, deinterlace"; |
| status = "okay"; |
| /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
| flag_cma = <1>; |
| //memory-region = <&di_reserved>; |
| memory-region = <&di_cma_reserved>; |
| interrupts = <0 46 1 |
| 0 40 1>; |
| interrupt-names = "pre_irq", "post_irq"; |
| clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, |
| <&clkc CLKID_VPU_CLKB_COMP>; |
| clock-names = "vpu_clkb_tmp_composite", |
| "vpu_clkb_composite"; |
| clock-range = <334 667>; |
| /* buffer-size = <3621952>;(yuv422 8bit) */ |
| buffer-size = <4074560>;/*yuv422 fullpack*/ |
| /* reserve-iomap = "true"; */ |
| /* if enable nr10bit, set nr10bit-support to 1 */ |
| post-wr-support = <1>; |
| nr10bit-support = <1>; |
| nrds-enable = <1>; |
| pps-enable = <1>; |
| }; |
| ionvideo { |
| compatible = "amlogic, ionvideo"; |
| dev_name = "ionvideo"; |
| status = "okay"; |
| }; |
| vm0 { |
| compatible = "amlogic, vm"; |
| memory-region = <&vm0_cma_reserved>; |
| dev_name = "vm0"; |
| status = "disabled"; |
| vm_id = <0>; |
| }; |
| |
| amvdec_656in { |
| /*bt656 gpio conflict with i2c0*/ |
| compatible = "amlogic, amvdec_656in"; |
| dev_name = "amvdec_656in"; |
| status = "disabled"; |
| reg = <0xffe02000 0x7c>; |
| clocks = <&clkc CLKID_BT656_COMP>, |
| <&clkc CLKID_BT656>; |
| clock-names = "cts_bt656_clk1", |
| "clk_gate_bt656"; |
| /* bt656in1, bt656in2 */ |
| bt656in1 { |
| bt656_id = <1>; |
| status = "disabled"; |
| }; |
| }; |
| |
| aml_cams { |
| compatible = "amlogic, cams_prober"; |
| status = "disabled"; |
| pinctrl-names="default"; |
| pinctrl-0=<&cam_dvp_pins &gen_clk_ee_z>; |
| clocks = <&clkc CLKID_GEN_CLK>; |
| clock-names = "g12a_24m"; |
| cam_0{ |
| cam_name = "gc2145"; |
| front_back = <0>; |
| /*u200 i2c2 gpio conflict with ethmac*/ |
| camera-i2c-bus = <&i2c2>; |
| gpio_pwdn-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>; |
| gpio_rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>; |
| mirror_flip = <1>; |
| vertical_flip = <1>; |
| spread_spectrum = <0>; |
| bt_path = "gpio"; |
| bt_path_count = <1>; |
| vdin_path = <0>; |
| status = "okay"; |
| }; |
| }; |
| |
| gpio_keypad{ |
| compatible = "amlogic, gpio_keypad"; |
| status = "okay"; |
| scan_period = <20>; |
| key_num = <1>; |
| key_name = "power"; |
| key_code = <116>; |
| key-gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; |
| detect_mode = <0>;/*0:polling mode, 1:irq mode*/ |
| }; |
| |
| adc_keypad { |
| compatible = "amlogic, adc_keypad"; |
| status = "okay"; |
| key_name = "vol-", "vol+", "enter"; |
| key_num = <3>; |
| io-channels = <&saradc SARADC_CH2>; |
| io-channel-names = "key-chan-2"; |
| key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2>; |
| key_code = <114 115 28>; |
| key_val = <143 266 389>; //val=voltage/1800mV*1023 |
| key_tolerance = <40 40 40>; |
| }; |
| |
| unifykey{ |
| compatible = "amlogic, unifykey"; |
| status = "ok"; |
| unifykey-num = <17>; |
| unifykey-index-0 = <&keysn_0>; |
| unifykey-index-1 = <&keysn_1>; |
| unifykey-index-2 = <&keysn_2>; |
| unifykey-index-3 = <&keysn_3>; |
| unifykey-index-4 = <&keysn_4>; |
| unifykey-index-5 = <&keysn_5>; |
| unifykey-index-6 = <&keysn_6>; |
| unifykey-index-7 = <&keysn_7>; |
| unifykey-index-8 = <&keysn_8>; |
| unifykey-index-9 = <&keysn_9>; |
| unifykey-index-10= <&keysn_10>; |
| unifykey-index-11= <&keysn_11>; |
| unifykey-index-12= <&keysn_12>; |
| unifykey-index-13= <&keysn_13>; |
| unifykey-index-14= <&keysn_14>; |
| unifykey-index-15= <&keysn_15>; |
| unifykey-index-16= <&keysn_16>; |
| |
| keysn_0: key_0{ |
| key-name = "usid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_1:key_1{ |
| key-name = "mac"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_2:key_2{ |
| key-name = "hdcp"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_3:key_3{ |
| key-name = "secure_boot_set"; |
| key-device = "efuse"; |
| key-permit = "write"; |
| }; |
| keysn_4:key_4{ |
| key-name = "mac_bt"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_5:key_5{ |
| key-name = "mac_wifi"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_6:key_6{ |
| key-name = "hdcp2_tx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_7:key_7{ |
| key-name = "hdcp2_rx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_8:key_8{ |
| key-name = "widevinekeybox"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_9:key_9{ |
| key-name = "deviceid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_10:key_10{ |
| key-name = "hdcp22_fw_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_11:key_11{ |
| key-name = "PlayReadykeybox25"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_12:key_12{ |
| key-name = "prpubkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_13:key_13{ |
| key-name = "prprivkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_14:key_14{ |
| key-name = "attestationkeybox";// attestation key |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_15:key_15{ |
| key-name = "region_code"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_16:key_16{ |
| key-name = "netflix_mgkid"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| };//End unifykey |
| |
| efusekey:efusekey{ |
| keynum = <4>; |
| key0 = <&key_0>; |
| key1 = <&key_1>; |
| key2 = <&key_2>; |
| key3 = <&key_3>; |
| key_0:key_0{ |
| keyname = "mac"; |
| offset = <0>; |
| size = <6>; |
| }; |
| key_1:key_1{ |
| keyname = "mac_bt"; |
| offset = <6>; |
| size = <6>; |
| }; |
| key_2:key_2{ |
| keyname = "mac_wifi"; |
| offset = <12>; |
| size = <6>; |
| }; |
| key_3:key_3{ |
| keyname = "usid"; |
| offset = <18>; |
| size = <16>; |
| }; |
| };//End efusekey |
| |
| amlvecm { |
| compatible = "amlogic, vecm"; |
| dev_name = "aml_vecm"; |
| status = "okay"; |
| gamma_en = <0>;/*1:enabel ;0:disable*/ |
| wb_en = <0>;/*1:enabel ;0:disable*/ |
| cm_en = <0>;/*1:enabel ;0:disable*/ |
| /*0: 709/601 1: bt2020*/ |
| tx_op_color_primary = <0>; |
| }; |
| |
| amdolby_vision { |
| compatible = "amlogic, dolby_vision_g12a"; |
| dev_name = "aml_amdolby_vision_driver"; |
| status = "okay"; |
| tv_mode = <0>;/*1:enabel ;0:disable*/ |
| }; |
| |
| /* Audio Related start */ |
| pdm_codec:dummy{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, pdm_dummy_codec"; |
| status = "okay"; |
| }; |
| dummy_codec:dummy{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_dummy_codec"; |
| status = "okay"; |
| }; |
| amlogic_codec:t9015{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_codec_T9015"; |
| reg = <0xFF632000 0x2000>; |
| is_auge_used = <1>; /* meson or auge chipset used */ |
| tdmout_index = <1>; |
| status = "okay"; |
| }; |
| audio_effect:eqdrc{ |
| /*eq_enable = <1>;*/ |
| /*drc_enable = <1>;*/ |
| /* |
| * 0:tdmout_a |
| * 1:tdmout_b |
| * 2:tdmout_c |
| * 3:spdifout |
| * 4:spdifout_b |
| */ |
| eqdrc_module = <1>; |
| /* max 0xf, each bit for one lane, usually one lane */ |
| lane_mask = <0x1>; |
| /* max 0xff, each bit for one channel */ |
| channel_mask = <0x3>; |
| }; |
| auge_sound { |
| compatible = "amlogic, g12a-sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| |
| aml-audio-card,loopback = <&aml_loopback>; |
| aml-audio-card,aux-devs = <&amlogic_codec>; |
| /*avout mute gpio*/ |
| avout_mute-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; |
| /*for audio effect ,eqdrc */ |
| aml-audio-card,effect = <&audio_effect>; |
| |
| aml-audio-card,dai-link@0 { |
| format = "dsp_a"; |
| mclk-fs = <512>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| //bitclock-master = <&tdmacodec>; |
| //frame-master = <&tdmacodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pcm"; |
| tdmacpu: cpu { |
| sound-dai = <&aml_tdma>; |
| dai-tdm-slot-tx-mask = |
| <1 1 1 1 1 1 1 1>; |
| dai-tdm-slot-rx-mask = |
| <1 1 1 1 1 1 1 1>; |
| dai-tdm-slot-num = <8>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <24576000>; |
| }; |
| tdmacodec: codec { |
| sound-dai = <&dummy_codec &dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@1 { |
| format = "i2s";// "dsp_a"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| bitclock-master = <&aml_tdmb>; |
| frame-master = <&aml_tdmb>; |
| //bitclock-master = <&tdmbcodec>; |
| //frame-master = <&tdmbcodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&aml_tdmb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| /* |
| * dai-tdm-slot-tx-mask = |
| * <1 1 1 1 1 1 1 1>; |
| * dai-tdm-slot-rx-mask = |
| * <1 1 1 1 1 1 1 1>; |
| * dai-tdm-slot-num = <8>; |
| */ |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmbcodec: codec { |
| sound-dai = <&dummy_codec &dummy_codec |
| &amlogic_codec &ad82584f_62>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@2 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| bitclock-master = <&aml_tdmc>; |
| frame-master = <&aml_tdmc>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| //suffix-name = "alsaPORT-tdm"; |
| cpu { |
| sound-dai = <&aml_tdmc>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&tlv320adc3101_32 &dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@3 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pdm"; |
| cpu { |
| sound-dai = <&aml_pdm>; |
| }; |
| codec { |
| sound-dai = <&pdm_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@4 { |
| mclk-fs = <128>; |
| //continuous-clock; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-spdif"; |
| cpu { |
| sound-dai = <&aml_spdif>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| /* spdif_b to hdmi, only playback */ |
| aml-audio-card,dai-link@5 { |
| mclk-fs = <128>; |
| continuous-clock; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-spdifb2hdmi"; |
| cpu { |
| sound-dai = <&aml_spdif_b>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| /* |
| * dai link for i2s to hdmix, |
| * Notice to select a tdm lane not used by hw |
| */ |
| /* |
| * aml-audio-card,dai-link@6 { |
| * format = "i2s"; |
| * mclk-fs = <256>; |
| * //continuous-clock; |
| * //bitclock-inversion; |
| * //frame-inversion; |
| * bitclock-master = <&aml_i2s2hdmi>; |
| * frame-master = <&aml_i2s2hdmi>; |
| * suffix-name = "alsaPORT-i2s2hdmi"; |
| * cpu { |
| * sound-dai = <&aml_i2s2hdmi>; |
| * dai-tdm-slot-tx-mask = <1 1>; |
| * dai-tdm-slot-num = <2>; |
| * dai-tdm-slot-width = <32>; |
| * system-clock-frequency = <12288000>; |
| * }; |
| * codec { |
| * sound-dai = <&dummy_codec>; |
| * }; |
| * }; |
| */ |
| }; |
| audiolocker: locker { |
| compatible = "amlogic, audiolocker"; |
| clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT |
| &clkaudio CLKID_AUDIO_LOCKER_IN |
| &clkaudio CLKID_AUDIO_MCLK_D |
| &clkaudio CLKID_AUDIO_MCLK_E |
| &clkc CLKID_MPLL1 |
| &clkc CLKID_MPLL2>; |
| clock-names = "lock_out", "lock_in", "out_src", |
| "in_src", "out_calc", "in_ref"; |
| interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq"; |
| frequency = <49000000>; /* pll */ |
| dividor = <49>; /* locker's parent */ |
| status = "okay"; |
| }; |
| /* Audio Related end */ |
| |
| /*DCDC for MP8756GD*/ |
| cpu_opp_table0: cpu_opp_table0 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1398000000>; |
| opp-microvolt = <761000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1512000000>; |
| opp-microvolt = <791000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <831000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <861000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <1800000000>; |
| opp-microvolt = <981000>; |
| }; |
| }; |
| |
| cpufreq-meson { |
| compatible = "amlogic, cpufreq-meson"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_ao_d_pins3>; |
| status = "okay"; |
| }; |
| |
| }; /* end of / */ |
| |
| &meson_fb { |
| status = "okay"; |
| display_size_default = <1920 1080 1920 2160 32>; |
| mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>; |
| logo_addr = "0x7f800000"; |
| mem_alloc = <0>; |
| pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
| }; |
| |
| &pwm_AO_cd { |
| status = "okay"; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c0_master_pins2>; |
| clock-frequency = <400000>; |
| |
| gt9xx@5d { |
| compatible = "goodix,gt9xx"; |
| status = "disabled"; |
| reg = <0x5d>; |
| reset-gpio = <&gpio GPIOZ_9 0x00>; |
| irq-gpio = <&gpio GPIOZ_3 0x00>; |
| }; |
| |
| ftxx@38 { |
| compatible = "focaltech,fts"; |
| status = "disabled"; |
| reg = <0x38>; |
| reset-gpio = <&gpio GPIOZ_9 0x00>; |
| irq-gpio = <&gpio GPIOZ_3 0x00>; |
| x_max = <600>; |
| y_max = <1024>; |
| max-touch-number = <10>; |
| }; |
| }; |
| |
| &i2c2 { |
| status = "disabled"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c2_master_pins2>; |
| clock-frequency = <100000>; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c3_master_pins2>; |
| clock-frequency = <100000>; /* default 100k */ |
| |
| /* for ref board */ |
| ad82584f_62: ad82584f_62@62 { |
| compatible = "ESMT, ad82584f"; |
| #sound-dai-cells = <0>; |
| reg = <0x31>; |
| status = "okay"; |
| reset_pin = <&gpio GPIOA_5 0>; |
| }; |
| |
| tlv320adc3101_32: tlv320adc3101_32@32 { |
| compatible = "ti,tlv320adc3101"; |
| #sound-dai-cells = <0>; |
| reg = <0x19>; |
| differential_pair = <1>; |
| status = "okay"; |
| }; |
| |
| tas5707_36: tas5707_36@36 { |
| compatible = "ti,tas5707"; |
| #sound-dai-cells = <0>; |
| reg = <0x1b>; |
| status = "disabled"; |
| reset_pin = <&gpio GPIOA_5 0>; |
| }; |
| |
| bl_extern_i2c { |
| compatible = "bl_extern, i2c"; |
| dev_name = "lp8556"; |
| reg = <0x2c>; |
| status = "disabled"; |
| }; |
| }; |
| |
| &audiobus { |
| aml_tdma: tdma { |
| compatible = "amlogic, g12a-snd-tdma"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <0 1>; |
| dai-tdm-oe-lane-slot-mask-out = <1 0>; |
| dai-tdm-clk-sel = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
| &clkc CLKID_MPLL0>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmout_a &tdmin_a>; |
| }; |
| |
| aml_tdmb: tdmb { |
| compatible = "amlogic, g12a-snd-tdmb"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <0 1 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
| dai-tdm-clk-sel = <1>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| &clkc CLKID_MPLL1 |
| &clkc CLKID_MPLL0 |
| &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>; |
| clock-names = "mclk", "clk_srcpll", |
| "samesource_srcpll", "samesource_clk"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>; |
| /* |
| * 0: tdmout_a; |
| * 1: tdmout_b; |
| * 2: tdmout_c; |
| * 3: spdifout; |
| * 4: spdifout_b; |
| */ |
| samesource_sel = <3>; |
| }; |
| |
| aml_tdmc: tdmc { |
| compatible = "amlogic, g12a-snd-tdmc"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| #dai-tdm-lane-slot-mask-out = <1 0 1 1>; |
| #dai-tdm-lane-oe-slot-mask-in = <0 0 0 0>; |
| #dai-tdm-lane-oe-slot-mask-out = <1 0 0 0>; |
| dai-tdm-clk-sel = <2>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
| &clkc CLKID_MPLL2>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmc_mclk &tdmout_c &tdmin_c>; |
| }; |
| |
| /* copy a useless tdm to output for hdmi, no pinmux */ |
| aml_i2s2hdmi: i2s2hdmi { |
| compatible = "amlogic, g12a-snd-tdmc"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-out = <1 1 1 1>; |
| dai-tdm-clk-sel = <2>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
| &clkc CLKID_MPLL2>; |
| clock-names = "mclk", "clk_srcpll"; |
| |
| i2s2hdmi = <1>; |
| |
| status = "disabled"; |
| }; |
| |
| aml_spdif: spdif { |
| compatible = "amlogic, g12a-snd-spdif-a"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkc CLKID_MPLL0 |
| &clkc CLKID_FCLK_DIV4 |
| &clkaudio CLKID_AUDIO_SPDIFIN |
| &clkaudio CLKID_AUDIO_SPDIFOUT |
| &clkaudio CLKID_AUDIO_SPDIFIN_CTRL |
| &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>; |
| clock-names = "sysclk", "fixed_clk", "gate_spdifin", |
| "gate_spdifout", "clk_spdifin", "clk_spdifout"; |
| interrupts = |
| <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; |
| |
| interrupt-names = "irq_spdifin"; |
| pinctrl-names = "spdif_pins", |
| "spdif_pins_mute"; |
| pinctrl-0 = <&spdifout &spdifin>; |
| pinctrl-1 = <&spdifout_a_mute>; |
| status = "okay"; |
| }; |
| aml_spdif_b: spdif_b { |
| compatible = "amlogic, g12a-snd-spdif-b"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ |
| &clkaudio CLKID_AUDIO_SPDIFOUTB |
| &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>; |
| clock-names = "sysclk", |
| "gate_spdifout", "clk_spdifout"; |
| status = "okay"; |
| }; |
| aml_pdm: pdm { |
| compatible = "amlogic, g12a-snd-pdm"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_PDM |
| &clkc CLKID_FCLK_DIV3 |
| &clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_PDMIN0 |
| &clkaudio CLKID_AUDIO_PDMIN1>; |
| clock-names = "gate", |
| "sysclk_srcpll", |
| "dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk"; |
| pinctrl-names = "pdm_pins"; |
| pinctrl-0 = <&pdmin>; |
| filter_mode = <1>; /* mode 0~4, defalut:1 */ |
| status = "okay"; |
| }; |
| aml_loopback: loopback { |
| compatible = "amlogic, snd-loopback"; |
| /* |
| * 0: out rate = in data rate; |
| * 1: out rate = loopback data rate; |
| */ |
| lb_mode = <0>; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <8>; |
| datain_chmask = <0x3f>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_tdminA |
| * 4: PAD_tdminB |
| * 5: PAD_tdminC |
| */ |
| datalb_src = <2>; |
| datalb_chnum = <8>; |
| datalb_chmask = <0x3>; |
| |
| status = "okay"; |
| }; |
| |
| audioresample: resample { |
| compatible = "amlogic, g12a-resample"; |
| clocks = <&clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_MCLK_F |
| &clkaudio CLKID_AUDIO_RESAMPLE_CTRL>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| /*same with toddr_src |
| * TDMIN_A, 0 |
| * TDMIN_B, 1 |
| * TDMIN_C, 2 |
| * SPDIFIN, 3 |
| * PDMIN, 4 |
| * NONE, |
| * TDMIN_LB, 6 |
| * LOOPBACK, 7 |
| */ |
| resample_module = <4>; |
| status = "okay"; |
| }; |
| aml_pwrdet: pwrdet { |
| compatible = "amlogic, g12a-power-detect"; |
| |
| interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "pwrdet_irq"; |
| |
| /* pwrdet source sel |
| * 7: loopback; |
| * 6: tdmin_lb; |
| * 5: reserved; |
| * 4: pdmin; |
| * 3: spdifin; |
| * 2: tdmin_c; |
| * 1: tdmin_b; |
| * 0: tdmin_a; |
| */ |
| pwrdet_src = <4>; |
| |
| hi_th = <0x70000>; |
| lo_th = <0x16000>; |
| |
| status = "disabled"; |
| }; |
| }; /* end of audiobus */ |
| |
| &pinctrl_periphs { |
| tdmout_a: tdmout_a { |
| mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */ |
| groups = "tdma_sclk", |
| "tdma_fs", |
| "tdma_dout0"; |
| function = "tdma_out"; |
| }; |
| }; |
| |
| tdmin_a: tdmin_a { |
| mux { /* GPIOX_8 */ |
| groups = "tdma_din1"; |
| function = "tdma_in"; |
| }; |
| }; |
| |
| tdmb_mclk: tdmb_mclk { |
| mux { |
| groups = "mclk0_a"; |
| function = "mclk0"; |
| drive-strength = <2>; |
| }; |
| }; |
| tdmout_b: tdmout_b { |
| mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */ |
| groups = "tdmb_sclk", |
| "tdmb_fs", |
| "tdmb_dout0"; |
| function = "tdmb_out"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmin_b:tdmin_b { |
| mux { /* GPIOA_4 */ |
| groups = "tdmb_din1" |
| /*,"tdmb_slv_sclk", "tdmb_slv_fs"*/; |
| function = "tdmb_in"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmc_mclk: tdmc_mclk { |
| mux { /* GPIOA_11 */ |
| groups = "mclk1_a"; |
| function = "mclk1"; |
| }; |
| }; |
| |
| tdmout_c:tdmout_c { |
| mux { /* GPIOA_12, GPIOA_13, GPIOA_8, GPIOA_7*/ |
| groups = "tdmc_sclk_a", |
| "tdmc_fs_a", |
| "tdmc_dout0_a" |
| /*, "tdmc_dout2", |
| * "tdmc_dout3" |
| */; |
| function = "tdmc_out"; |
| }; |
| }; |
| |
| tdmin_c:tdmin_c { |
| mux { /* GPIOA_10 */ |
| groups = "tdmc_din0_a"; |
| function = "tdmc_in"; |
| }; |
| }; |
| |
| spdifin: spdifin { |
| mux {/* GPIOH_5 */ |
| groups = "spdif_in_h"; |
| function = "spdif_in"; |
| }; |
| }; |
| |
| /* GPIOH_4 */ |
| /* |
| * spdifout: spdifout { |
| * mux { |
| * groups = "spdif_out_h"; |
| * function = "spdif_out"; |
| * }; |
| *}; |
| */ |
| |
| pdmin: pdmin { |
| mux { /* gpioa_5, gpioa_6, gpioa_7, gpioa_8, gpioa_9*/ |
| groups = "pdm_din0_a", |
| /*"pdm_din1_a",*/ |
| "pdm_din2_a", |
| /*"pdm_din3_a",*/ |
| "pdm_dclk_a"; |
| function = "pdm"; |
| }; |
| }; |
| |
| bl_pwm_off_pins:bl_pwm_off_pin { |
| mux { |
| pins = "GPIOH_5"; |
| function = "gpio_periphs"; |
| output-high; |
| }; |
| }; |
| |
| clk12_24_z_pins:clk12_24_z_pins { |
| mux { |
| groups = "clk12_24_z"; |
| function = "clk12_24_ee"; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| gen_clk_ee_z: gen_clk_ee_z { |
| mux { |
| groups="gen_clk_ee_z"; |
| function="gen_clk_ee"; |
| drive-strength = <3>; |
| }; |
| }; |
| |
| cam_dvp_pins:cam_dvp_pins { |
| mux { |
| groups = "bt656_a_vs", "bt656_a_hs", "bt656_a_clk", |
| "bt656_a_din0", "bt656_a_din1", "bt656_a_din2", |
| "bt656_a_din3", "bt656_a_din4", "bt656_a_din5", |
| "bt656_a_din6", "bt656_a_din7"; |
| function = "bt656"; |
| }; |
| }; |
| |
| |
| }; /* end of pinctrl_periphs */ |
| &pinctrl_aobus { |
| spdifout: spdifout { |
| mux { /* gpiao_10 */ |
| groups = "spdif_out_ao"; |
| function = "spdif_out_ao"; |
| }; |
| }; |
| |
| spdifout_a_mute: spdifout_a_mute { |
| mux { /* gpiao_10 */ |
| groups = "GPIOAO_10"; |
| function = "gpio_aobus"; |
| }; |
| }; |
| }; /* end of pinctrl_aobus */ |
| |
| &audio_data { |
| status = "okay"; |
| }; |
| |
| /* Audio Related End */ |
| |
| &pwm_ef { |
| status = "okay"; |
| }; |
| |
| &dwc3 { |
| status = "okay"; |
| }; |
| |
| &usb2_phy_v2 { |
| status = "okay"; |
| portnum = <2>; |
| }; |
| |
| &usb3_phy_v2 { |
| status = "okay"; |
| portnum = <1>; |
| otg = <1>; |
| gpio-vbus-power = "GPIOH_6"; |
| gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &dwc2_a { |
| status = "okay"; |
| /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
| controller-type = <3>; |
| }; |
| ðmac { |
| status = "okay"; |
| pinctrl-names = "internal_eth_pins"; |
| pinctrl-0 = <&internal_eth_pins>; |
| mc_val = <0x4be04>; |
| |
| internal_phy=<1>; |
| }; |
| |
| &uart_A { |
| status = "okay"; |
| }; |
| |
| /*if you want to use vdin just modify status to "ok"*/ |
| &vdin0 { |
| memory-region = <&vdin0_cma_reserved>; |
| status = "okay"; |
| /*vdin write mem color depth support: |
| *bit0:support 8bit |
| *bit1:support 9bit |
| *bit2:support 10bit |
| *bit3:support 12bit |
| *bit4:support yuv422 10bit full pack mode (from txl new add) |
| */ |
| tv_bit_mode = <0x15>; |
| }; |
| &vdin1 { |
| memory-region = <&vdin1_cma_reserved>; |
| status = "okay"; |
| /*vdin write mem color depth support: |
| *bit0:support 8bit |
| *bit1:support 9bit |
| *bit2:support 10bit |
| *bit3:support 12bit |
| */ |
| tv_bit_mode = <1>; |
| }; |
| |
| |
| &sd_emmc_c { |
| status = "okay"; |
| emmc { |
| caps = "MMC_CAP_8_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED", |
| "MMC_CAP_NONREMOVABLE", |
| /* "MMC_CAP_1_8V_DDR", */ |
| "MMC_CAP_HW_RESET", |
| "MMC_CAP_ERASE", |
| "MMC_CAP_CMD23"; |
| caps2 = "MMC_CAP2_HS200"; |
| /* "MMC_CAP2_HS400";*/ |
| f_min = <400000>; |
| f_max = <200000000>; |
| }; |
| }; |
| |
| &sd_emmc_b1 { |
| status = "disabled"; |
| sd { |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED"; |
| f_min = <400000>; |
| f_max = <50000000>; |
| }; |
| }; |
| |
| &sd_emmc_b2 { |
| status = "disabled"; |
| sd { |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED"; |
| |
| f_min = <400000>; |
| f_max = <50000000>; |
| }; |
| |
| sdio { |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED", |
| "MMC_CAP_NONREMOVABLE", |
| "MMC_CAP_UHS_SDR12", |
| "MMC_CAP_UHS_SDR25", |
| "MMC_CAP_UHS_SDR50", |
| "MMC_CAP_UHS_SDR104", |
| "MMC_PM_KEEP_POWER", |
| "MMC_CAP_SDIO_IRQ"; |
| |
| f_min = <400000>; |
| f_max = <200000000>; |
| }; |
| }; |
| |
| &sd_emmc_a { |
| status = "disabled"; |
| sdio { |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED", |
| "MMC_CAP_NONREMOVABLE", |
| "MMC_CAP_UHS_SDR12", |
| "MMC_CAP_UHS_SDR25", |
| "MMC_CAP_UHS_SDR50", |
| "MMC_CAP_UHS_SDR104", |
| "MMC_PM_KEEP_POWER", |
| "MMC_CAP_SDIO_IRQ"; |
| f_min = <400000>; |
| f_max = <200000000>; |
| }; |
| }; |
| |
| &nand { |
| status = "disabled"; |
| plat-names = "bootloader","nandnormal"; |
| plat-num = <2>; |
| plat-part-0 = <&bootloader>; |
| plat-part-1 = <&nandnormal>; |
| bootloader: bootloader{ |
| enable_pad ="ce0"; |
| busy_pad = "rb0"; |
| timming_mode = "mode5"; |
| bch_mode = "bch8_1k"; |
| t_rea = <20>; |
| t_rhoh = <15>; |
| chip_num = <1>; |
| part_num = <0>; |
| rb_detect = <1>; |
| }; |
| nandnormal: nandnormal{ |
| enable_pad ="ce0"; |
| busy_pad = "rb0"; |
| timming_mode = "mode5"; |
| bch_mode = "bch8_1k"; |
| plane_mode = "twoplane"; |
| t_rea = <20>; |
| t_rhoh = <15>; |
| chip_num = <2>; |
| part_num = <3>; |
| partition = <&nand_partitions>; |
| rb_detect = <1>; |
| }; |
| nand_partitions:nand_partition{ |
| /* |
| * if bl_mode is 1, tpl size was generate by |
| * fip_copies * fip_size which |
| * will not skip bad when calculating |
| * the partition size; |
| * |
| * if bl_mode is 0, |
| * tpl partition must be comment out. |
| */ |
| tpl{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x0>; |
| }; |
| logo{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x200000>; |
| }; |
| recovery{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x1000000>; |
| }; |
| boot{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x1000000>; |
| }; |
| system{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x4000000>; |
| }; |
| data{ |
| offset=<0xffffffff 0xffffffff>; |
| size=<0x0 0x0>; |
| }; |
| }; |
| }; |
| |
| &pcie_A { |
| reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; |
| status = "disable"; |
| }; |
| |
| &meson_cooldev { |
| status = "okay"; |
| }; |
| |
| &defendkey { |
| status = "okay"; |
| }; |
| |
