| /* |
| * arch/arm/boot/dts/amlogic/txlx_t962x_r311_1g.dts |
| * |
| * Copyright (C) 2017 Amlogic, Inc. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, but WITHOUT |
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| * more details. |
| * |
| */ |
| |
| /dts-v1/; |
| #include <dt-bindings/gpio/meson-txlx-gpio.h> |
| #include <dt-bindings/gpio/gpio.h> |
| |
| #include "mesontxlx.dtsi" |
| #include "partition_mbox_normal_P_32.dtsi" |
| #include "mesontxlx_r311-panel.dtsi" |
| |
| / { |
| model = "Amlogic"; |
| amlogic-dt-id = "txlx_t962x_r314"; |
| compatible = "amlogic, txlx"; |
| interrupt-parent = <&gic>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| aliases { |
| serial0 = &uart_AO; |
| serial1 = &uart_A; |
| serial2 = &uart_B; |
| serial3 = &uart_C; |
| serial4 = &uart_AO_B; |
| spi0 = &spicc0; |
| spi1 = &spicc1; |
| }; |
| |
| ion_dev { |
| compatible = "amlogic, ion_dev"; |
| memory-region = <&ion_reserved>; |
| }; |
| |
| memory@00000000 { |
| device_type = "memory"; |
| linux,usable-memory = <0x0 0x60000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| /* global autoconfigured region for contiguous allocations */ |
| ramoops@0x07400000 { |
| compatible = "ramoops"; |
| reg = <0x07400000 0x00100000>; |
| record-size = <0x8000>; |
| console-size = <0x8000>; |
| ftrace-size = <0x0>; |
| pmsg-size = <0x8000>; |
| }; |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x400000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x05000000 0x400000>; |
| }; |
| |
| //secos_reserved:linux,secos { |
| // status = "disabled"; |
| // compatible = "amlogic, aml_secos_memory"; |
| // reg = <0x0 0x05300000 0x0 0x2000000>; |
| // no-map; |
| //}; |
| |
| |
| |
| logo_reserved:linux,meson-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x5f800000 0x800000>; |
| }; |
| |
| //carveout_reserved:linux,carveout-reserve { |
| // compatible = "amlogic, idev-mem"; |
| // size = <0x0 0x1000>; |
| //}; |
| |
| |
| codec_mm_cma:linux,codec_mm_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* ion_codec_mm max can alloc size 80M*/ |
| size = <0xd000000>; |
| alignment = <0x400000>; |
| linux,contiguous-region; |
| alloc-ranges = <0x30000000 0x10000000>; |
| }; |
| ion_reserved:linux,ion-dev { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x4C00000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x0 0x30000000>; |
| }; |
| |
| /*di CMA pool */ |
| di_cma_reserved:linux,di_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* buffer_size = 3621952(yuv422 8bit) |
| * | 4736064(yuv422 10bit) |
| * | 4179008(yuv422 10bit full pack mode) |
| * 10x3621952=34.6M(0x23) support 8bit |
| * 10x4736064=45.2M(0x2e) support 12bit |
| * 10x4179008=40M(0x28) support 10bit |
| */ |
| size = <0x02800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x30000000 0x10000000>; |
| }; |
| |
| /* POST PROCESS MANAGER */ |
| ppmgr_reserved:linux,ppmgr { |
| compatible = "amlogic, ppmgr_memory"; |
| size = <0x0>; |
| }; |
| |
| picdec_cma_reserved:linux,picdec { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0>; |
| alignment = <0x0>; |
| linux,contiguous-region; |
| }; |
| |
| /* codec shared reserved */ |
| codec_mm_reserved:linux,codec_mm_reserved { |
| compatible = "amlogic, codec-mm-reserved"; |
| size = <0x0>; |
| alignment = <0x100000>; |
| //no-map; |
| }; |
| |
| demod_cma_reserved:linux,demod_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| /* 5M */ |
| size = <0x0800000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x0 0x30000000>; |
| }; |
| |
| /* vdin1 CMA pool */ |
| vdin1_cma_reserved:linux,vdin1_cma { |
| compatible = "shared-dma-pool"; |
| linux,phandle = <5>; |
| reusable; |
| /* 1920x1080x2x4 =16+4 M */ |
| size = <0x01400000>; |
| alignment = <0x400000>; |
| alloc-ranges = <0x0 0x30000000>; |
| }; |
| }; |
| |
| amlogic_battery:dummy-battery { |
| compatible = "amlogic, dummy-battery"; |
| status = "disabled"; |
| }; |
| |
| amlogic_charger:dummy-charger { |
| compatible = "amlogic, dummy-charger"; |
| status = "disabled"; |
| }; |
| |
| /* for external keypad */ |
| adc_keypad { |
| compatible = "amlogic, adc_keypad"; |
| status = "okay"; |
| key_name = "power","up","down","enter","left","right","home"; |
| key_num = <7>; |
| io-channels = <&saradc SARADC_CH2>, |
| <&saradc SARADC_CH3>; |
| io-channel-names = "key-chan-2", "key-chan-3"; |
| key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2 |
| SARADC_CH2 SARADC_CH3 SARADC_CH3>; |
| key_code = <116 103 108 28 105 106 102>; |
| key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023 |
| key_tolerance = <40 40 40 40 40 40 40>; |
| }; |
| |
| gpioleds { |
| compatible = "gpio-leds"; |
| status = "okay"; |
| |
| sys { |
| label = "sysled"; |
| gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; |
| default-state = "on"; /* keep/on/off */ |
| linux,default-trigger = "none"; |
| }; |
| |
| }; |
| |
| pwmleds { |
| compatible = "pwm-leds"; |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwmleds_pins>; |
| |
| sys { |
| active-low; |
| label = "sysled"; |
| max-brightness = <255>; |
| pwms = <&pwm_AO_ab 0 50000 0>; |
| }; |
| }; |
| |
| ethmac: ethernet@0xff3f0000 { |
| compatible = "amlogic, gxbb-eth-dwmac"; |
| status = "okay"; |
| reg = <0xff3f0000 0x10000 |
| 0xff634540 0x8 |
| 0xff634558 0xc |
| 0xffd01084 0x4>; |
| interrupts = <0 8 1 |
| 0 9 1>; |
| |
| phy-mode= "rmii"; |
| mc_val_internal_phy = <0x1804>; |
| mc_val_external_phy = <0x1621>; |
| interrupt-names = "macirq", |
| "phyirq"; |
| clocks = <&clkc CLKID_ETH_CORE>; |
| clock-names = "ethclk81"; |
| internal_phy = <1>; |
| }; |
| |
| vout { |
| compatible = "amlogic, vout"; |
| dev_name = "vout"; |
| status = "okay"; |
| fr_auto_policy = <0>; |
| }; |
| |
| meson-fb { |
| compatible = "amlogic, meson-txlx"; |
| memory-region = <&logo_reserved>; |
| dev_name = "meson-fb"; |
| status = "okay"; |
| interrupts = <0 3 1 |
| 0 89 1>; |
| interrupt-names = "viu-vsync", "rdma"; |
| mem_size = <0x00800000 0x01800000 0x00100000>; |
| /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/ |
| display_mode_default = "1080p60hz"; |
| /* 0:VPU free scale 1:OSD free scale 2:OSD super scale */ |
| scale_mode = <1>; |
| /* 1920*1080*4*3 = 0x17BB000 */ |
| display_size_default = <1920 1080 1920 3240 32>; |
| pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
| logo_addr = "0x5f800000"; |
| }; |
| |
| ge2d { |
| compatible = "amlogic, ge2d-txlx"; |
| dev_name = "ge2d"; |
| status = "okay"; |
| interrupts = <0 150 1>; |
| interrupt-names = "ge2d"; |
| clocks = <&clkc CLKID_VAPB_MUX>, |
| <&clkc CLKID_G2D>, |
| <&clkc CLKID_GE2D_GATE>; |
| clock-names = "clk_vapb_0", |
| "clk_ge2d", |
| "clk_ge2d_gate"; |
| reg = <0xff940000 0x10000>; |
| }; |
| |
| codec_io { |
| compatible = "amlogic, codec_io"; |
| status = "okay"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| ranges; |
| io_cbus_base{ |
| reg = <0xffd00000 0x100000>; |
| }; |
| io_dos_base{ |
| reg = <0xff620000 0x10000>; |
| }; |
| io_hiubus_base{ |
| reg = <0xff63c000 0x2000>; |
| }; |
| io_aobus_base{ |
| reg = <0xff800000 0x10000>; |
| }; |
| io_vcbus_base{ |
| reg = <0xff900000 0x40000>; |
| }; |
| io_dmc_base{ |
| reg = <0xff638000 0x2000>; |
| }; |
| }; |
| |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| dev_name = "codec_mm"; |
| status = "okay"; |
| }; |
| |
| mesonstream { |
| compatible = "amlogic, codec, streambuf"; |
| dev_name = "mesonstream"; |
| status = "okay"; |
| clocks = <&clkc CLKID_DOS_PARSER |
| &clkc CLKID_DEMUX |
| &clkc CLKID_DOS |
| &clkc CLKID_CLK81 |
| &clkc CLKID_VDEC_MUX |
| &clkc CLKID_HCODEC_MUX |
| &clkc CLKID_HEVC_MUX>; |
| clock-names = "parser_top", |
| "demux", |
| "vdec", |
| "clk_81", |
| "clk_vdec_mux", |
| "clk_hcodec_mux", |
| "clk_hevc_mux"; |
| }; |
| |
| vdec { |
| compatible = "amlogic, vdec"; |
| dev_name = "vdec.0"; |
| status = "okay"; |
| interrupts = <0 3 1 |
| 0 23 1 |
| 0 32 1 |
| 0 43 1 |
| 0 44 1 |
| 0 45 1>; |
| interrupt-names = "vsync", |
| "demux", |
| "parser", |
| "mailbox_0", |
| "mailbox_1", |
| "mailbox_2"; |
| }; |
| |
| meson-amvideom { |
| compatible = "amlogic, amvideom"; |
| dev_name = "amvideom"; |
| status = "okay"; |
| interrupts = <0 3 1>; |
| interrupt-names = "vsync"; |
| }; |
| |
| |
| |
| amvideocap { |
| compatible = "amlogic, amvideocap"; |
| dev_name = "amvideocap.0"; |
| status = "disabled"; |
| max_size = <8>;//8M |
| }; |
| |
| picdec { |
| compatible = "amlogic, picdec"; |
| memory-region = <&picdec_cma_reserved>; |
| dev_name = "picdec"; |
| status = "okay"; |
| }; |
| |
| ppmgr { |
| compatible = "amlogic, ppmgr"; |
| memory-region = <&ppmgr_reserved>; |
| dev_name = "ppmgr"; |
| status = "okay"; |
| }; |
| |
| deinterlace { |
| compatible = "amlogic, deinterlace"; |
| status = "okay"; |
| /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
| flag_cma = <1>; |
| //memory-region = <&di_reserved>; |
| memory-region = <&di_cma_reserved>; |
| interrupts = <0 46 1 |
| 0 6 1>; |
| interrupt-names = "de_irq"; |
| clocks = <&clkc CLKID_VPU_MUX>, |
| <&clkc CLKID_FCLK_DIV4>, |
| <&clkc CLKID_VPU_CLKB_TMP_COMP>, |
| <&clkc CLKID_VPU_CLKB_COMP>; |
| clock-names = "vpu_mux", |
| "fclk_div4", |
| "vpu_clkb_tmp_composite", |
| "vpu_clkb_composite"; |
| clock-range = <250 500>; |
| /* buffer-size = <3621952>;(yuv422 8bit) */ |
| buffer-size = <4179008>;/*yuv422 fullpack*/ |
| /* reserve-iomap = "true"; */ |
| /* if enable nr10bit, set nr10bit-support to 1 */ |
| nr10bit-support = <1>; |
| }; |
| ionvideo { |
| compatible = "amlogic, ionvideo"; |
| dev_name = "ionvideo"; |
| status = "okay"; |
| }; |
| |
| amlvideo { |
| compatible = "amlogic, amlvideo"; |
| dev_name = "amlvideo"; |
| status = "okay"; |
| }; |
| |
| amlvideo2_0 { |
| compatible = "amlogic, amlvideo2"; |
| dev_name = "amlvideo2"; |
| status = "okay"; |
| amlvideo2_id = <0>; |
| cma_mode = <1>; |
| }; |
| |
| amlvideo2_1 { |
| compatible = "amlogic, amlvideo2"; |
| dev_name = "amlvideo2"; |
| status = "okay"; |
| amlvideo2_id = <1>; |
| cma_mode = <1>; |
| }; |
| |
| hdmirx { |
| compatible = "amlogic, hdmirx_txlx"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| dev_name = "hdmirx"; |
| status = "okay"; |
| pinctrl-names = "hdmirx_pins"; |
| pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux |
| &hdmirx_c_mux &hdmirx_d_mux>; |
| repeat = <0>; |
| interrupts = <0 56 1>; |
| clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, |
| <&clkc CLKID_HDMIRX_CFG_COMP>, |
| <&clkc CLKID_HDMIRX_ACR_COMP>, |
| <&clkc CLKID_HDMIRX_AUDMEAS_COMP>, |
| <&xtal>, |
| <&clkc CLKID_FCLK_DIV5>, |
| <&clkc CLKID_FCLK_DIV7>, |
| <&clkc CLKID_HDCP22_SKP_COMP>, |
| <&clkc CLKID_HDCP22_ESM_COMP>; |
| // <&clkc CLK_AUD_PLL2FS>, |
| // <&clkc CLK_AUD_PLL4FS>, |
| // <&clkc CLK_AUD_OUT>; |
| clock-names = "hdmirx_modet_clk", |
| "hdmirx_cfg_clk", |
| "hdmirx_acr_ref_clk", |
| "hdmirx_audmeas_clk", |
| "xtal", |
| "fclk_div5", |
| "fclk_div7", |
| "hdcp_rx22_skp", |
| "hdcp_rx22_esm"; |
| // "hdmirx_aud_pll2fs", |
| // "hdmirx_aud_pll4f", |
| // "clk_aud_out"; |
| hdmirx_id = <0>; |
| en_4k_2_2k = <0>; |
| hpd_low_cec_off = <1>; |
| /* bit4: enable feature, bit3~0: port number */ |
| disable_port = <0x0>; |
| reg = <0xffd26000 0xa00000 |
| 0xff63C000 0x2000 |
| 0xffe0d000 0x2000 |
| 0xff63e000 0x2000 |
| 0x0 0x0 |
| 0xff634400 0x2000 |
| 0xff646000 0x2000>; |
| }; |
| |
| vdin0 { |
| compatible = "amlogic, vdin"; |
| /*memory-region = <&vdin0_cma_reserved>;*/ |
| dev_name = "vdin0"; |
| status = "okay"; |
| reserve-iomap = "true"; |
| /*bit0:(1:share with codec_mm;0:cma alone)*/ |
| /*bit8:(1:alloc in discontinus way;0:alone in continuous way)*/ |
| flag_cma = <0x101>; |
| /* MByte, if 10bit disable: 64M(YUV422), |
| * if 10bit enable: 64*1.5 = 96M(YUV422) |
| * if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M |
| * if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 190M |
| * if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M |
| * if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M |
| * if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M |
| */ |
| cma_size = <190>; |
| interrupts = <0 83 1>; |
| rdma-irq = <2>; |
| clocks = <&clkc CLKID_FCLK_DIV5>, |
| <&clkc CLKID_VDIN_MEAS_COMP>; |
| clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| vdin_id = <0>; |
| /* vdin write mem color depth support: |
| * bit0:support 8bit |
| * bit1:support 9bit |
| * bit2:support 10bit |
| * bit3:support 12bit |
| * bit4:support yuv422 10bit full pack mode (from txl new add) |
| * bit8:use 8bit at 4k_50/60hz_10bit |
| * bit9:use 10bit at 4k_50/60hz_10bit |
| */ |
| tv_bit_mode = <0x215>; |
| }; |
| |
| vdin1 { |
| compatible = "amlogic, vdin"; |
| memory-region = <&vdin1_cma_reserved>; |
| dev_name = "vdin1"; |
| status = "okay"; |
| reserve-iomap = "true"; |
| flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/ |
| interrupts = <0 85 1>; |
| rdma-irq = <4>; |
| clocks = <&clkc CLKID_FCLK_DIV5>, |
| <&clkc CLKID_VDIN_MEAS_COMP>; |
| clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
| vdin_id = <1>; |
| /* vdin write mem color depth support: |
| * bit0:support 8bit |
| * bit1:support 9bit |
| * bit2:support 10bit |
| * bit3:support 12bit |
| */ |
| tv_bit_mode = <1>; |
| }; |
| |
| tvafe { |
| compatible = "amlogic, tvafe-txlx"; |
| /*memory-region = <&tvafe_cma_reserved>;*/ |
| dev_name = "tvafe"; |
| status = "okay"; |
| flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ |
| cma_size = <5>;/*MByte*/ |
| reg = <0xff642000 0x2000>;/*tvafe reg base*/ |
| reserve-iomap = "true"; |
| tvafe_id = <0>; |
| //pinctrl-names = "default"; |
| /*!!particular sequence, no more and no less!!!*/ |
| tvafe_pin_mux = < |
| 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ |
| 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ |
| 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ |
| 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ |
| >; |
| clocks = <&clkc CLKID_DAC_CLK>; |
| clock-names = "vdac_clk_gate"; |
| }; |
| |
| vbi { |
| compatible = "amlogic, vbi"; |
| dev_name = "vbi"; |
| status = "okay"; |
| interrupts = <0 83 1>; |
| }; |
| |
| tvafe_avin_detect { |
| compatible = "amlogic, tvafe_avin_detect"; |
| dev_name = "tvafe_avin_detect"; |
| status = "okay"; |
| device_mask = <1>;/*bit0:ch1;bit1:ch2*/ |
| interrupts = <0 12 1>, |
| <0 13 1>; |
| }; |
| |
| amlvecm { |
| compatible = "amlogic, vecm"; |
| dev_name = "aml_vecm"; |
| status = "okay"; |
| gamma_en = <1>;/*1:enabel ;0:disable*/ |
| wb_en = <1>;/*1:enabel ;0:disable*/ |
| cm_en = <1>;/*1:enabel ;0:disable*/ |
| wb_sel = <1>;/*1:mtx ;0:gainoff*/ |
| vlock_en = <1>;/*1:enable;0:disable*/ |
| vlock_mode = <0x4>; |
| /* vlock work mode: |
| *bit0:auto ENC |
| *bit1:auto PLL |
| *bit2:manual PLL |
| *bit3:manual ENC |
| *bit4:manual soft ENC |
| *bit5:manual MIX PLL ENC |
| */ |
| vlock_pll_m_limit = <1>; |
| vlock_line_limit = <3>; |
| }; |
| amdolby_vision { |
| compatible = "amlogic, dolby_vision_txlx"; |
| dev_name = "aml_amdolby_vision_driver"; |
| status = "okay"; |
| tv_mode = <1>;/*1:enabel ;0:disable*/ |
| }; |
| amvenc_avc { |
| compatible = "amlogic, amvenc_avc"; |
| //memory-region = <&amvenc_avc_reserved>; |
| //memory-region = <&avc_cma_reserved>; |
| dev_name = "amvenc_avc"; |
| status = "okay"; |
| interrupts = <0 45 1>; |
| interrupt-names = "mailbox_2"; |
| }; |
| |
| tuner: tuner { |
| compatible = "amlogic, tuner"; |
| status = "disabled"; |
| tuner_cur = <0>; /* default use tuner */ |
| tuner_num = <1>; /* tuner number, multi tuner support */ |
| tuner_name_0 = "mxl661_tuner"; |
| tuner_i2c_adap_0 = <&i2c1>; |
| tuner_i2c_addr_0 = <0x60>; |
| tuner_xtal_0 = <0>; /* 0: 16MHz, 1: 24MHz */ |
| tuner_xtal_mode_0 = <0>; |
| /* NO_SHARE_XTAL(0) |
| * SLAVE_XTAL_SHARE(1) |
| */ |
| tuner_xtal_cap_0 = <30>; /* when tuner_xtal_mode = 1, set 25 */ |
| }; |
| |
| atv-demod { |
| compatible = "amlogic, atv-demod"; |
| status = "disabled"; |
| tuner = <&tuner>; |
| btsc_sap_mode = <1>; |
| /* pinctrl-names="atvdemod_agc_pins"; */ |
| /* pinctrl-0=<&atvdemod_agc_pins>; */ |
| reg = <0xff640000 0x2000 /* demod reg */ |
| 0xff63c000 0x2000 /* hiu reg */ |
| 0xff634000 0x2000 /* periphs reg */ |
| 0xff648000 0x2000>; /* audio reg */ |
| reg_23cf = <0x88188832>; |
| /*default:0x88188832;r840 on haier:0x48188832*/ |
| }; |
| |
| bt-dev { |
| compatible = "amlogic, bt-dev"; |
| dev_name = "bt-dev"; |
| status = "okay"; |
| power_down_disable = <1>; |
| gpio_reset = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>; |
| //gpio_en = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| rtc { |
| compatible = "amlogic, aml_vrtc"; |
| alarm_reg_addr = <0xff8000a8>; |
| timer_e_addr = <0xffd0f188>; |
| init_date = "2015/01/01"; |
| status = "okay"; |
| }; |
| |
| wifi { |
| compatible = "amlogic, aml_wifi"; |
| dev_name = "aml_wifi"; |
| status = "okay"; |
| interrupt_pin = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>; |
| interrupts = <0 68 4>; |
| irq_trigger_type = "GPIO_IRQ_HIGH"; |
| dhd_static_buf; |
| power_on_pin = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wifi_32k_pins>; |
| pwm_config = <&wifi_pwm_conf>; |
| }; |
| |
| wifi_pwm_conf: wifi_pwm_conf { |
| pwm_channel1_conf { |
| pwms = <&pwm_cd MESON_PWM_1 30541 0>; |
| duty-cycle = <15270>; |
| times = <10>; |
| }; |
| pwm_channel2_conf { |
| pwms = <&pwm_cd MESON_PWM_3 30500 0>; |
| duty-cycle = <15250>; |
| times = <12>; |
| }; |
| }; |
| |
| sd_emmc_c: emmc@ffe07000 { |
| status = "okay"; |
| compatible = "amlogic, meson-mmc-txlx"; |
| reg = <0xffe07000 0x2000>; |
| interrupts = <0 218 1>; |
| pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins"; |
| pinctrl-0 = <&emmc_clk_cmd_pins>; |
| pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>; |
| clocks = <&clkc CLKID_SD_EMMC_C>, |
| <&clkc CLKID_SD_EMMC_C_P0_COMP>, |
| <&clkc CLKID_FCLK_DIV2>, |
| <&clkc CLKID_FCLK_DIV5>, |
| <&xtal>; |
| clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
| |
| bus-width = <8>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| |
| max-frequency = <200000000>; |
| non-removable; |
| disable-wp; |
| emmc { |
| status = "disabled"; |
| pinname = "emmc"; |
| ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ |
| caps = "MMC_CAP_8_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED", |
| "MMC_CAP_NONREMOVABLE", |
| "MMC_CAP_1_8V_DDR", |
| "MMC_CAP_HW_RESET", |
| "MMC_CAP_ERASE", |
| "MMC_CAP_CMD23"; |
| caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400"; |
| f_min = <400000>; |
| f_max = <200000000>; |
| max_req_size = <0x20000>; /**128KB*/ |
| gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>; |
| hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>; |
| card_type = <1>; |
| /* 1:mmc card(include eMMC), |
| * 2:sd card(include tSD) |
| */ |
| }; |
| }; |
| |
| sd_emmc_b: sd@ffe05000 { |
| status = "okay"; |
| compatible = "amlogic, meson-mmc-txlx"; |
| reg = <0xffe05000 0x2000>; |
| interrupts = <0 217 1>; |
| pinctrl-names = "sd_all_pins", |
| "sd_clk_cmd_pins", |
| "sd_1bit_pins", |
| "sd_clk_cmd_uart_pins", |
| "sd_1bit_uart_pins", |
| "sd_to_ao_uart_pins", |
| "ao_to_sd_uart_pins", |
| "ao_to_sd_jtag_pins", |
| "sd_to_ao_jtag_pins"; |
| pinctrl-0 = <&sd_all_pins>; |
| pinctrl-1 = <&sd_clk_cmd_pins>; |
| pinctrl-2 = <&sd_1bit_pins>; |
| pinctrl-3 = <&sd_to_ao_uart_clr_pins |
| &sd_clk_cmd_pins &ao_to_sd_uart_pins>; |
| pinctrl-4 = <&sd_to_ao_uart_clr_pins |
| &sd_1bit_pins &ao_to_sd_uart_pins>; |
| pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>; |
| pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>; |
| pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>; |
| pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>; |
| clocks = <&clkc CLKID_SD_EMMC_B>, |
| <&clkc CLKID_SD_EMMC_B_P0_COMP>, |
| <&clkc CLKID_FCLK_DIV2>, |
| <&clkc CLKID_FCLK_DIV5>, |
| <&xtal>; |
| clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
| |
| bus-width = <4>; |
| cap-sd-highspeed; |
| max-frequency = <100000000>; |
| disable-wp; |
| sd { |
| status = "disabled"; |
| pinname = "sd"; |
| ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED"; |
| /* "MMC_CAP_UHS_SDR12", |
| * "MMC_CAP_UHS_SDR25", |
| * "MMC_CAP_UHS_SDR50", |
| * "MMC_CAP_UHS_SDR104"; |
| */ |
| f_min = <400000>; |
| f_max = <200000000>; |
| max_req_size = <0x20000>; /**128KB*/ |
| gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>; |
| jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>; |
| gpio_cd = <&gpio GPIOH_10 GPIO_ACTIVE_HIGH>; |
| card_type = <5>; |
| /* 3:sdio device(ie:sdio-wifi), |
| * 4:SD combo (IO+mem) card |
| * 5:NON sdio device(means sd/mmc card) |
| */ |
| }; |
| }; |
| |
| unifykey { |
| compatible = "amlogic, unifykey"; |
| status = "okay"; |
| |
| unifykey-num = <21>; |
| unifykey-index-0 = <&keysn_0>; |
| unifykey-index-1 = <&keysn_1>; |
| unifykey-index-2 = <&keysn_2>; |
| unifykey-index-3 = <&keysn_3>; |
| unifykey-index-4 = <&keysn_4>; |
| unifykey-index-5 = <&keysn_5>; |
| unifykey-index-6 = <&keysn_6>; |
| unifykey-index-7 = <&keysn_7>; |
| unifykey-index-8 = <&keysn_8>; |
| unifykey-index-9 = <&keysn_9>; |
| unifykey-index-10= <&keysn_10>; |
| unifykey-index-11 = <&keysn_11>; |
| unifykey-index-12 = <&keysn_12>; |
| unifykey-index-13 = <&keysn_13>; |
| unifykey-index-14 = <&keysn_14>; |
| unifykey-index-15 = <&keysn_15>; |
| unifykey-index-16 = <&keysn_16>; |
| unifykey-index-17 = <&keysn_17>; |
| unifykey-index-18 = <&keysn_18>; |
| unifykey-index-19 = <&keysn_19>; |
| unifykey-index-20 = <&keysn_20>; |
| |
| keysn_0: key_0{ |
| key-name = "usid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_1:key_1{ |
| key-name = "mac"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_2:key_2{ |
| key-name = "hdcp"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_3:key_3{ |
| key-name = "secure_boot_set"; |
| key-device = "efuse"; |
| key-permit = "write"; |
| }; |
| keysn_4:key_4{ |
| key-name = "mac_bt"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_5:key_5{ |
| key-name = "mac_wifi"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| key-type = "mac"; |
| }; |
| keysn_6:key_6{ |
| key-name = "hdcp2_tx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_7:key_7{ |
| key-name = "hdcp2_rx"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_8:key_8{ |
| key-name = "widevinekeybox"; |
| key-device = "secure"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_9:key_9{ |
| key-name = "deviceid"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_10:key_10{ |
| key-name = "hdcp22_fw_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_11:key_11{ |
| key-name = "hdcp22_rx_private"; |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_12:key_12{ |
| key-name = "hdcp22_rx_fw"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_13:key_13{ |
| key-name = "hdcp14_rx"; |
| key-device = "normal"; |
| key-type = "sha1"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_14:key_14{ |
| key-name = "prpubkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_15:key_15{ |
| key-name = "prprivkeybox";// PlayReady |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_16:key_16{ |
| key-name = "lcd"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_17:key_17{ |
| key-name = "lcd_extern"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_18:key_18{ |
| key-name = "backlight"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_19:key_19{ |
| key-name = "attestationkeybox";// attestation key |
| key-device = "secure"; |
| key-permit = "read","write","del"; |
| }; |
| keysn_20:key_20{ |
| key-name = "region_code"; |
| key-device = "normal"; |
| key-permit = "read","write","del"; |
| }; |
| }; /* End unifykey */ |
| |
| cvbsout { |
| compatible = "amlogic, cvbsout-txlx"; |
| dev_name = "cvbsout"; |
| status = "disabled"; |
| clocks = <&clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_DAC_CLK>; |
| clock-names = "venci_top_gate", |
| "venci_0_gate", |
| "venci_1_gate", |
| "vdac_clk_gate"; |
| |
| /* performance: reg_address, reg_value */ |
| performance = <0x1b56 0x343 |
| 0x1b05 0xf4 |
| 0x1c59 0xfc48 |
| 0x1b12 0x8c00 |
| 0xffff 0x0>; /* ending flag */ |
| }; |
| |
| amhdmitx: amhdmitx { |
| compatible = "amlogic, amhdmitx"; |
| dev_name = "amhdmitx"; |
| status = "disabled"; |
| pinctrl-names="default", "hdmitx_i2c"; |
| pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>; |
| pinctrl-1=<&hdmitx_hpd_gpio &i2c2_h_pins>; |
| /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ |
| interrupts = <0 57 1>; |
| interrupt-names = "hdmitx_hpd"; |
| /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM |
| * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD |
| */ |
| ic_type = <6>; |
| //gpio_i2c_en = <0>; |
| //repeater_tx = <0x1>; |
| //#address-cells = <2>; |
| //#size-cells = <2>; |
| //ranges; |
| }; |
| |
| i2c_gpio: i2c_gpio { |
| compatible = "i2c-gpio"; |
| dev_name = "i2c-gpio"; |
| status = "disabled"; |
| i2c-gpio,delay-us = <10>; /* 50 kHz */ |
| gpios = <&gpio GPIOH_2 0 |
| &gpio GPIOH_3 0>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| i2c-gpio,timeout-ms = <10>; |
| i2c_gpio_edid: i2c_gpio_edid { |
| compatible = "i2c-gpio"; |
| reg = <0x50 0x0 0x0 0x0>; |
| }; |
| }; |
| |
| aocec: aocec { |
| compatible = "amlogic, aocec-txlx"; |
| device_name = "aocec"; |
| status = "okay"; |
| vendor_name = "Amlogic"; /* Max Chars: 8 */ |
| /* Refer to the following URL at: |
| * http://standards.ieee.org/develop/regauth/oui/oui.txt |
| */ |
| vendor_id = <0x000000>; |
| product_desc = "TXLX"; /* Max Chars: 16 */ |
| cec_osd_string = "AML_TV"; /* Max Chars: 14 */ |
| port_num = <4>; |
| /*ee_cec;*/ |
| arc_port_mask = <0x2>; |
| interrupts = <0 205 1 |
| 0 199 1>; |
| interrupt-names = "hdmi_aocecb","hdmi_aocec"; |
| pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; |
| pinctrl-0=<&hdmitx_aocec>; |
| pinctrl-1=<&hdmitx_aocecb>; |
| pinctrl-2=<&hdmitx_aocecb>; |
| reg = <0xFF80023c 0x4 |
| 0xFF800000 0x400>; |
| reg-names = "ao_exit","ao"; |
| }; |
| |
| |
| canvas { |
| compatible = "amlogic, meson, canvas"; |
| dev_name = "amlogic-canvas"; |
| status = "okay"; |
| reg = <0xff638000 0x2000>; |
| }; |
| |
| rdma { |
| compatible = "amlogic, meson, rdma"; |
| dev_name = "amlogic-rdma"; |
| status = "okay"; |
| interrupts = <0 89 1>; |
| interrupt-names = "rdma"; |
| }; |
| |
| dwc3: dwc3@ff500000 { |
| compatible = "synopsys, dwc3"; |
| status = "okay"; |
| reg = <0xff500000 0x100000>; |
| interrupts = <0 30 4>; |
| usb-phy = <&usb2_phy>, <&usb3_phy>; |
| cpu-type = "gxl"; |
| clock-src = "usb3.0"; |
| }; |
| |
| usb2_phy: usb2phy@ffe09000 { |
| compatible = "amlogic, amlogic-new-usb2"; |
| status = "okay"; |
| portnum = <4>; |
| reg = <0xffe09000 0x80 |
| 0xffd01008 0x4>; |
| }; |
| |
| usb3_phy: usb3phy@ffe09080 { |
| compatible = "amlogic, amlogic-new-usb3"; |
| status = "okay"; |
| portnum = <0>; |
| reg = <0xffe09080 0x20>; |
| }; |
| |
| dwc2_a { |
| compatible = "amlogic, dwc2"; |
| device_name = "dwc2_a"; |
| reg = <0xff400000 0x40000>; |
| status = "okay"; |
| interrupts = <0 31 4>; |
| pl-periph-id = <0>; /** lm name */ |
| clock-src = "usb0"; /** clock src */ |
| port-id = <0>; /** ref to mach/usb.h */ |
| port-type = <2>; /** 0: otg, 1: host, 2: slave */ |
| port-speed = <0>; /** 0: default, high, 1: full */ |
| port-config = <0>; /** 0: default */ |
| /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/ |
| port-dma = <0>; |
| port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/ |
| usb-fifo = <728>; |
| cpu-type = "gxl"; |
| /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
| controller-type = <1>; |
| phy-reg = <0xffe09000>; |
| phy-reg-size = <0xa0>; |
| clocks = <&clkc CLKID_USB_GENERAL |
| &clkc CLKID_USB1_TO_DDR>; |
| clock-names = "usb_general", |
| "usb1"; |
| }; |
| |
| /* Sound iomap */ |
| aml_snd_iomap { |
| compatible = "amlogic, meson-snd-iomap"; |
| status = "okay"; |
| #address-cells=<1>; |
| #size-cells=<1>; |
| ranges; |
| io_audin_base { |
| reg = <0xffd03000 0x100000>; |
| }; |
| io_aiu_base { |
| reg = <0xFFCFFC00 0x100000>; |
| }; |
| io_eqdrc_base { |
| reg = <0xFFCFF000 0x100000>; |
| }; |
| io_hiu_reset_base { |
| reg = <0xFFCFCC00 0x100000>; |
| }; |
| io_isa_base { |
| reg = <0xFFD05800 0x100000>; |
| }; |
| }; |
| |
| /* AUDIO DEVICES */ |
| i2s_dai: I2S { |
| #sound-dai-cells = <0>; |
| /* config mpll whether same with audin */ |
| clocks = <&clkc CLKID_MPLL3>, |
| <&clkc CLKID_AMCLK_COMP>, |
| <&clkc CLKID_AIU_GLUE>, |
| <&clkc CLKID_I2S_OUT>, |
| <&clkc CLKID_AMCLK_MEASURE>, |
| <&clkc CLKID_AIFIFO2>, |
| <&clkc CLKID_MIXER>, |
| <&clkc CLKID_MIXER_IFACE>, |
| <&clkc CLKID_ADC>, |
| <&clkc CLKID_AIU_TOP>, |
| <&clkc CLKID_AOCLK_GATE>, |
| <&clkc CLKID_I2S_SPDIF>, |
| <&clkc CLKID_DAC_CLK>; |
| clock-names = "mpll", |
| "mclk", |
| "top_glue", |
| "i2s_out", |
| "amclk_measure", |
| "aififo2", |
| "aud_mixer", |
| "mixer_reg", |
| "adc", |
| "top_level", |
| "aoclk", |
| "aud_in", |
| "vdac_clk"; |
| compatible = "amlogic, aml-i2s-dai"; |
| }; |
| |
| i2s2_dai: I2S2 { |
| #sound-dai-cells = <0>; |
| /* config mpll whether same with aiu */ |
| clocks = <&clkc CLKID_MPLL2>, |
| <&clkc CLKID_AUDIN_MCLK_COMP>, |
| <&clkc CLKID_AUDIN_SCLK_COMP>, |
| <&clkc CLKID_AUDIN_LRCLK_COMP>; |
| clock-names = "audin_mpll", |
| "audin_mclk", |
| "audin_sclk", |
| "audin_lrclk"; |
| compatible = "amlogic, aml-i2s2-dai"; |
| }; |
| |
| spdif_dai: SPDIF { |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml-spdif-dai"; |
| clocks = <&clkc CLKID_MPLL1>, |
| <&clkc CLKID_IEC958_INT_COMP>, |
| <&clkc CLKID_AMCLK_COMP>, |
| <&clkc CLKID_IEC958_MUX>, |
| <&clkc CLKID_CLK81>, |
| <&clkc CLKID_IEC958>, |
| <&clkc CLKID_IEC958_GATE>; |
| clock-names = |
| "mpll1", |
| "i958", |
| "mclk", |
| "spdif", |
| "clk_81", |
| "iec958", |
| "iec958_amclk"; |
| }; |
| |
| pcm_dai: PCM { |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml-pcm-dai"; |
| pinctrl-names = "audio_pcm"; |
| /* disable pcm pin mux temporary, enable it if necessary */ |
| /*pinctrl-0 = <&aml_audio_pcm>;*/ |
| clocks = <&clkc CLKID_MPLL0>, |
| <&clkc CLKID_PCM_MCLK_COMP>, |
| <&clkc CLKID_PCM_SCLK_COMP>; |
| clock-names = "mpll0", "pcm_mclk", "pcm_sclk"; |
| pcm_mode = <1>; /* 0=slave mode, 1=master mode */ |
| }; |
| |
| i2s_plat: i2s_platform { |
| compatible = "amlogic, aml-i2s"; |
| interrupts = <0 29 1>; |
| }; |
| |
| pcm_plat: pcm_platform { |
| compatible = "amlogic, aml-pcm"; |
| }; |
| |
| spdif_codec: spdif_codec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml-spdif-codec"; |
| pinctrl-names = "audio_spdif_out", "audio_spdif_out_mute"; |
| /* disable spdif pin mux temporary, enable it if necessary */ |
| /*pinctrl-0 = <&audio_spdif_out_pins>;*/ |
| /*pinctrl-1 = <&audio_spdif_out_mute_pins>;*/ |
| }; |
| |
| pcm_codec: pcm_codec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, pcm2BT-codec"; |
| }; |
| /* end of AUDIO DEVICES */ |
| |
| /* AUDIO board specific */ |
| dummy_codec:dummy{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_dummy_codec"; |
| status = "okay"; |
| }; |
| |
| amlogic_codec:txlx_acodec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, txlx_acodec"; |
| reg = <0xFF632000 0x1c>; |
| status = "okay"; |
| }; |
| |
| aml_snd_tv { |
| compatible = "amlogic, txlx-snd-tv"; |
| status = "okay"; |
| aml-sound-card,format = "i2s"; |
| aml_sound_card,name = "AML-TVAUDIO"; |
| pinctrl-names = "audio_i2s"; |
| pinctrl-0 = <&aml_audio_i2s>; |
| /*avout mute gpio*/ |
| mute_gpio-gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>; |
| /*analog amp mute*/ |
| /*amp_mute_gpio-gpios = <&gpio GPIOZ_18 GPIO_ACTIVE_LOW>;*/ |
| aux_dev = <&tas5707>; |
| cpu_list = <&cpudai0 &cpudai1 &cpudai2 &cpudai3>; |
| codec_list = <&codec0 &codec1 &codec2 &codec3>; |
| plat_list = <&i2s_plat &i2s_plat &pcm_plat &i2s_plat>; |
| cpudai0: cpudai0 { |
| sound-dai = <&i2s_dai>; |
| }; |
| cpudai1: cpudai1 { |
| sound-dai = <&spdif_dai>; |
| }; |
| cpudai2: cpudai2 { |
| sound-dai = <&pcm_dai>; |
| }; |
| cpudai3: cpudai3 { |
| sound-dai = <&i2s2_dai>; |
| }; |
| codec0: codec0 { |
| sound-dai = <&amlogic_codec>; |
| }; |
| codec1: codec1 { |
| sound-dai = <&spdif_codec>; |
| }; |
| codec2: codec2 { |
| sound-dai = <&pcm_codec>; |
| }; |
| codec3: codec3 { |
| sound-dai = <&dummy_codec>; |
| }; |
| Channel_Mask { |
| /*i2s has 4 pins, 8channel, mux output*/ |
| Speaker0_Channel_Mask = "i2s_2/3"; |
| DAC0_Channel_Mask = "i2s_4/5"; |
| DAC1_Channel_Mask = "i2s_4/5"; |
| EQ_DRC_Channel_Mask = "i2s_2/3"; |
| Spdif_samesource_Channel_Mask = "i2s_0/1"; |
| }; |
| }; |
| |
| amaudio2 { |
| compatible = "amlogic, aml_amaudio2"; |
| status = "okay"; |
| interrupts = <0 48 1>; |
| }; |
| /* end of AUDIO board specific */ |
| |
| |
| aml_sensor0: aml-sensor@0 { |
| compatible = "amlogic, aml-thermal"; |
| device_name = "thermal"; |
| status = "okay"; |
| #thermal-sensor-cells = <1>; |
| cooling_devices { |
| cpufreq_cool_cluster0 { |
| min_state = <1000000>; |
| dyn_coeff = <140>; |
| cluster_id = <0>; |
| node_name = "cpus"; |
| device_type = "cpufreq"; |
| }; |
| cpucore_cool_cluster0 { |
| min_state = <1>; |
| dyn_coeff = <0>; |
| cluster_id = <0>; |
| node_name = "cpu_core_cluster0"; |
| device_type = "cpucore"; |
| }; |
| gpufreq_cool { |
| min_state = <400>; |
| dyn_coeff = <437>; |
| cluster_id = <0>; |
| node_name = "mali"; |
| device_type = "gpufreq"; |
| }; |
| gpucore_cool { |
| min_state = <1>; |
| dyn_coeff = <0>; |
| cluster_id = <0>; |
| node_name = "thermal_gpu_cores"; |
| device_type = "gpucore"; |
| }; |
| }; |
| cpu_cluster0:cpu_core_cluster0 { |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| gpucore:thermal_gpu_cores { |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| }; |
| |
| dvb { |
| compatible = "amlogic, dvb"; |
| dev_name = "dvb"; |
| status = "okay"; |
| fe0_mode = "external"; |
| fe0_demod = "Si2168"; |
| fe0_i2c_adap_id = <&i2c1>; |
| fe0_demod_i2c_addr = <0x64>; |
| fe0_ts = <0>; |
| fe0_reset_value = <0>; |
| fe0_reset_gpio = <&gpio GPIODV_6 GPIO_ACTIVE_HIGH>; |
| |
| ts0 = "serial"; |
| ts0_control = <0x800>; |
| ts0_invert = <0>; |
| interrupts = <0 23 1 |
| 0 5 1 |
| 0 53 1 |
| 0 19 1 |
| 0 25 1 |
| 0 18 1 |
| 0 24 1>; |
| interrupt-names = "demux0_irq", |
| "demux1_irq", |
| "demux2_irq", |
| "dvr0_irq", |
| "dvr1_irq", |
| "dvrfill0_fill", |
| "dvrfill1_flush"; |
| pinctrl-names = "s_ts0"; |
| pinctrl-0 = <&dvb_s_ts0_pins>; |
| clocks = <&clkc CLKID_DEMUX |
| &clkc CLKID_ASYNC_FIFO |
| &clkc CLKID_AHB_ARB0 |
| &clkc CLKID_DOS_PARSER>; |
| clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; |
| }; |
| |
| dvbci { |
| compatible = "amlogic, dvbci"; |
| dev_name = "dvbci"; |
| io_type = <2>;//0:iobus,1:spi,2:cimax |
| cimax { |
| io_type = <1>;//0:spi,1:usb |
| usb { |
| rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| }; |
| |
| aml_dtv_demod { |
| compatible = "amlogic, ddemod-txlx"; |
| dev_name = "aml_dtv_demod"; |
| status = "disabled"; |
| |
| //pinctrl-names="dtvdemod_agc"; |
| //pinctrl-0=<&dtvdemod_agc>; |
| |
| |
| clocks = <&clkc CLKID_DAC_CLK>; |
| clock-names = "vdac_clk_gate"; |
| |
| |
| reg = <0xff644000 0x2000 /*dtv demod base*/ |
| 0xff63c000 0x2000 /*hiu reg base*/ |
| 0xff800000 0x1000 /*io_aobus_base*/ |
| 0xffd01000 0x1000 /*reset*/ |
| >; |
| /*move from dvbfe*/ |
| dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? |
| spectrum = <1>; |
| cma_flag = <1>; |
| cma_mem_size = <8>; |
| memory-region = <&demod_cma_reserved>;//<&demod_reserved>; |
| }; |
| |
| thermal-zones { |
| soc_thermal { |
| polling-delay = <1000>; |
| polling-delay-passive = <100>; |
| sustainable-power = <2150>; |
| |
| thermal-sensors = <&aml_sensor0 3>; |
| |
| trips { |
| switch_on: trip-point@0 { |
| temperature = <70000>; |
| hysteresis = <1000>; |
| type = "passive"; |
| }; |
| control: trip-point@1 { |
| temperature = <80000>; |
| hysteresis = <1000>; |
| type = "passive"; |
| }; |
| hot: trip-point@2 { |
| temperature = <85000>; |
| hysteresis = <5000>; |
| type = "hot"; |
| }; |
| critical: trip-point@3 { |
| temperature = <260000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| |
| cooling-maps { |
| cpufreq_cooling_map { |
| trip = <&control>; |
| cooling-device = <&cpus 0 4>; |
| contribution = <1024>; |
| }; |
| cpucore_cooling_map { |
| trip = <&control>; |
| cooling-device = <&cpu_cluster0 0 3>; |
| contribution = <1024>; |
| }; |
| gpufreq_cooling_map { |
| trip = <&control>; |
| cooling-device = <&gpu 0 4>; |
| contribution = <1024>; |
| }; |
| gpucore_cooling_map { |
| trip = <&control>; |
| cooling-device = <&gpucore 0 2>; |
| contribution = <1024>; |
| }; |
| }; |
| }; |
| }; |
| |
| }; /* end of / */ |
| |
| &i2c2 { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c2_h_pins>; |
| |
| tas5707: tas5707@36 { |
| compatible = "ti,tas5707"; |
| #sound-dai-cells = <0>; |
| codec_name = "tas5707"; |
| reg = <0x1B>; |
| reset_pin = <&gpio GPIODV_4 GPIO_ACTIVE_LOW>; |
| eq_enable = <0>; |
| drc_enable = <0>; |
| status = "okay"; |
| }; |
| |
| lcd_extern_i2c0: lcd_extern_i2c@0 { |
| compatible = "lcd_ext, i2c"; |
| dev_name = "i2c_T5800Q"; |
| reg = <0x1c>; |
| status = "okay"; |
| }; |
| |
| lcd_extern_i2c1: lcd_extern_i2c@1 { |
| compatible = "lcd_ext, i2c"; |
| dev_name = "i2c_ANX6862"; |
| reg = <0x20>; |
| status = "okay"; |
| }; |
| |
| lcd_extern_i2c2: lcd_extern_i2c@2 { |
| compatible = "lcd_ext, i2c"; |
| dev_name = "i2c_ANX7911"; |
| reg = <0x74>; |
| status = "okay"; |
| }; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| clock-frequency = <300000>; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c1_dv_pins>; |
| }; |
| |
| &pinctrl_periphs { |
| /*i2s*/ |
| aml_audio_i2s: aml_audio_i2s { |
| mux { |
| groups = "i2s_mclk_h", |
| "i2s_sclk_h", |
| "i2s_lrclk_h", |
| "i2s_dout01_h6"; |
| function = "i2s"; |
| }; |
| }; |
| /*spdif*/ |
| audio_spdif_out_pins: audio_spdif_out_pins { |
| mux { |
| groups = "spdif_out_dv"; |
| function = "spdif_out"; |
| }; |
| }; |
| audio_spdif_out_mute_pins: audio_spdif_out_mute_pins { |
| mux { |
| groups = "GPIODV_6"; |
| function = "gpio_periphs"; |
| }; |
| }; |
| /*pcm*/ |
| aml_audio_pcm: aml_audio_pcm { |
| mux { |
| groups = |
| "pcm_clk_a_dv", |
| "pcm_fs_a_dv", |
| "pcm_in_a_dv", |
| "pcm_out_a_dv"; |
| function = "pcm_a"; |
| }; |
| }; |
| |
| /*lcd_extern*/ |
| lcd_extern_off_pins:lcd_extern_off_pin { |
| mux { |
| groups = "GPIOH_2", |
| "GPIOH_3"; |
| function = "gpio_periphs"; |
| /*output-high;*/ |
| output-low; |
| /*input-enable;*/ |
| }; |
| }; |
| |
| /*backlight*/ |
| bl_pwm_on_pins:bl_pwm_on_pin { |
| mux { |
| groups = "pwm_b"; |
| function = "pwm_b"; |
| }; |
| }; |
| bl_pwm_vs_on_pins:bl_pwm_vs_on_pin { |
| mux { |
| groups = "pwm_vs_z6"; |
| function = "pwm_vs"; |
| }; |
| }; |
| bl_pwm_off_pins:bl_pwm_off_pin { |
| mux { |
| groups = "GPIOZ_6"; |
| function = "gpio_periphs"; |
| output-low; |
| }; |
| }; |
| bl_pwm_combo_0_on_pins:bl_pwm_combo_0_on_pin { |
| mux { |
| groups = "pwm_b"; |
| function = "pwm_b"; |
| }; |
| }; |
| bl_pwm_combo_1_on_pins:bl_pwm_combo_1_on_pin { |
| mux { |
| groups = "pwm_c_z"; |
| function = "pwm_c"; |
| }; |
| }; |
| bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin { |
| mux { |
| groups = "pwm_vs_z6"; |
| function = "pwm_vs"; |
| }; |
| }; |
| bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin { |
| mux { |
| groups = "pwm_vs_z7"; |
| function = "pwm_vs"; |
| }; |
| }; |
| bl_pwm_combo_off_pins:bl_pwm_combo_off_pin { |
| mux { |
| groups = "GPIOZ_6", |
| "GPIOZ_7"; |
| function = "gpio_periphs"; |
| output-low; |
| }; |
| }; |
| dvb_s_ts0_pins: dvb_s_ts0_pins { |
| mux { |
| groups = "tsin_d0_a_dv", |
| "tsin_clk_a_dv", |
| "tsin_sop_a_dv", |
| "tsin_valid_a_dv"; |
| function = "tsin_a"; |
| }; |
| }; |
| }; |
| |
| &uart_A { |
| status = "disabled"; |
| }; |
| |
| &audio_data{ |
| status = "okay"; |
| }; |
| |
| &pwm_AO_ab { |
| status = "okay"; |
| }; |
| |
| &pwm_ab { |
| status = "okay"; |
| }; |
| |
| &pwm_cd { |
| status = "okay"; |
| }; |
| |
| &spicc0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_a_pins>; |
| cs-gpios = <&gpio GPIOZ_3 0>; |
| }; |
| |
