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nest-open-source / manifest_repos / kernel / 4f18c0c0649c21299b096883d4328736d60f04cc / . / arch / arm64 / boot / dts / amlogic / mesontl1.dtsi
blob: a82b9a0d74405bf1aca6070fad296015668ed2a4 [file] [log] [blame]
/*
* arch/arm64/boot/dts/amlogic/mesontl1.dtsi
*
* Copyright (C) 2018 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/meson-tl1-gpio.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/meson_rc.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pwm/meson.h>
#include <dt-bindings/clock/amlogic,tl1-clkc.h>
#include <dt-bindings/clock/amlogic,tl1-audio-clk.h>
#include "mesong12a-bifrost.dtsi"
#include <dt-bindings/iio/adc/amlogic-saradc.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus:cpus {
#address-cells = <2>;
#size-cells = <0>;
#cooling-cells = <2>;/* min followed by max */
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x0>;
//timer=<&timer_a>;
enable-method = "psci";
clocks = <&clkc CLKID_CPU_CLK>,
<&clkc CLKID_CPU_FCLK_P>,
<&clkc CLKID_SYS_PLL>;
clock-names = "core_clk",
"low_freq_clk_parent",
"high_freq_clk_parent";
operating-points-v2 = <&cpu_opp_table0>;
cpu-supply = <&vddcpu0>;
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
voltage-tolerance = <0>;
clock-latency = <50000>;
};
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x1>;
//timer=<&timer_b>;
enable-method = "psci";
clocks = <&clkc CLKID_CPU_CLK>,
<&clkc CLKID_CPU_FCLK_P>,
<&clkc CLKID_SYS_PLL>;
clock-names = "core_clk",
"low_freq_clk_parent",
"high_freq_clk_parent";
operating-points-v2 = <&cpu_opp_table0>;
cpu-supply = <&vddcpu0>;
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
voltage-tolerance = <0>;
clock-latency = <50000>;
};
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x2>;
//timer=<&timer_c>;
enable-method = "psci";
clocks = <&clkc CLKID_CPU_CLK>,
<&clkc CLKID_CPU_FCLK_P>,
<&clkc CLKID_SYS_PLL>;
clock-names = "core_clk",
"low_freq_clk_parent",
"high_freq_clk_parent";
operating-points-v2 = <&cpu_opp_table0>;
cpu-supply = <&vddcpu0>;
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
voltage-tolerance = <0>;
clock-latency = <50000>;
};
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
//timer=<&timer_d>;
enable-method = "psci";
clocks = <&clkc CLKID_CPU_CLK>,
<&clkc CLKID_CPU_FCLK_P>,
<&clkc CLKID_SYS_PLL>;
clock-names = "core_clk",
"low_freq_clk_parent",
"high_freq_clk_parent";
operating-points-v2 = <&cpu_opp_table0>;
cpu-supply = <&vddcpu0>;
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
voltage-tolerance = <0>;
clock-latency = <50000>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 0xff01>,
<GIC_PPI 14 0xff01>,
<GIC_PPI 11 0xff01>,
<GIC_PPI 10 0xff01>;
};
timer_bc {
compatible = "arm, meson-bc-timer";
reg = <0x0 0xffd0f190 0x0 0x4 0x0 0xffd0f194 0x0 0x4>;
timer_name = "Meson TimerF";
clockevent-rating =<300>;
clockevent-shift =<20>;
clockevent-features =<0x23>;
interrupts = <0 60 1>;
bit_enable =<16>;
bit_mode =<12>;
bit_resolution =<0>;
};
arm_pmu {
compatible = "arm,armv8-pmuv3";
/* clusterb-enabled; */
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff634680 0x0 0x4>;
cpumasks = <0xf>;
/* default 10ms */
relax-timer-ns = <10000000>;
/* default 10000us */
max-wait-cnt = <10000>;
};
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <2>;
interrupt-controller;
reg = <0x0 0xffc01000 0x0 0x1000>,
<0x0 0xffc02000 0x0 0x0100>;
interrupts = <GIC_PPI 9 0xf04>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
secmon {
compatible = "amlogic, secmon";
memory-region = <&secmon_reserved>;
in_base_func = <0x82000020>;
out_base_func = <0x82000021>;
reserve_mem_size = <0x00300000>;
};
securitykey {
compatible = "amlogic, securitykey";
status = "okay";
storage_query = <0x82000060>;
storage_read = <0x82000061>;
storage_write = <0x82000062>;
storage_tell = <0x82000063>;
storage_verify = <0x82000064>;
storage_status = <0x82000065>;
storage_list = <0x82000067>;
storage_remove = <0x82000068>;
storage_in_func = <0x82000023>;
storage_out_func = <0x82000024>;
storage_block_func = <0x82000025>;
storage_size_func = <0x82000027>;
storage_set_enctype = <0x8200006A>;
storage_get_enctype = <0x8200006B>;
storage_version = <0x8200006C>;
};
mailbox: mhu@ff63c400 {
compatible = "amlogic, meson_mhu";
reg = <0x0 0xff63c400 0x0 0x4c>, /* MHU registers */
<0x0 0xfffd7000 0x0 0x800>; /* Payload area */
interrupts = <0 209 1>, /* low priority interrupt */
<0 210 1>; /* high priority interrupt */
#mbox-cells = <1>;
mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
mboxes = <&mailbox 0 &mailbox 1>;
};
cpu_iomap {
compatible = "amlogic, iomap";
#address-cells = <2>;
#size-cells = <2>;
ranges;
io_cbus_base {
reg = <0x0 0xffd00000 0x0 0x101000>;
};
io_apb_base {
reg = <0x0 0xffe01000 0x0 0x19f000>;
};
io_aobus_base {
reg = <0x0 0xff800000 0x0 0x100000>;
};
io_vapb_base {
reg = <0x0 0xff900000 0x0 0x200000>;
};
io_hiu_base {
reg = <0x0 0xff63c000 0x0 0x2000>;
};
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
meson_suspend: pm {
compatible = "amlogic, pm";
/*gxbaby-suspend;*/
status = "okay";
reg = <0x0 0xff8000a8 0x0 0x4>,
<0x0 0xff80023c 0x0 0x4>;
};
cpuinfo {
compatible = "amlogic, cpuinfo";
status = "okay";
cpuinfo_cmd = <0x82000044>;
};
reboot {
compatible = "amlogic,reboot";
sys_reset = <0x84000009>;
sys_poweroff = <0x84000008>;
};
ram-dump {
compatible = "amlogic, ram_dump";
status = "okay";
reg = <0x0 0xFF6345E0 0x0 4>;
reg-names = "PREG_STICKY_REG8";
};
securitykey {
compatible = "amlogic, securitykey";
status = "okay";
storage_query = <0x82000060>;
storage_read = <0x82000061>;
storage_write = <0x82000062>;
storage_tell = <0x82000063>;
storage_verify = <0x82000064>;
storage_status = <0x82000065>;
storage_list = <0x82000067>;
storage_remove = <0x82000068>;
storage_in_func = <0x82000023>;
storage_out_func = <0x82000024>;
storage_block_func = <0x82000025>;
storage_size_func = <0x82000027>;
storage_set_enctype = <0x8200006A>;
storage_get_enctype = <0x8200006B>;
storage_version = <0x8200006C>;
};
vpu {
compatible = "amlogic, vpu-tl1";
status = "okay";
clocks = <&clkc CLKID_VAPB_MUX>,
<&clkc CLKID_VPU_INTR>,
<&clkc CLKID_VPU_P0_COMP>,
<&clkc CLKID_VPU_P1_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vapb_clk",
"vpu_intr_gate",
"vpu_clk0",
"vpu_clk1",
"vpu_clk";
clk_level = <7>;
/* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
/* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
};
ethmac: ethernet@ff3f0000 {
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8
0x0 0xff64c000 0x0 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";
clocks = <&clkc CLKID_ETH_CORE>;
clock-names = "ethclk81";
pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
analog_val = <0x20200000 0x0000c000 0x00000023>;
};
pinctrl_aobus: pinctrl@ff800014 {
compatible = "amlogic,meson-tl1-aobus-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio_ao: ao-bank@ff800014 {
reg = <0x0 0xff800014 0x0 0x8>,
<0x0 0xff800024 0x0 0x14>,
<0x0 0xff80001c 0x0 0x8>;
reg-names = "mux", "gpio", "drive-strength";
gpio-controller;
#gpio-cells = <2>;
};
aoceca_mux:aoceca_mux {
mux {
groups = "cec_ao_a";
function = "cec_ao";
};
};
aocecb_mux:aocecb_mux {
mux {
groups = "cec_ao_b";
function = "cec_ao";
};
};
};
pinctrl_periphs: pinctrl@ff6346c0 {
compatible = "amlogic,meson-tl1-periphs-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio: banks@ff6346c0 {
reg = <0x0 0xff6346c0 0x0 0x40>,
<0x0 0xff6344e8 0x0 0x18>,
<0x0 0xff634520 0x0 0x18>,
<0x0 0xff634440 0x0 0x4c>,
<0x0 0xff634740 0x0 0x1c>;
reg-names = "mux",
"pull",
"pull-enable",
"gpio",
"drive-strength";
gpio-controller;
#gpio-cells = <2>;
};
hdmirx_a_mux:hdmirx_a_mux {
mux {
groups = "hdmirx_a_hpd", "hdmirx_a_det",
"hdmirx_a_sda", "hdmirx_a_sck";
function = "hdmirx_a";
};
};
hdmirx_b_mux:hdmirx_b_mux {
mux {
groups = "hdmirx_b_hpd", "hdmirx_b_det",
"hdmirx_b_sda", "hdmirx_b_sck";
function = "hdmirx_b";
};
};
hdmirx_c_mux:hdmirx_c_mux {
mux {
groups = "hdmirx_c_hpd", "hdmirx_c_det",
"hdmirx_c_sda", "hdmirx_c_sck";
function = "hdmirx_c";
};
};
};
dwc3: dwc3@ff500000 {
compatible = "synopsys, dwc3";
status = "disabled";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <0 30 4>;
usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
cpu-type = "gxl";
clock-src = "usb3.0";
clocks = <&clkc CLKID_USB_GENERAL>;
clock-names = "dwc_general";
};
usb2_phy_v2: usb2phy@ffe09000 {
compatible = "amlogic, amlogic-new-usb2-v2";
status = "disabled";
reg = <0x0 0xffe09000 0x0 0x80
0x0 0xffd01008 0x0 0x100
0x0 0xff636000 0x0 0x2000
0x0 0xff63a000 0x0 0x2000
0x0 0xff658000 0x0 0x2000>;
pll-setting-1 = <0x09400414>;
pll-setting-2 = <0x927E0000>;
pll-setting-3 = <0xac5f69e5>;
pll-setting-4 = <0xfe18>;
pll-setting-5 = <0x8000fff>;
pll-setting-6 = <0x78000>;
pll-setting-7 = <0xe0004>;
pll-setting-8 = <0xe000c>;
version = <1>;
};
usb3_phy_v2: usb3phy@ffe09080 {
compatible = "amlogic, amlogic-new-usb3-v2";
status = "disabled";
reg = <0x0 0xffe09080 0x0 0x20>;
phy-reg = <0xff646000>;
phy-reg-size = <0x2000>;
usb2-phy-reg = <0xffe09000>;
usb2-phy-reg-size = <0x80>;
interrupts = <0 16 4>;
};
dwc2_a: dwc2_a@ff400000 {
compatible = "amlogic, dwc2";
status = "disabled";
device_name = "dwc2_a";
reg = <0x0 0xff400000 0x0 0x40000>;
interrupts = <0 31 4>;
pl-periph-id = <0>; /** lm name */
clock-src = "usb0"; /** clock src */
port-id = <0>; /** ref to mach/usb.h */
port-type = <2>; /** 0: otg, 1: host, 2: slave */
port-speed = <0>; /** 0: default, high, 1: full */
port-config = <0>; /** 0: default */
/*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
port-dma = <0>;
port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
usb-fifo = <728>;
cpu-type = "v2";
phy-reg = <0xffe09000>;
phy-reg-size = <0xa0>;
/** phy-interface: 0x0: amlogic-v1 phy, 0x1: synopsys phy **/
/** 0x2: amlogic-v2 phy **/
phy-interface = <0x2>;
clocks = <&clkc CLKID_USB_GENERAL
&clkc CLKID_USB1_TO_DDR>;
clock-names = "usb_general",
"usb1";
};
wdt: watchdog@0xffd0f0d0 {
compatible = "amlogic, meson-wdt";
status = "okay";
default_timeout=<10>;
reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
reset_watchdog_time=<2>;
shutdown_timeout=<10>;
firmware_timeout=<6>;
suspend_timeout=<6>;
reg = <0x0 0xffd0f0d0 0x0 0x10>;
clock-names = "xtal";
clocks = <&xtal>;
};
jtag {
compatible = "amlogic, jtag";
status = "okay";
select = "disable"; /* disable/apao */
pinctrl-names="jtag_apao_pins";
pinctrl-0=<&jtag_apao_pins>;
};
saradc:saradc {
compatible = "amlogic,meson-g12a-saradc";
status = "disabled";
#io-channel-cells = <1>;
clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
clock-names = "xtal", "saradc_clk";
interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
reg = <0x0 0xff809000 0x0 0x48>;
};
vddcpu0: pwmao_d-regulator {
compatible = "pwm-regulator";
pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
regulator-name = "vddcpu0";
regulator-min-microvolt = <689000>;
regulator-max-microvolt = <1049000>;
regulator-always-on;
max-duty-cycle = <1500>;
/* Voltage Duty-Cycle */
voltage-table = <1049000 0>,
<1039000 3>,
<1029000 6>,
<1019000 8>,
<1009000 11>,
<999000 14>,
<989000 17>,
<979000 20>,
<969000 23>,
<959000 26>,
<949000 29>,
<939000 31>,
<929000 34>,
<919000 37>,
<909000 40>,
<899000 43>,
<889000 45>,
<879000 48>,
<869000 51>,
<859000 54>,
<849000 56>,
<839000 59>,
<829000 62>,
<819000 65>,
<809000 68>,
<799000 70>,
<789000 73>,
<779000 76>,
<769000 79>,
<759000 81>,
<749000 84>,
<739000 87>,
<729000 89>,
<719000 92>,
<709000 95>,
<699000 98>,
<689000 100>;
status = "okay";
};
aml_dma {
compatible = "amlogic,aml_txlx_dma";
reg = <0x0 0xff63e000 0x0 0x48>;
interrupts = <0 180 1>;
aml_aes {
compatible = "amlogic,aes_g12a_dma";
dev_name = "aml_aes_dma";
status = "okay";
};
aml_sha {
compatible = "amlogic,sha_dma";
dev_name = "aml_sha_dma";
status = "okay";
};
};
rng {
compatible = "amlogic,meson-rng";
status = "okay";
#address-cells = <2>;
#size-cells = <2>;
reg = <0x0 0xff630218 0x0 0x4>;
quality = /bits/ 16 <1000>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
hiubus: hiubus@ff63c000 {
compatible = "simple-bus";
reg = <0x0 0xff63c000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x2000>;
clkc: clock-controller@0 {
compatible = "amlogic,tl1-clkc";
#clock-cells = <1>;
reg = <0x0 0x0 0x0 0x3fc>;
};
};/* end of hiubus*/
audiobus: audiobus@0xff600000 {
compatible = "amlogic, audio-controller", "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
reg = <0x0 0xff600000 0x0 0x10000>;
ranges = <0x0 0x0 0x0 0xff600000 0x0 0x10000>;
clkaudio:audio_clocks {
compatible = "amlogic, tl1-audio-clocks";
#clock-cells = <1>;
reg = <0x0 0x0 0x0 0xb0>;
};
ddr_manager {
compatible = "amlogic, tl1-audio-ddr-manager";
interrupts = <
GIC_SPI 148 IRQ_TYPE_EDGE_RISING
GIC_SPI 149 IRQ_TYPE_EDGE_RISING
GIC_SPI 150 IRQ_TYPE_EDGE_RISING
GIC_SPI 48 IRQ_TYPE_EDGE_RISING
GIC_SPI 152 IRQ_TYPE_EDGE_RISING
GIC_SPI 153 IRQ_TYPE_EDGE_RISING
GIC_SPI 154 IRQ_TYPE_EDGE_RISING
GIC_SPI 49 IRQ_TYPE_EDGE_RISING
>;
interrupt-names =
"toddr_a", "toddr_b", "toddr_c",
"toddr_d",
"frddr_a", "frddr_b", "frddr_c",
"frddr_d";
};
};/* end of audiobus*/
/* Sound iomap */
aml_snd_iomap {
compatible = "amlogic, snd-iomap";
status = "okay";
#address-cells=<2>;
#size-cells=<2>;
ranges;
pdm_bus {
reg = <0x0 0xFF601000 0x0 0x400>;
};
audiobus_base {
reg = <0x0 0xFF600000 0x0 0x1000>;
};
audiolocker_base {
reg = <0x0 0xFF601400 0x0 0x400>;
};
eqdrc_base {
reg = <0x0 0xFF602000 0x0 0x2000>;
};
reset_base {
reg = <0x0 0xFFD01000 0x0 0x1000>;
};
vad_base {
reg = <0x0 0xFF601800 0x0 0x800>;
};
};
cbus: cbus@ffd00000 {
compatible = "simple-bus";
reg = <0x0 0xffd00000 0x0 0x27000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x27000>;
clk-measure@18004 {
compatible = "amlogic,tl1-measure";
reg = <0x0 0x18004 0x0 0x4 0x0 0x1800c 0x0 0x4>;
};
i2c0: i2c@1f000 {
compatible = "amlogic,meson-i2c";
status = "disabled";
reg = <0x0 0x1f000 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-frequency = <100000>;
};
i2c1: i2c@1e000 {
compatible = "amlogic,meson-i2c";
status = "disabled";
reg = <0x0 0x1e000 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-frequency = <100000>;
};
i2c2: i2c@1d000 {
compatible = "amlogic,meson-i2c";
status = "disabled";
reg = <0x0 0x1d000 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-frequency = <100000>;
};
i2c3: i2c@1c000 {
compatible = "amlogic,meson-i2c";
status = "disabled";
reg = <0x0 0x1c000 0x0 0x20>;
interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-frequency = <100000>;
};
gpio_intc: interrupt-controller@f080 {
compatible = "amlogic,meson-gpio-intc",
"amlogic,meson-tl1-gpio-intc";
reg = <0x0 0xf080 0x0 0x10>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts =
<64 65 66 67 68 69 70 71>;
status = "okay";
};
pwm_ab: pwm@1b000 {
compatible = "amlogic,tl1-ee-pwm";
reg = <0x0 0x1b000 0x0 0x20>;
#pwm-cells = <3>;
clocks = <&xtal>,
<&xtal>,
<&xtal>,
<&xtal>;
clock-names = "clkin0",
"clkin1",
"clkin2",
"clkin3";
/* default xtal 24m clkin0-clkin2 and
* clkin1-clkin3 should be set the same
*/
status = "disabled";
};
pwm_cd: pwm@1a000 {
compatible = "amlogic,tl1-ee-pwm";
reg = <0x0 0x1a000 0x0 0x20>;
#pwm-cells = <3>;
clocks = <&xtal>,
<&xtal>,
<&xtal>,
<&xtal>;
clock-names = "clkin0",
"clkin1",
"clkin2",
"clkin3";
status = "disabled";
};
pwm_ef: pwm@19000 {
compatible = "amlogic,tl1-ee-pwm";
reg = <0x0 0x19000 0x0 0x20>;
#pwm-cells = <3>;
clocks = <&xtal>,
<&xtal>,
<&xtal>,
<&xtal>;
clock-names = "clkin0",
"clkin1",
"clkin2",
"clkin3";
status = "disabled";
};
spicc0: spi@13000 {
compatible = "amlogic,meson-tl1-spicc",
"amlogic,meson-g12a-spicc";
reg = <0x0 0x13000 0x0 0x44>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_SPICC0>,
<&clkc CLKID_SPICC0_COMP>;
clock-names = "core", "comp";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spicc1: spi@15000 {
compatible = "amlogic,meson-tl1-spicc",
"amlogic,meson-g12a-spicc";
reg = <0x0 0x15000 0x0 0x44>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_SPICC1>,
<&clkc CLKID_SPICC1_COMP>;
clock-names = "core", "comp";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
aobus: aobus@ff800000 {
compatible = "simple-bus";
reg = <0x0 0xff800000 0x0 0xb000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff800000 0x0 0xb000>;
cpu_version {
reg = <0x0 0x220 0x0 0x4>;
};
aoclkc: clock-controller@0 {
compatible = "amlogic,tl1-aoclkc";
#clock-cells = <1>;
reg = <0x0 0x0 0x0 0x1000>;
};
pwm_AO_ab: pwm@7000 {
compatible = "amlogic,tl1-ao-pwm";
reg = <0x0 0x7000 0x0 0x20>;
#pwm-cells = <3>;
clocks = <&xtal>,
<&xtal>,
<&xtal>,
<&xtal>;
clock-names = "clkin0",
"clkin1",
"clkin2",
"clkin3";
status = "disabled";
};
pwm_AO_cd: pwm@2000 {
compatible = "amlogic,tl1-ao-pwm";
reg = <0x0 0x2000 0x0 0x20>;
#pwm-cells = <3>;
clocks = <&xtal>,
<&xtal>,
<&xtal>,
<&xtal>;
clock-names = "clkin0",
"clkin1",
"clkin2",
"clkin3";
status = "disabled";
};
uart_AO: serial@3000 {
compatible = "amlogic, meson-uart";
reg = <0x0 0x3000 0x0 0x18>;
interrupts = <0 193 1>;
status = "okay";
clocks = <&xtal>;
clock-names = "clk_uart";
xtal_tick_en = <2>;
fifosize = < 64 >;
//pinctrl-names = "default";
//pinctrl-0 = <&ao_a_uart_pins>;
/* 0 not support; 1 support */
support-sysrq = <0>;
};
uart_AO_B: serial@4000 {
compatible = "amlogic, meson-uart";
reg = <0x0 0x4000 0x0 0x18>;
interrupts = <0 197 1>;
status = "disabled";
clocks = <&xtal>;
clock-names = "clk_uart";
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&ao_b_uart_pins1>;
};
remote: rc@8040 {
compatible = "amlogic, aml_remote";
reg = <0x0 0x8040 0x0 0x44>,
<0x0 0x8000 0x0 0x20>;
status = "okay";
protocol = <REMOTE_TYPE_NEC>;
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&remote_pins>;
map = <&custom_maps>;
max_frame_time = <200>;
};
irblaster: meson-irblaster@14c {
compatible = "amlogic, meson_irblaster";
reg = <0x0 0x14c 0x0 0x10>,
<0x0 0x40 0x0 0x4>;
#irblaster-cells = <2>;
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
i2c_AO: i2c@5000 {
compatible = "amlogic,meson-i2c";
status = "disabled";
reg = <0x0 0x05000 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
#address-cells = <2>;
#size-cells = <2>;
clocks = <&clkc CLKID_I2C>;
clock-frequency = <100000>;
};
i2c_AO_slave:i2c_slave@6000 {
compatible = "amlogic, meson-i2c-slave";
status = "disabled";
reg = <0x0 0x6000 0x0 0x20>;
interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
pinctrl-names="default";
pinctrl-0=<&i2c_ao_slave_pins>;
};
};/* end of aobus */
ion_dev {
compatible = "amlogic, ion_dev";
status = "okay";
memory-region = <&ion_cma_reserved>;
};/* end of ion_dev*/
}; /* end of soc*/
custom_maps: custom_maps {
mapnum = <3>;
map0 = <&map_0>;
map1 = <&map_1>;
map2 = <&map_2>;
map_0: map_0{
mapname = "amlogic-remote-1";
customcode = <0xfb04>;
release_delay = <80>;
size = <44>; /*keymap size*/
keymap = <REMOTE_KEY(0x01, KEY_1)
REMOTE_KEY(0x02, KEY_2)
REMOTE_KEY(0x03, KEY_3)
REMOTE_KEY(0x04, KEY_4)
REMOTE_KEY(0x05, KEY_5)
REMOTE_KEY(0x06, KEY_6)
REMOTE_KEY(0x07, KEY_7)
REMOTE_KEY(0x08, KEY_8)
REMOTE_KEY(0x09, KEY_9)
REMOTE_KEY(0x0a, KEY_0)
REMOTE_KEY(0x1F, KEY_FN_F1)
REMOTE_KEY(0x15, KEY_MENU)
REMOTE_KEY(0x16, KEY_TAB)
REMOTE_KEY(0x0c, KEY_CHANNELUP)
REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
REMOTE_KEY(0x0e, KEY_VOLUMEUP)
REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
REMOTE_KEY(0x11, KEY_HOME)
REMOTE_KEY(0x1c, KEY_RIGHT)
REMOTE_KEY(0x1b, KEY_LEFT)
REMOTE_KEY(0x19, KEY_UP)
REMOTE_KEY(0x1a, KEY_DOWN)
REMOTE_KEY(0x1d, KEY_ENTER)
REMOTE_KEY(0x17, KEY_MUTE)
REMOTE_KEY(0x49, KEY_FINANCE)
REMOTE_KEY(0x43, KEY_BACK)
REMOTE_KEY(0x12, KEY_FN_F4)
REMOTE_KEY(0x14, KEY_FN_F5)
REMOTE_KEY(0x18, KEY_FN_F6)
REMOTE_KEY(0x59, KEY_INFO)
REMOTE_KEY(0x5a, KEY_STOPCD)
REMOTE_KEY(0x10, KEY_POWER)
REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
REMOTE_KEY(0x44, KEY_NEXTSONG)
REMOTE_KEY(0x1e, KEY_REWIND)
REMOTE_KEY(0x4b, KEY_FASTFORWARD)
REMOTE_KEY(0x58, KEY_PLAYPAUSE)
REMOTE_KEY(0x46, KEY_PROPS)
REMOTE_KEY(0x40, KEY_UNDO)
REMOTE_KEY(0x38, KEY_SCROLLLOCK)
REMOTE_KEY(0x57, KEY_FN)
REMOTE_KEY(0x5b, KEY_FN_ESC)
REMOTE_KEY(0x13, 195)
REMOTE_KEY(0x54, KEY_RED)
REMOTE_KEY(0x4c, KEY_GREEN)
REMOTE_KEY(0x4e, KEY_YELLOW)
REMOTE_KEY(0x55, KEY_BLUE)
REMOTE_KEY(0x53, KEY_BLUETOOTH)
REMOTE_KEY(0x52, KEY_WLAN)
REMOTE_KEY(0x39, KEY_CAMERA)
REMOTE_KEY(0x41, KEY_SOUND)
REMOTE_KEY(0x0b, KEY_QUESTION)
REMOTE_KEY(0x00, KEY_CHAT)
REMOTE_KEY(0x13, KEY_SEARCH)>;
};
map_1: map_1{
mapname = "amlogic-remote-2";
customcode = <0xfe01>;
release_delay = <80>;
size = <53>;
keymap = <REMOTE_KEY(0x01, KEY_1)
REMOTE_KEY(0x02, KEY_2)
REMOTE_KEY(0x03, KEY_3)
REMOTE_KEY(0x04, KEY_4)
REMOTE_KEY(0x05, KEY_5)
REMOTE_KEY(0x06, KEY_6)
REMOTE_KEY(0x07, KEY_7)
REMOTE_KEY(0x08, KEY_8)
REMOTE_KEY(0x09, KEY_9)
REMOTE_KEY(0x0a, KEY_0)
REMOTE_KEY(0x1F, KEY_FN_F1)
REMOTE_KEY(0x15, KEY_MENU)
REMOTE_KEY(0x16, KEY_TAB)
REMOTE_KEY(0x0c, KEY_CHANNELUP)
REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
REMOTE_KEY(0x0e, KEY_VOLUMEUP)
REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
REMOTE_KEY(0x11, KEY_HOME)
REMOTE_KEY(0x1c, KEY_RIGHT)
REMOTE_KEY(0x1b, KEY_LEFT)
REMOTE_KEY(0x19, KEY_UP)
REMOTE_KEY(0x1a, KEY_DOWN)
REMOTE_KEY(0x1d, KEY_ENTER)
REMOTE_KEY(0x17, KEY_MUTE)
REMOTE_KEY(0x49, KEY_FINANCE)
REMOTE_KEY(0x43, KEY_BACK)
REMOTE_KEY(0x12, KEY_FN_F4)
REMOTE_KEY(0x14, KEY_FN_F5)
REMOTE_KEY(0x18, KEY_FN_F6)
REMOTE_KEY(0x59, KEY_INFO)
REMOTE_KEY(0x5a, KEY_STOPCD)
REMOTE_KEY(0x10, KEY_POWER)
REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
REMOTE_KEY(0x44, KEY_NEXTSONG)
REMOTE_KEY(0x1e, KEY_REWIND)
REMOTE_KEY(0x4b, KEY_FASTFORWARD)
REMOTE_KEY(0x58, KEY_PLAYPAUSE)
REMOTE_KEY(0x46, KEY_PROPS)
REMOTE_KEY(0x40, KEY_UNDO)
REMOTE_KEY(0x38, KEY_SCROLLLOCK)
REMOTE_KEY(0x57, KEY_FN)
REMOTE_KEY(0x5b, KEY_FN_ESC)
REMOTE_KEY(0x54, KEY_RED)
REMOTE_KEY(0x4c, KEY_GREEN)
REMOTE_KEY(0x4e, KEY_YELLOW)
REMOTE_KEY(0x55, KEY_BLUE)
REMOTE_KEY(0x53, KEY_BLUETOOTH)
REMOTE_KEY(0x52, KEY_WLAN)
REMOTE_KEY(0x39, KEY_CAMERA)
REMOTE_KEY(0x41, KEY_SOUND)
REMOTE_KEY(0x0b, KEY_QUESTION)
REMOTE_KEY(0x00, KEY_CHAT)
REMOTE_KEY(0x13, KEY_SEARCH)>;
};
map_2: map_2{
mapname = "amlogic-remote-3";
customcode = <0xbd02>;
release_delay = <80>;
size = <17>;
keymap = <REMOTE_KEY(0xca,KEY_UP)
REMOTE_KEY(0xd2,KEY_DOWN)
REMOTE_KEY(0x99,KEY_LEFT)
REMOTE_KEY(0xc1,KEY_RIGHT)
REMOTE_KEY(0xce,KEY_RIGHTCTRL)
REMOTE_KEY(0x45,KEY_POWER)
REMOTE_KEY(0xc5,KEY_COPY)
REMOTE_KEY(0x80,KEY_MUTE)
REMOTE_KEY(0xd0,KEY_TAB)
REMOTE_KEY(0xd6,KEY_LEFTMETA)
REMOTE_KEY(0x95,KEY_HOME)
REMOTE_KEY(0xdd,KEY_PAGEUP)
REMOTE_KEY(0x8c,KEY_PAGEDOWN)
REMOTE_KEY(0x89,KEY_UNDO)
REMOTE_KEY(0x9c,KEY_PROPS)
REMOTE_KEY(0x9a,KEY_SCALE)
REMOTE_KEY(0xcd,KEY_KPCOMMA)>;
};
};
uart_A: serial@ffd24000 {
compatible = "amlogic, meson-uart";
reg = <0x0 0xffd24000 0x0 0x18>;
interrupts = <0 26 1>;
status = "disabled";
clocks = <&xtal
&clkc CLKID_UART0>;
clock-names = "clk_uart",
"clk_gate";
fifosize = < 128 >;
pinctrl-names = "default";
pinctrl-0 = <&a_uart_pins>;
};
uart_B: serial@ffd23000 {
compatible = "amlogic, meson-uart";
reg = <0x0 0xffd23000 0x0 0x18>;
interrupts = <0 75 1>;
status = "disabled";
clocks = <&xtal
&clkc CLKID_UART1>;
clock-names = "clk_uart",
"clk_gate";
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&b_uart_pins>;
};
uart_C: serial@ffd22000 {
compatible = "amlogic, meson-uart";
reg = <0x0 0xffd22000 0x0 0x18>;
interrupts = <0 93 1>;
status = "disabled";
clocks = <&xtal
&clkc CLKID_UART1>;
clock-names = "clk_uart",
"clk_gate";
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&c_uart_pins>;
};
sd_emmc_c: emmc@ffe07000 {
status = "disabled";
compatible = "amlogic, meson-mmc-tl1";
reg = <0x0 0xffe07000 0x0 0x800>;
interrupts = <0 191 1>;
pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
pinctrl-0 = <&emmc_clk_cmd_pins>;
pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_GP0_PLL>,
<&xtal>;
clock-names = "core","clkin0","clkin1","clkin2","xtal";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
/* mmc-ddr-1_8v; */
/* mmc-hs200-1_8v; */
max-frequency = <200000000>;
non-removable;
disable-wp;
emmc {
pinname = "emmc";
ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
/*caps defined in dts*/
tx_delay = <0>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
card_type = <1>;
/* 1:mmc card(include eMMC),
* 2:sd card(include tSD)
*/
};
};
spifc: spifc@ffd14000 {
compatible = "amlogic,aml-spi-nor";
status = "disabled";
reg = <0x0 0xffd14000 0x0 0x80>;
pinctrl-names = "default";
pinctrl-0 = <&spifc_all_pins>;
clock-names = "core";
clocks = <&clkc CLKID_CLK81>;
spi-nor@0 {
compatible = "jedec,spi-nor";
spifc-frequency = <40000000>;
read-capability = <4>;/* dual read 1_1_2 */
spifc-io-width = <4>;
};
};
slc_nand: nand-controller@0xFFE07800 {
compatible = "amlogic, aml_mtd_nand";
status = "disabled";
reg = <0x0 0xFFE07800 0x0 0x200>;
interrupts = <0 34 1>;
pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
pinctrl-0 = <&all_nand_pins>;
pinctrl-1 = <&all_nand_pins>;
pinctrl-2 = <&nand_cs_pins>;
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_P0_COMP>;
clock-names = "core", "clkin";
device_id = <0>;
/*fip/tpl configurations, must be same
*with uboot if bl_mode was set as 1
*bl_mode: 0 compact mode;1 descrete mode
*if bl_mode was set as 1,fip configuration will work
*/
bl_mode = <1>;
/*copy count of fip*/
fip_copies = <4>;
/*size of each fip copy*/
fip_size = <0x200000>;
nand_clk_ctrl = <0xFFE07000>;
/*partions defined in dts*/
};
mesonstream {
compatible = "amlogic, codec, streambuf";
status = "okay";
clocks = <&clkc CLKID_U_PARSER
&clkc CLKID_DEMUX
&clkc CLKID_AHB_ARB0
&clkc CLKID_CLK81
&clkc CLKID_DOS
&clkc CLKID_VDEC_MUX
&clkc CLKID_HCODEC_MUX
&clkc CLKID_HEVC_MUX
&clkc CLKID_HEVCF_MUX>;
clock-names = "parser_top",
"demux",
"ahbarb0",
"clk_81",
"vdec",
"clk_vdec_mux",
"clk_hcodec_mux",
"clk_hevc_mux",
"clk_hevcb_mux";
};
vcodec-dec {
compatible = "amlogic, vcodec-dec";
status = "okay";
};
vdec {
compatible = "amlogic, vdec";
status = "okay";
interrupts = <0 3 1
0 23 1
0 32 1
0 43 1
0 44 1
0 45 1>;
interrupt-names = "vsync",
"demux",
"parser",
"mailbox_0",
"mailbox_1",
"mailbox_2";
};
canvas: canvas {
compatible = "amlogic, meson, canvas";
status = "okay";
reg = <0x0 0xff638000 0x0 0x2000>;
};
codec_io: codec_io {
compatible = "amlogic, codec_io";
status = "okay";
#address-cells=<2>;
#size-cells=<2>;
ranges;
io_cbus_base{
reg = <0x0 0xffd00000 0x0 0x100000>;
};
io_dos_base{
reg = <0x0 0xff620000 0x0 0x10000>;
};
io_hiubus_base{
reg = <0x0 0xff63c000 0x0 0x2000>;
};
io_aobus_base{
reg = <0x0 0xff800000 0x0 0x10000>;
};
io_vcbus_base{
reg = <0x0 0xff900000 0x0 0x40000>;
};
io_dmc_base{
reg = <0x0 0xff638000 0x0 0x2000>;
};
io_efuse_base{
reg = <0x0 0xff630000 0x0 0x2000>;
};
};
rdma {
compatible = "amlogic, meson-tl1, rdma";
status = "okay";
interrupts = <0 89 1>;
interrupt-names = "rdma";
};
meson_fb: fb {
compatible = "amlogic, meson-tl1";
memory-region = <&logo_reserved>;
status = "disabled";
interrupts = <0 3 1
0 56 1
0 89 1>;
interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
/* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
display_mode_default = "1080p60hz";
scale_mode = <1>;
/** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
display_size_default = <1920 1080 1920 2160 32>;
/*1920*1080*4*3 = 0x17BB000*/
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
clock-names = "vpu_clkc";
};
ge2d {
compatible = "amlogic, ge2d-g12a";
status = "okay";
interrupts = <0 146 1>;
interrupt-names = "ge2d";
clocks = <&clkc CLKID_VAPB_MUX>,
<&clkc CLKID_G2D>,
<&clkc CLKID_GE2D_GATE>;
clock-names = "clk_vapb_0",
"clk_ge2d",
"clk_ge2d_gate";
reg = <0x0 0xff940000 0x0 0x10000>;
};
meson-amvideom {
compatible = "amlogic, amvideom";
status = "okay";
interrupts = <0 3 1>;
interrupt-names = "vsync";
};
ionvideo {
compatible = "amlogic, ionvideo";
status = "okay";
};
amlvideo {
compatible = "amlogic, amlvideo";
status = "okay";
};
vdac {
compatible = "amlogic, vdac-tl1";
status = "okay";
};
ddr_bandwidth {
compatible = "amlogic, ddr-bandwidth";
status = "okay";
reg = <0x0 0xff638000 0x0 0x100
0x0 0xff638c00 0x0 0x100>;
interrupts = <0 52 1>;
interrupt-names = "ddr_bandwidth";
};
dmc_monitor {
compatible = "amlogic, dmc_monitor";
status = "okay";
reg_base = <0xff639000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>;
};
efuse: efuse{
compatible = "amlogic, efuse";
read_cmd = <0x82000030>;
write_cmd = <0x82000031>;
get_max_cmd = <0x82000033>;
key = <&efusekey>;
clocks = <&clkc CLKID_EFUSE>;
clock-names = "efuse_clk";
status = "disabled";
};
efusekey:efusekey{
keynum = <4>;
key0 = <&key_0>;
key1 = <&key_1>;
key2 = <&key_2>;
key3 = <&key_3>;
key_0:key_0{
keyname = "mac";
offset = <0>;
size = <6>;
};
key_1:key_1{
keyname = "mac_bt";
offset = <6>;
size = <6>;
};
key_2:key_2{
keyname = "mac_wifi";
offset = <12>;
size = <6>;
};
key_3:key_3{
keyname = "usid";
offset = <18>;
size = <16>;
};
};
audio_data: audio_data {
compatible = "amlogic, audio_data";
query_licence_cmd = <0x82000050>;
status = "disabled";
};
defendkey: defendkey {
compatible = "amlogic, defendkey";
mem_size = <0 0x100000>;
status = "okay";
};
}; /* end of / */
&pinctrl_aobus {
sd_to_ao_uart_clr_pins: sd_to_ao_uart_clr_pins {
mux {
groups = "GPIOAO_0",
"GPIOAO_1",
"GPIOAO_2",
"GPIOAO_3",
"GPIOAO_4",
"GPIOAO_5",
"GPIOAO_6",
"GPIOAO_7",
"GPIOAO_8",
"GPIOAO_9",
"GPIOAO_10",
"GPIOAO_11",
"GPIOE_0",
"GPIOE_1",
"GPIOE_2",
"GPIO_TEST_N";
function = "gpio_aobus";
};
};
sd_to_ao_uart_pins: sd_to_ao_uart_pins {
mux {
groups = "uart_ao_a_tx",
"uart_ao_a_rx",
"uart_ao_a_cts",
"uart_ao_a_rts";
function = "uart_ao_a";
bias-pull-up;
input-enable;
};
};
remote_pins:remote_pin {
mux {
groups = "remote_input_ao";
function = "remote_input_ao";
};
};
pwm_ao_a_pins: pwm_ao_a {
mux {
groups = "pwm_ao_a";
function = "pwm_ao_a";
};
};
pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
mux {
groups = "pwm_ao_a_hiz";
function = "pwm_ao_a";
};
};
pwm_ao_b_pins: pwm_ao_b {
mux {
groups = "pwm_ao_b";
function = "pwm_ao_b";
};
};
pwm_ao_c_pins1: pwm_ao_c_pins1 {
mux {
groups = "pwm_ao_c_4";
function = "pwm_ao_c";
};
};
pwm_ao_c_pins2: pwm_ao_c_pins2 {
mux {
groups = "pwm_ao_c_6";
function = "pwm_ao_c";
};
};
pwm_ao_c_hiz_pins1: pwm_ao_c_hiz1 {
mux {
groups = "pwm_ao_c_hiz_4";
function = "pwm_ao_c";
};
};
pwm_ao_c_hiz_pins2: pwm_ao_c_hiz2 {
mux {
groups = "pwm_ao_c_hiz_7";
function = "pwm_ao_c";
};
};
pwm_ao_d_pins1: pwm_ao_d_pins1 {
mux {
groups = "pwm_ao_d_5";
function = "pwm_ao_d";
};
};
pwm_ao_d_pins2: pwm_ao_d_pins2 {
mux {
groups = "pwm_ao_d_10";
function = "pwm_ao_d";
};
};
pwm_ao_d_pins3: pwm_ao_d_pins3 {
mux {
groups = "pwm_ao_d_e";
function = "pwm_ao_d";
};
};
pwm_a_e2: pwm_a_e2 {
mux {
groups = "pwm_a_e2";
function = "pwm_a_e2";
};
};
i2c_ao_2_pins:i2c_ao_2 {
mux {
groups = "i2c_ao_sck_2",
"i2c_ao_sda_3";
function = "i2c_ao";
bias-pull-up;
drive-strength = <3>;
};
};
i2c_ao_e_pins:i2c_ao_e {
mux {
groups = "i2c_ao_sck_e",
"i2c_ao_sda_e";
function = "i2c_ao";
bias-pull-up;
drive-strength = <3>;
};
};
i2c_ao_slave_pins:i2c_ao_slave {
mux {
groups = "i2c_ao_slave_sck",
"i2c_ao_slave_sda";
function = "i2c_ao_slave";
};
};
ao_uart_pins:ao_uart {
mux {
groups = "uart_ao_a_rx",
"uart_ao_a_tx";
function = "uart_ao_a";
};
};
ao_b_uart_pins1:ao_b_uart1 {
mux {
groups = "uart_ao_b_tx_2",
"uart_ao_b_rx_3";
function = "uart_ao_b";
};
};
ao_b_uart_pins2:ao_b_uart2 {
mux {
groups = "uart_ao_b_tx_8",
"uart_ao_b_rx_9";
function = "uart_ao_b";
};
};
irblaster_pins:irblaster_pin {
mux {
groups = "remote_out_ao";
function = "remote_out_ao";
};
};
irblaster_pins1:irblaster_pin1 {
mux {
groups = "remote_out_ao9";
function = "remote_out_ao";
};
};
jtag_apao_pins:jtag_apao_pin {
mux {
groups = "jtag_a_tdi",
"jtag_a_tdo",
"jtag_a_clk",
"jtag_a_tms";
function = "jtag_a";
};
};
};
&pinctrl_periphs {
/* sdemmc portC */
emmc_clk_cmd_pins: emmc_clk_cmd_pins {
mux {
groups = "emmc_clk",
"emmc_cmd";
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <2>;
};
};
emmc_conf_pull_up: emmc_conf_pull_up {
mux {
groups = "emmc_nand_d7",
"emmc_nand_d6",
"emmc_nand_d5",
"emmc_nand_d4",
"emmc_nand_d3",
"emmc_nand_d2",
"emmc_nand_d1",
"emmc_nand_d0",
"emmc_clk",
"emmc_cmd";
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <2>;
};
};
emmc_conf_pull_done: emmc_conf_pull_done {
mux {
groups = "emmc_nand_ds";
function = "emmc";
input-enable;
bias-pull-down;
drive-strength = <2>;
};
};
/* sdemmc portB */
sd_clk_cmd_pins: sd_clk_cmd_pins {
mux {
groups = "sdcard_cmd",
"sdcard_clk";
function = "sdcard";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
sd_all_pins: sd_all_pins {
mux {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_cmd",
"sdcard_clk";
function = "sdcard";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
sd_1bit_pins: sd_1bit_pins {
mux {
groups = "sdcard_d0",
"sdcard_cmd",
"sdcard_clk";
function = "sdcard";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
ao_to_sd_uart_pins: ao_to_sd_uart_pins {
mux {
groups ="uart_ao_a_rx_w3",
"uart_ao_a_tx_w2",
"uart_ao_a_rx_w7",
"uart_ao_a_tx_w6",
"uart_ao_a_rx_w11",
"uart_ao_a_tx_w10";
function = "uart_ao_a_ee";
bias-pull-up;
input-enable;
};
};
all_nand_pins: all_nand_pins {
mux {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3",
"emmc_nand_d4",
"emmc_nand_d5",
"emmc_nand_d6",
"emmc_nand_d7",
"nand_ce0",
"nand_ale",
"nand_cle",
"nand_wen_clk",
"nand_ren_wr";
function = "nand";
input-enable;
drive-strength = <3>;
};
};
nand_cs_pins:nand_cs {
mux {
groups = "nand_ce0";
function = "nand";
drive-strength = <3>;
};
};
/* sdemmc port */
sdio_clk_cmd_pins: sdio_clk_cmd_pins {
mux {
groups = "sdcard_clk",
"sdcard_cmd";
function = "sdcard";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
sdio_all_pins: sdio_all_pins {
mux {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_clk",
"sdcard_cmd";
function = "sdcard";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
spifc_cs_pin:spifc_cs_pin {
mux {
groups = "nor_cs";
function = "nor";
bias-pull-up;
};
};
spifc_pulldown: spifc_pulldown {
mux {
groups = "nor_d",
"nor_q",
"nor_c";
function = "nor";
bias-pull-down;
};
};
spifc_pullup: spifc_pullup {
mux {
groups = "nor_cs";
function = "nor";
bias-pull-up;
};
};
spifc_all_pins: spifc_all_pins {
mux {
groups = "nor_d",
"nor_q",
"nor_c",
"nor_hold",
"nor_wp";
function = "nor";
input-enable;
bias-pull-down;
};
};
pwm_a_pins: pwm_a {
mux {
groups = "pwm_a";
function = "pwm_a";
};
};
pwm_b_pins1: pwm_b_pins1 {
mux {
groups = "pwm_b_c";
function = "pwm_b";
};
};
pwm_b_pins2: pwm_b_pins2 {
mux {
groups = "pwm_b_z";
function = "pwm_b";
};
};
pwm_c_pins1: pwm_c_pins1 {
mux {
groups = "pwm_c_dv";
function = "pwm_c";
};
};
pwm_c_pins2: pwm_c_pins2 {
mux {
groups = "pwm_c_h";
function = "pwm_c";
};
};
pwm_c_pins3: pwm_c_pins3 {
mux {
groups = "pwm_c_z";
function = "pwm_c";
};
};
pwm_d_pins1: pwm_d_pins1 {
mux {
groups = "pwm_d_dv";
function = "pwm_d";
};
};
pwm_d_pins2: pwm_d_pins2 {
mux {
groups = "pwm_d_z";
function = "pwm_d";
};
};
pwm_e_pins1: pwm_e1 {
mux {
groups = "pwm_e_dv";
function = "pwm_e";
};
};
pwm_e_pins2: pwm_e2 {
mux {
groups = "pwm_e_z";
function = "pwm_e";
};
};
pwm_f_pins1: pwm_f_pins1 {
mux {
groups = "pwm_f_dv";
function = "pwm_f";
};
};
pwm_f_pins2: pwm_f_pins2 {
mux {
groups = "pwm_f_z";
function = "pwm_f";
};
};
i2c0_c_pins:i2c0_c {
mux {
groups = "i2c0_sda_c",
"i2c0_sck_c";
function = "i2c0";
bias-pull-up;
drive-strength = <3>;
};
};
i2c0_dv_pins:i2c0_dv {
mux {
groups = "i2c0_sda_dv",
"i2c0_sck_dv";
function = "i2c0";
bias-pull-up;
drive-strength = <3>;
};
};
i2c1_z_pins:i2c1_z {
mux {
groups = "i2c1_sda_z",
"i2c1_sck_z";
function = "i2c1";
bias-pull-up;
drive-strength = <3>;
};
};
i2c1_h_pins:i2c1_h {
mux {
groups = "i2c1_sda_h",
"i2c1_sck_h";
function = "i2c1";
bias-pull-up;
drive-strength = <3>;
};
};
i2c2_h_pins:i2c2_h {
mux {
groups = "i2c2_sda_h",
"i2c2_sck_h";
function = "i2c2";
bias-pull-up;
drive-strength = <3>;
};
};
i2c2_z_pins:i2c2_z {
mux {
groups = "i2c2_sda_z",
"i2c2_sck_z";
function = "i2c2";
bias-pull-up;
drive-strength = <3>;
};
};
i2c3_h1_pins:i2c3_h1 {
mux {
groups = "i2c3_sda_h1",
"i2c3_sck_h0";
function = "i2c3";
bias-pull-up;
drive-strength = <3>;
};
};
i2c3_h20_pins:i2c3_h3 {
mux {
groups = "i2c3_sda_h20",
"i2c3_sck_h19";
function = "i2c3";
bias-pull-up;
drive-strength = <3>;
};
};
i2c3_dv_pins:i2c3_dv {
mux {
groups = "i2c3_sda_dv",
"i2c3_sck_dv";
function = "i2c3";
bias-pull-up;
drive-strength = <3>;
};
};
i2c3_c_pins:i2c3_c {
mux {
groups = "i2c3_sda_c",
"i2c3_sck_c";
function = "i2c3";
bias-pull-up;
drive-strength = <3>;
};
};
spicc0_pins_h: spicc0_pins_h {
mux {
groups = "spi0_mosi_h",
"spi0_miso_h",
"spi0_clk_h";
function = "spi0";
drive-strength = <1>;
};
};
spicc1_pins_dv: spicc1_pins_dv {
mux {
groups = "spi1_mosi_dv",
"spi1_miso_dv",
"spi1_clk_dv";
function = "spi1";
drive-strength = <1>;
};
};
internal_eth_pins: internal_eth_pins {
mux {
groups = "eth_link_led",
"eth_act_led";
function = "eth";
};
};
internal_gpio_pins: internal_gpio_pins {
mux {
groups = "GPIOZ_14",
"GPIOZ_15";
function = "gpio_periphs";
bias-disable;
input-enable;
};
};
external_eth_pins: external_eth_pins {
mux {
groups = "eth_mdio",
"eth_mdc",
"eth_rgmii_rx_clk",
"eth_rx_dv",
"eth_rxd0",
"eth_rxd1",
"eth_rxd2_rgmii",
"eth_rxd3_rgmii",
"eth_rgmii_tx_clk",
"eth_txen",
"eth_txd0",
"eth_txd1",
"eth_txd2_rgmii",
"eth_txd3_rgmii";
function = "eth";
drive-strength = <3>;
};
};
a_uart_pins:a_uart {
mux {
groups = "uart_a_tx",
"uart_a_rx",
"uart_a_cts",
"uart_a_rts";
function = "uart_a";
};
};
b_uart_pins:b_uart {
mux {
groups = "uart_b_tx",
"uart_b_rx";
function = "uart_b";
};
};
c_uart_pins:c_uart {
mux {
groups = "uart_c_tx",
"uart_c_rx";
function = "uart_c";
};
};
atvdemod_agc_pins: atvdemod_agc_pins {
mux {
groups = "atv_if_agc_dv";
function = "atv";
};
};
dtvdemod_agc_pins: dtvdemod_agc_pins {
mux {
groups = "dtv_if_agc_dv2";
function = "dtv";
};
};
lcd_vbyone_pins: lcd_vbyone_pin {
mux {
groups = "vx1_lockn","vx1_htpdn";
function = "vx1";
};
};
lcd_vbyone_off_pins: lcd_vbyone_off_pin {
mux {
groups = "GPIOH_15","GPIOH_16";
function = "gpio_periphs";
input-enable;
};
};
lcd_tcon_pins: lcd_tcon_pin {
mux {
groups = "tcon_0","tcon_1","tcon_2","tcon_3",
"tcon_4","tcon_5","tcon_6","tcon_7",
"tcon_8","tcon_9","tcon_10","tcon_11",
"tcon_12","tcon_13","tcon_14","tcon_15",
"tcon_lock","tcon_spi_mo","tcon_spi_mi",
"tcon_spi_clk","tcon_spi_ss";
function = "tcon";
};
};
lcd_tcon_off_pins: lcd_tcon_off_pin {
mux {
groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3",
"GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7",
"GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11",
"GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15",
"GPIOH_16","GPIOH_17","GPIOH_18","GPIOH_19",
"GPIOH_20";
function = "gpio_periphs";
input-enable;
};
};
};
&gpu{
tbl = <&dvfs285_cfg
&dvfs400_cfg
&dvfs500_cfg
&dvfs666_cfg
&dvfs800_cfg
&dvfs800_cfg>;
};