| /* |
| * arch/arm64/boot/dts/amlogic/mesontxl.dtsi |
| * |
| * Copyright (C) 2018 Amlogic, Inc. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, but WITHOUT |
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| * more details. |
| * |
| */ |
| |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/amlogic,txl-clkc.h> |
| #include <dt-bindings/gpio/meson-txl-gpio.h> |
| #include <dt-bindings/pwm/pwm.h> |
| #include <dt-bindings/pwm/meson.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/meson_rc.h> |
| #include <dt-bindings/input/input.h> |
| #include "mesongxbb-gpu-mali450.dtsi" |
| #include <dt-bindings/iio/adc/amlogic-saradc.h> |
| |
| / { |
| interrupt-parent = <&gic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| cpus:cpus { |
| #address-cells = <2>; |
| #size-cells = <0>; |
| #cooling-cells = <2>; |
| |
| cpu-map { |
| cluster0:cluster0 { |
| core0 { |
| cpu = <&CPU0>; |
| }; |
| core1 { |
| cpu = <&CPU1>; |
| }; |
| core2 { |
| cpu = <&CPU2>; |
| }; |
| core3 { |
| cpu = <&CPU3>; |
| }; |
| }; |
| }; |
| |
| CPU0:cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53","arm,armv8"; |
| reg = <0x0 0x0>; |
| enable-method = "psci"; |
| clocks = <&scpi_dvfs 0>; |
| clock-names = "cpu-cluster.0"; |
| cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| }; |
| |
| CPU1:cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53","arm,armv8"; |
| reg = <0x0 0x1>; |
| enable-method = "psci"; |
| clocks = <&scpi_dvfs 0>; |
| clock-names = "cpu-cluster.0"; |
| cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| }; |
| |
| CPU2:cpu@2 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53","arm,armv8"; |
| reg = <0x0 0x2>; |
| enable-method = "psci"; |
| clocks = <&scpi_dvfs 0>; |
| clock-names = "cpu-cluster.0"; |
| cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| }; |
| |
| CPU3:cpu@3 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53","arm,armv8"; |
| reg = <0x0 0x3>; |
| enable-method = "psci"; |
| clocks = <&scpi_dvfs 0>; |
| clock-names = "cpu-cluster.0"; |
| cpu-idle-states = <&SYSTEM_SLEEP_0>; |
| }; |
| |
| idle-states { |
| entry-method = "arm,psci"; |
| /* |
| CPU_SLEEP_0: cpu-sleep-0 { |
| compatible = "arm,idle-state"; |
| arm,psci-suspend-param = <0x0010000>; |
| local-timer-stop; |
| entry-latency-us = <3000>; |
| exit-latency-us = <3000>; |
| min-residency-us = <8000>; |
| }; |
| */ |
| |
| SYSTEM_SLEEP_0: system-sleep-0 { |
| compatible = "arm,idle-state"; |
| arm,psci-suspend-param = <0x0020000>; |
| local-timer-stop; |
| entry-latency-us = <0x3fffffff>; |
| exit-latency-us = <0x40000000>; |
| min-residency-us = <0xffffffff>; |
| }; |
| |
| }; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <GIC_PPI 13 0xff01>, |
| <GIC_PPI 14 0xff01>, |
| <GIC_PPI 11 0xff01>, |
| <GIC_PPI 10 0xff01>; |
| }; |
| |
| timer_bc: timer@c1109990 { |
| compatible = "arm, meson-bc-timer"; |
| reg = <0x0 0xc1109990 0x0 0x4 0x0 0xc1109994 0x0 0x4>; |
| timer_name = "Meson TimerF"; |
| clockevent-rating = <300>; |
| clockevent-shift = <20>; |
| clockevent-features = <0x23>; |
| interrupts = <0 60 1>; |
| bit_enable = <16>; |
| bit_mode = <12>; |
| bit_resolution = <0>; |
| }; |
| |
| arm_pmu { |
| compatible = "arm,armv8-pmuv3"; |
| /* clusterb-enabled; */ |
| interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0x0 0xc8834680 0x0 0x4>; |
| cpumasks = <0xf>; |
| /* default 10ms */ |
| relax-timer-ns = <10000000>; |
| /* default 10000us */ |
| max-wait-cnt = <10000>; |
| }; |
| |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| gic: interrupt-controller@2c001000 { |
| compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; |
| #interrupt-cells = <3>; |
| #address-cells = <0>; |
| interrupt-controller; |
| reg = <0x0 0xc4301000 0 0x1000>, |
| <0x0 0xc4302000 0 0x0100>; |
| interrupts = <GIC_PPI 9 0xf04>; |
| }; |
| |
| clocks { |
| xtal: xtal-clk { |
| compatible = "fixed-clock"; |
| clock-frequency = <24000000>; |
| clock-output-names = "xtal"; |
| #clock-cells = <0>; |
| }; |
| }; |
| |
| cpu_iomap { |
| compatible = "amlogic, iomap"; |
| #address-cells=<2>; |
| #size-cells=<2>; |
| ranges; |
| io_cbus_base { |
| reg = <0x0 0xc1100000 0x0 0x100000>; |
| }; |
| io_apb_base { |
| reg = <0x0 0xd0000000 0x0 0x100000>; |
| }; |
| io_aobus_base { |
| reg = <0x0 0xc8100000 0x0 0x100000>; |
| }; |
| io_vapb_base { |
| reg = <0x0 0xd0100000 0x0 0x100000>; |
| }; |
| io_hiu_base { |
| reg = <0x0 0xc883c000 0x0 0x2000>; |
| }; |
| }; |
| |
| cpuinfo { |
| compatible = "amlogic, cpuinfo"; |
| cpuinfo_cmd = <0x82000044>; |
| }; |
| |
| ram-dump { |
| compatible = "amlogic, ram_dump"; |
| status = "okay"; |
| reg = <0x0 0xC88345E0 0x0 4>; |
| reg-names = "PREG_STICKY_REG8"; |
| }; |
| |
| securitykey { |
| compatible = "amlogic, securitykey"; |
| status = "okay"; |
| storage_query = <0x82000060>; |
| storage_read = <0x82000061>; |
| storage_write = <0x82000062>; |
| storage_tell = <0x82000063>; |
| storage_verify = <0x82000064>; |
| storage_status = <0x82000065>; |
| storage_list = <0x82000067>; |
| storage_remove = <0x82000068>; |
| storage_in_func = <0x82000023>; |
| storage_out_func = <0x82000024>; |
| storage_block_func = <0x82000025>; |
| storage_size_func = <0x82000027>; |
| storage_set_enctype = <0x8200006A>; |
| storage_get_enctype = <0x8200006B>; |
| storage_version = <0x8200006C>; |
| }; |
| |
| mailbox: mhu@c883c400 { |
| compatible = "amlogic, meson_mhu"; |
| reg = <0x0 0xc883c400 0x0 0x4c>, /* MHU registers */ |
| <0x0 0xc8013000 0x0 0x800>; /* Payload area */ |
| interrupts = <0 209 1>, /* low priority interrupt */ |
| <0 210 1>; /* high priority interrupt */ |
| #mbox-cells = <1>; |
| mbox-names = "cpu_to_scp_low", "cpu_to_scp_high"; |
| mboxes = <&mailbox 0 &mailbox 1>; |
| }; |
| |
| scpi_clocks { |
| compatible = "arm, scpi-clks"; |
| |
| scpi_dvfs: scpi_clocks@0 { |
| compatible = "arm, scpi-clk-indexed"; |
| #clock-cells = <1>; |
| clock-indices = <0>; |
| clock-output-names = "vcpu"; |
| }; |
| |
| }; |
| |
| pinctrl_aobus: pinctrl@c8100014{ |
| compatible = "amlogic,meson-txl-aobus-pinctrl"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| gpio_ao: ao-bank@c8100014{ |
| reg = <0x0 0xc8100014 0x0 0x8>, |
| <0x0 0xc810002c 0x0 0x4>, |
| <0x0 0xc8100024 0x0 0x8>; |
| reg-names = "mux", "pull", "gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| pinctrl_periphs: pinctrl@c88344b0{ |
| compatible = "amlogic,meson-txl-periphs-pinctrl"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| gpio: banks@c88344b0{ |
| reg = <0x0 0xc88344b0 0x0 0x28>, |
| <0x0 0xc88344e8 0x0 0x14>, |
| <0x0 0xc8834520 0x0 0x14>, |
| <0x0 0xc8834430 0x0 0x40>; |
| reg-names = "mux", |
| "pull", |
| "pull-enable", |
| "gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| dwc3: dwc3@c9000000 { |
| compatible = "synopsys, dwc3"; |
| status = "disable"; |
| reg = <0x0 0xc9000000 0x0 0x100000>; |
| interrupts = <0 30 4>; |
| usb-phy = <&usb2_phy>, <&usb3_phy>; |
| cpu-type = "gxl"; |
| clock-src = "usb3.0"; |
| }; |
| |
| usb2_phy: usb2phy@d0078000 { |
| compatible = "amlogic, amlogic-new-usb2"; |
| status = "disable"; |
| portnum = <4>; |
| reg = <0x0 0xd0078000 0x0 0x80 |
| 0x0 0xc1104408 0x0 0x4>; |
| }; |
| |
| usb3_phy: usb3phy@d0078080 { |
| compatible = "amlogic, amlogic-new-usb3"; |
| status = "disable"; |
| portnum = <0>; |
| reg = <0x0 0xd0078080 0x0 0x20>; |
| }; |
| |
| dwc2_a: dwc2_a@c9100000 { |
| compatible = "amlogic, dwc2"; |
| status = "disable"; |
| reg = <0x0 0xc9100000 0x0 0x40000>; |
| interrupts = <0 31 4>; |
| pl-periph-id = <0>; /** lm name */ |
| clock-src = "usb0"; /** clock src */ |
| port-id = <0>; /** ref to mach/usb.h */ |
| port-type = <2>; /** 0: otg, 1: host, 2: slave */ |
| port-speed = <0>; /** 0: default, high, 1: full */ |
| port-config = <0>; /** 0: default */ |
| port-dma = <0>; |
| port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/ |
| usb-fifo = <728>; |
| cpu-type = "gxl"; |
| phy-reg = <0xd0078000>; |
| phy-reg-size = <0xa0>; |
| clocks = <&clkc CLKID_USB_GENERAL |
| &clkc CLKID_USB1_TO_DDR |
| &clkc CLKID_USB1>; |
| clock-names = "usb_general", |
| "usb1", |
| "usb1_to_ddr"; |
| }; |
| |
| ethmac: ethernet@0xc9410000 { |
| compatible = "amlogic, gxbb-eth-dwmac"; |
| status = "disable"; |
| reg = <0x0 0xc9410000 0x0 0x10000 |
| 0x0 0xc8834540 0x0 0x8 |
| 0x0 0xc8834558 0x0 0xc |
| 0x0 0xc1104484 0x0 0x4>; |
| interrupts = <0 8 1 |
| 0 9 1>; |
| phy-mode= "rmii"; |
| mc_val_internal_phy = <0x1800>; |
| mc_val_external_phy = <0x1621>; |
| interrupt-names = "macirq", |
| "phyirq"; |
| clocks = <&clkc CLKID_ETH_CORE>; |
| clock-names = "ethclk81"; |
| internal_phy=<1>; |
| }; |
| |
| saradc: saradc { |
| compatible = "amlogic,meson-txl-saradc"; |
| status = "okay"; |
| #io-channel-cells = <1>; |
| clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>; |
| clock-names = "xtal", "saradc_clk"; |
| interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; |
| reg = <0x0 0xc8100600 0x0 0x38>; |
| }; |
| |
| jtag { |
| compatible = "amlogic, jtag"; |
| status = "okay"; |
| select = "disable"; /* disable/apao/apee */ |
| pinctrl-names="jtag_apao_pins", "jtag_apee_pins"; |
| pinctrl-0=<&jtag_apao_pins>; |
| pinctrl-1=<&jtag_apee_pins>; |
| }; |
| |
| meson_suspend: pm { |
| compatible = "amlogic, pm"; |
| status = "okay"; |
| reg = <0x0 0xc81000a8 0x0 0x4>, |
| <0x0 0xc810023c 0x0 0x4>; |
| }; |
| |
| reboot { |
| compatible = "amlogic,reboot"; |
| sys_reset = <0x84000009>; |
| sys_poweroff = <0x84000008>; |
| }; |
| |
| rtc { |
| compatible = "amlogic, aml_vrtc"; |
| alarm_reg_addr = <0xc81000a8>; |
| timer_e_addr = <0xc1109988>; |
| init_date = "2018/01/01"; |
| status = "okay"; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| cbus: bus@c1100000 { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| reg = <0x0 0xc1100000 0x0 0x100000>; |
| ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; |
| |
| meson_clk_msr@875c{ |
| compatible = "amlogic, gxl_measure"; |
| reg = <0x0 0x875c 0x0 0x4 |
| 0x0 0x8764 0x0 0x4>; |
| }; |
| |
| /*i2c-A*/ |
| i2c0: i2c@8500 { |
| compatible = "amlogic,meson-txl-i2c"; |
| status = "disabled"; |
| reg = <0x0 0x8500 0x0 0x20>; |
| interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| }; |
| |
| /*i2c-B*/ |
| i2c1: i2c@87c0 { |
| compatible = "amlogic,meson-txl-i2c"; |
| status = "disabled"; |
| reg = <0x0 0x87c0 0x0 0x20>; |
| interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| }; |
| |
| /*i2c-C*/ |
| i2c2: i2c@87e0 { |
| compatible = "amlogic,meson-txl-i2c"; |
| status = "disabled"; |
| reg = <0x0 0x87e0 0x0 0x20>; |
| interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| }; |
| |
| /*i2c-D*/ |
| i2c3: i2c@8d20 { |
| compatible = "amlogic,meson-txl-i2c"; |
| status = "disabled"; |
| reg = <0x0 0x8d20 0x0 0x20>; |
| interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| }; |
| |
| pwm_ab: pwm@8550 { |
| compatible = "amlogic,txl-ee-pwm"; |
| reg = <0x0 0x8550 0x0 0x1c>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| pwm_cd: pwm@8640 { |
| compatible = "amlogic,txl-ee-pwm"; |
| reg = <0x0 0x8640 0x0 0x1c>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| pwm_ef: pwm@86c0 { |
| compatible = "amlogic,txl-ee-pwm"; |
| reg = <0x0 0x86c0 0x0 0x1c>; |
| #pwm-cells = <3>; |
| status = "disabled"; |
| }; |
| |
| spicc: spi@8d80 { |
| compatible = "amlogic,meson-txl-spicc", |
| "amlogic,meson-txlx-spicc"; |
| reg = <0x0 0x8d80 0x0 0x3c>; |
| interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clkc CLKID_SPICC0>; |
| clock-names = "core"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| uart_A: serial@84c0 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x0 0x84c0 0x0 0x18>; |
| interrupts = <0 26 1>; |
| status = "disabled"; |
| clocks = <&xtal &clkc CLKID_UART0>; |
| clock-names = "clk_uart", "clk_gate"; |
| fifosize = < 128 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&a_uart_pins>; |
| }; |
| |
| uart_B: serial@84dc { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x0 0x84dc 0x0 0x18>; |
| interrupts = <0 75 1>; |
| status = "disabled"; |
| clocks = <&xtal &clkc CLKID_UART1>; |
| clock-names = "clk_uart", "clk_gate"; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&b_uart_pins>; |
| }; |
| |
| uart_C: serial@8700 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x0 0x8700 0x0 0x18>; |
| interrupts = <0 93 1>; |
| status = "disabled"; |
| clocks = <&xtal &clkc CLKID_UART2>; |
| clock-names = "clk_uart", "clk_gate"; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&c_uart_pins>; |
| }; |
| |
| gpio_intc: interrupt-controller@9880 { |
| compatible = "amlogic,meson-gpio-intc", |
| "amlogic,meson-txl-gpio-intc"; |
| reg = <0x0 0x9880 0x0 0x10>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| amlogic,channel-interrupts = |
| <64 65 66 67 68 69 70 71>; |
| status = "okay"; |
| }; |
| |
| wdt_ee: watchdog@98d0 { |
| compatible = "amlogic, meson-wdt"; |
| status = "okay"; |
| default_timeout=<10>; |
| reset_watchdog_method=<1>;/*0:sysfs,1:kernel*/ |
| reset_watchdog_time=<2>; |
| shutdown_timeout=<10>; |
| firmware_timeout=<6>; |
| suspend_timeout=<6>; |
| reg = <0x0 0x98d0 0x0 0x10>; |
| clock-names = "xtal"; |
| clocks = <&xtal>; |
| }; |
| |
| }; /* end of cbus */ |
| |
| aobus: bus@c8100000 { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| reg = <0x0 0xc8100000 0x0 0x100000>; |
| ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; |
| |
| cpu_version { |
| reg=<0x0 0x220 0x0 0x4>; |
| }; |
| |
| aoclkc: clock-controller@0 { |
| compatible = "amlogic,txl-aoclkc"; |
| #clock-cells = <1>; |
| reg = <0x0 0x0 0x0 0x1000>; |
| }; |
| |
| uart_AO: serial@4c0 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x0 0x4c0 0x0 0x18>; |
| interrupts = <0 193 1>; |
| status = "okay"; |
| clocks = <&xtal>; |
| clock-names = "clk_uart"; |
| xtal_tick_en = <1>; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| /*pinctrl-0 = <&ao_uart_pins>;*/ |
| /* 0 not support;1 support */ |
| support-sysrq = <0>; |
| }; |
| |
| uart_AO_B: serial@04e0 { |
| compatible = "amlogic, meson-uart"; |
| reg = <0x0 0x04e0 0x0 0x18>; |
| interrupts = <0 197 1>; |
| status = "disabled"; |
| clocks = <&xtal>; |
| clock-names = "clk_uart"; |
| fifosize = < 64 >; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ao_b_uart_pins>; |
| }; |
| |
| i2c_AO: i2c@0500 { |
| compatible = "amlogic,meson-txl-i2c"; |
| status = "disabled"; |
| reg = <0x0 0x0500 0x0 0x20>; |
| interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| }; |
| |
| pwm_aoab: pwm@0550 { |
| compatible = "amlogic,txl-ao-pwm"; |
| reg = <0x0 0x0550 0x0 0x1c>; |
| #pwm-cells = <3>; |
| clocks = <&xtal>, |
| <&xtal>, |
| <&xtal>, |
| <&xtal>; |
| clock-names = "clkin0", |
| "clkin1", |
| "clkin2", |
| "clkin3"; |
| status = "disabled"; |
| }; |
| |
| irblaster: meson-irblaster@c0 { |
| compatible = "amlogic, aml_irblaster"; |
| reg = <0x0 0xc0 0x0 0xc>, |
| <0x0 0x40 0x0 0x4>; |
| #irblaster-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| remote:rc@0580 { |
| compatible = "amlogic, aml_remote"; |
| dev_name = "meson-remote"; |
| reg = <0x0 0x0580 0x00 0x44>, |
| <0x0 0x0480 0x00 0x20>; |
| status = "okay"; |
| protocol = <REMOTE_TYPE_NEC>; |
| interrupts = <0 196 1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&remote_pins>; |
| map = <&custom_maps>; |
| max_frame_time = <200>; |
| }; |
| }; /* end of aobus*/ |
| |
| periphs: periphs@c8834000 { |
| compatible = "simple-bus"; |
| reg = <0x0 0xc8834000 0x0 0x2000>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; |
| |
| rng { |
| compatible = "amlogic,meson-rng"; |
| reg = <0x0 0x0 0x0 0x4>; |
| quality = /bits/ 16 <1000>; |
| }; |
| };/* end of periphs */ |
| |
| hiubus: bus@c883c000 { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| reg = <0x0 0xc883c000 0x0 0x2000>; |
| ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; |
| |
| clkc: clock-controller@0 { |
| compatible = "amlogic,txl-clkc"; |
| #clock-cells = <1>; |
| reg = <0x0 0x0 0x0 0x3fc>; |
| }; |
| };/* end of hiubus*/ |
| |
| }; /* end of soc*/ |
| |
| custom_maps: custom_maps { |
| mapnum = <3>; |
| map0 = <&map_0>; |
| map1 = <&map_1>; |
| map2 = <&map_2>; |
| map_0: map_0{ |
| mapname = "amlogic-remote-1"; |
| customcode = <0xfb04>; |
| release_delay = <80>; |
| size = <44>; /*keymap size*/ |
| keymap = <REMOTE_KEY(0x01, KEY_1) |
| REMOTE_KEY(0x02, KEY_2) |
| REMOTE_KEY(0x03, KEY_3) |
| REMOTE_KEY(0x04, KEY_4) |
| REMOTE_KEY(0x05, KEY_5) |
| REMOTE_KEY(0x06, KEY_6) |
| REMOTE_KEY(0x07, KEY_7) |
| REMOTE_KEY(0x08, KEY_8) |
| REMOTE_KEY(0x09, KEY_9) |
| REMOTE_KEY(0x0a, KEY_0) |
| REMOTE_KEY(0x1F, KEY_FN_F1) |
| REMOTE_KEY(0x15, KEY_MENU) |
| REMOTE_KEY(0x16, KEY_TAB) |
| REMOTE_KEY(0x0c, KEY_CHANNELUP) |
| REMOTE_KEY(0x0d, KEY_CHANNELDOWN) |
| REMOTE_KEY(0x0e, KEY_VOLUMEUP) |
| REMOTE_KEY(0x0f, KEY_VOLUMEDOWN) |
| REMOTE_KEY(0x11, KEY_HOME) |
| REMOTE_KEY(0x1c, KEY_RIGHT) |
| REMOTE_KEY(0x1b, KEY_LEFT) |
| REMOTE_KEY(0x19, KEY_UP) |
| REMOTE_KEY(0x1a, KEY_DOWN) |
| REMOTE_KEY(0x1d, KEY_ENTER) |
| REMOTE_KEY(0x17, KEY_MUTE) |
| REMOTE_KEY(0x49, KEY_FINANCE) |
| REMOTE_KEY(0x43, KEY_BACK) |
| REMOTE_KEY(0x12, KEY_FN_F4) |
| REMOTE_KEY(0x14, KEY_FN_F5) |
| REMOTE_KEY(0x18, KEY_FN_F6) |
| REMOTE_KEY(0x59, KEY_INFO) |
| REMOTE_KEY(0x5a, KEY_STOPCD) |
| REMOTE_KEY(0x10, KEY_POWER) |
| REMOTE_KEY(0x42, KEY_PREVIOUSSONG) |
| REMOTE_KEY(0x44, KEY_NEXTSONG) |
| REMOTE_KEY(0x1e, KEY_REWIND) |
| REMOTE_KEY(0x4b, KEY_FASTFORWARD) |
| REMOTE_KEY(0x58, KEY_PLAYPAUSE) |
| REMOTE_KEY(0x46, KEY_PROPS) |
| REMOTE_KEY(0x40, KEY_UNDO) |
| REMOTE_KEY(0x38, KEY_SCROLLLOCK) |
| REMOTE_KEY(0x57, KEY_FN) |
| REMOTE_KEY(0x5b, KEY_FN_ESC) |
| REMOTE_KEY(0x13, 195) |
| REMOTE_KEY(0x54, KEY_RED) |
| REMOTE_KEY(0x4c, KEY_GREEN) |
| REMOTE_KEY(0x4e, KEY_YELLOW) |
| REMOTE_KEY(0x55, KEY_BLUE) |
| REMOTE_KEY(0x53, KEY_BLUETOOTH) |
| REMOTE_KEY(0x52, KEY_WLAN) |
| REMOTE_KEY(0x39, KEY_CAMERA) |
| REMOTE_KEY(0x41, KEY_SOUND) |
| REMOTE_KEY(0x0b, KEY_QUESTION) |
| REMOTE_KEY(0x00, KEY_CHAT) |
| REMOTE_KEY(0x13, KEY_SEARCH)>; |
| }; |
| |
| map_1: map_1{ |
| mapname = "amlogic-remote-2"; |
| customcode = <0xfe01>; |
| release_delay = <80>; |
| size = <53>; |
| keymap = <REMOTE_KEY(0x01, KEY_1) |
| REMOTE_KEY(0x02, KEY_2) |
| REMOTE_KEY(0x03, KEY_3) |
| REMOTE_KEY(0x04, KEY_4) |
| REMOTE_KEY(0x05, KEY_5) |
| REMOTE_KEY(0x06, KEY_6) |
| REMOTE_KEY(0x07, KEY_7) |
| REMOTE_KEY(0x08, KEY_8) |
| REMOTE_KEY(0x09, KEY_9) |
| REMOTE_KEY(0x0a, KEY_0) |
| REMOTE_KEY(0x1F, KEY_FN_F1) |
| REMOTE_KEY(0x15, KEY_MENU) |
| REMOTE_KEY(0x16, KEY_TAB) |
| REMOTE_KEY(0x0c, KEY_CHANNELUP) |
| REMOTE_KEY(0x0d, KEY_CHANNELDOWN) |
| REMOTE_KEY(0x0e, KEY_VOLUMEUP) |
| REMOTE_KEY(0x0f, KEY_VOLUMEDOWN) |
| REMOTE_KEY(0x11, KEY_HOME) |
| REMOTE_KEY(0x1c, KEY_RIGHT) |
| REMOTE_KEY(0x1b, KEY_LEFT) |
| REMOTE_KEY(0x19, KEY_UP) |
| REMOTE_KEY(0x1a, KEY_DOWN) |
| REMOTE_KEY(0x1d, KEY_ENTER) |
| REMOTE_KEY(0x17, KEY_MUTE) |
| REMOTE_KEY(0x49, KEY_FINANCE) |
| REMOTE_KEY(0x43, KEY_BACK) |
| REMOTE_KEY(0x12, KEY_FN_F4) |
| REMOTE_KEY(0x14, KEY_FN_F5) |
| REMOTE_KEY(0x18, KEY_FN_F6) |
| REMOTE_KEY(0x59, KEY_INFO) |
| REMOTE_KEY(0x5a, KEY_STOPCD) |
| REMOTE_KEY(0x10, KEY_POWER) |
| REMOTE_KEY(0x42, KEY_PREVIOUSSONG) |
| REMOTE_KEY(0x44, KEY_NEXTSONG) |
| REMOTE_KEY(0x1e, KEY_REWIND) |
| REMOTE_KEY(0x4b, KEY_FASTFORWARD) |
| REMOTE_KEY(0x58, KEY_PLAYPAUSE) |
| REMOTE_KEY(0x46, KEY_PROPS) |
| REMOTE_KEY(0x40, KEY_UNDO) |
| REMOTE_KEY(0x38, KEY_SCROLLLOCK) |
| REMOTE_KEY(0x57, KEY_FN) |
| REMOTE_KEY(0x5b, KEY_FN_ESC) |
| REMOTE_KEY(0x54, KEY_RED) |
| REMOTE_KEY(0x4c, KEY_GREEN) |
| REMOTE_KEY(0x4e, KEY_YELLOW) |
| REMOTE_KEY(0x55, KEY_BLUE) |
| REMOTE_KEY(0x53, KEY_BLUETOOTH) |
| REMOTE_KEY(0x52, KEY_WLAN) |
| REMOTE_KEY(0x39, KEY_CAMERA) |
| REMOTE_KEY(0x41, KEY_SOUND) |
| REMOTE_KEY(0x0b, KEY_QUESTION) |
| REMOTE_KEY(0x00, KEY_CHAT) |
| REMOTE_KEY(0x13, KEY_SEARCH)>; |
| }; |
| |
| map_2: map_2{ |
| mapname = "amlogic-remote-3"; |
| customcode = <0xbd02>; |
| release_delay = <80>; |
| size = <17>; |
| keymap = <REMOTE_KEY(0xca,103) |
| REMOTE_KEY(0xd2,108) |
| REMOTE_KEY(0x99,105) |
| REMOTE_KEY(0xc1,106) |
| REMOTE_KEY(0xce,KEY_ENTER) |
| REMOTE_KEY(0x45,116) |
| REMOTE_KEY(0xc5,133) |
| REMOTE_KEY(0x80,113) |
| REMOTE_KEY(0xd0,15) |
| REMOTE_KEY(0xd6,125) |
| REMOTE_KEY(0x95,102) |
| REMOTE_KEY(0xdd,104) |
| REMOTE_KEY(0x8c,109) |
| REMOTE_KEY(0x89,131) |
| REMOTE_KEY(0x9c,130) |
| REMOTE_KEY(0x9a,120) |
| REMOTE_KEY(0xcd,121)>; |
| }; |
| }; |
| |
| aocec: aocec@0xc8100000 { |
| compatible = "amlogic, aocec-txl"; |
| status = "okay"; |
| vendor_name = "Amlogic"; /* Max Chars: 8 */ |
| /* Refer to the following URL at: |
| * http://standards.ieee.org/develop/regauth/oui/oui.txt |
| */ |
| vendor_id = <0x000000>; |
| product_desc = "TXL"; /* Max Chars: 16 */ |
| cec_osd_string = "AML_TV"; /* Max Chars: 14 */ |
| port_num = <3>; |
| ee_cec; |
| arc_port_mask = <0x2>; |
| interrupts = <0 56 1 |
| 0 199 1>; |
| interrupt-names = "hdmi_aocecb","hdmi_aocec"; |
| pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; |
| pinctrl-0=<&hdmitx_aocec>; |
| pinctrl-1=<&hdmitx_aocecb>; |
| pinctrl-2=<&hdmitx_aocec>; |
| reg = <0x0 0xc810023c 0x0 0x4 |
| 0x0 0xc8100000 0x0 0x200 |
| 0x0 0xda83e000 0x0 0x10 |
| 0x0 0xc883c000 0x0 0x400>; |
| reg-names = "ao_exit","ao","hdmirx","hhi"; |
| }; |
| |
| canvas: canvas{ |
| compatible = "amlogic, meson, canvas"; |
| dev_name = "amlogic-canvas"; |
| status = "okay"; |
| reg = <0x0 0xc8838000 0x0 0x2000>; |
| }; |
| |
| codec_io: codec_io { |
| compatible = "amlogic, codec_io"; |
| status = "okay"; |
| #address-cells=<2>; |
| #size-cells=<2>; |
| ranges; |
| io_cbus_base{ |
| reg = <0x0 0xC1100000 0x0 0x100000>; |
| }; |
| io_dos_base{ |
| reg = <0x0 0xc8820000 0x0 0x10000>; |
| }; |
| io_hiubus_base{ |
| reg = <0x0 0xc883c000 0x0 0x2000>; |
| }; |
| io_aobus_base{ |
| reg = <0x0 0xc8100000 0x0 0x100000>; |
| }; |
| io_vcbus_base{ |
| reg = <0x0 0xd0100000 0x0 0x40000>; |
| }; |
| io_dmc_base{ |
| reg = <0x0 0xc8838000 0x0 0x400>; |
| }; |
| }; |
| |
| vpu { |
| compatible = "amlogic, vpu-txl"; |
| dev_name = "vpu"; |
| status = "okay"; |
| clocks = <&clkc CLKID_VAPB_MUX>, |
| <&clkc CLKID_VPU_INTR>, |
| <&clkc CLKID_VPU_P0_COMP>, |
| <&clkc CLKID_VPU_P1_COMP>, |
| <&clkc CLKID_VPU_MUX>; |
| clock-names = "vapb_clk", |
| "vpu_intr_gate", |
| "vpu_clk0", |
| "vpu_clk1", |
| "vpu_clk"; |
| clk_level = <7>; |
| /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */ |
| /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */ |
| }; |
| |
| ge2d { |
| compatible = "amlogic, ge2d-txl"; |
| status = "okay"; |
| interrupts = <0 150 1>; |
| interrupt-names = "ge2d"; |
| clocks = <&clkc CLKID_VAPB_MUX>, |
| <&clkc CLKID_G2D>, |
| <&clkc CLKID_GE2D_GATE>; |
| clock-names = "clk_vapb_0", |
| "clk_ge2d", |
| "clk_ge2d_gate"; |
| reg = <0x0 0xd0160000 0x0 0x10000>; |
| }; |
| |
| meson-amvideom { |
| compatible = "amlogic, amvideom"; |
| status = "okay"; |
| interrupts = <0 3 1>; |
| interrupt-names = "vsync"; |
| }; |
| |
| mesonstream { |
| compatible = "amlogic, codec, streambuf"; |
| status = "okay"; |
| clocks = <&clkc CLKID_DOS_PARSER |
| &clkc CLKID_DEMUX |
| &clkc CLKID_DOS |
| &clkc CLKID_CLK81 |
| &clkc CLKID_VDEC_MUX |
| &clkc CLKID_HCODEC_MUX |
| &clkc CLKID_HEVC_MUX>; |
| clock-names = "parser_top", |
| "demux", |
| "vdec", |
| "clk_81", |
| "clk_vdec_mux", |
| "clk_hcodec_mux", |
| "clk_hevc_mux"; |
| }; |
| |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| status = "okay"; |
| memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| }; |
| |
| vdec { |
| compatible = "amlogic, vdec"; |
| status = "okay"; |
| interrupts = <0 3 1 |
| 0 23 1 |
| 0 32 1 |
| 0 43 1 |
| 0 44 1 |
| 0 45 1>; |
| interrupt-names = "vsync", |
| "demux", |
| "parser", |
| "mailbox_0", |
| "mailbox_1", |
| "mailbox_2"; |
| }; |
| |
| amvenc_avc { |
| compatible = "amlogic, amvenc_avc"; |
| status = "okay"; |
| //memory-region = <&amvenc_avc_reserved>; |
| //memory-region = <&avc_cma_reserved>; |
| interrupts = <0 45 1>; |
| interrupt-names = "mailbox_2"; |
| }; |
| |
| rdma { |
| compatible = "amlogic, meson, rdma"; |
| dev_name = "amlogic-rdma"; |
| status = "okay"; |
| interrupts = <0 89 1>; |
| interrupt-names = "rdma"; |
| }; |
| |
| audio_data: audio_data { |
| compatible = "amlogic, audio_data"; |
| query_licence_cmd = <0x82000050>; |
| status = "disabled"; |
| }; |
| |
| efuse: efuse { |
| compatible = "amlogic, efuse"; |
| read_cmd = <0x82000030>; |
| write_cmd = <0x82000031>; |
| get_max_cmd = <0x82000033>; |
| key = <&efusekey>; |
| clocks = <&clkc CLKID_EFUSE>; |
| clock-names = "efuse_clk"; |
| status = "disabled"; |
| }; |
| |
| efusekey:efusekey { |
| keynum = <4>; |
| key0 = <&key_0>; |
| key1 = <&key_1>; |
| key2 = <&key_2>; |
| key3 = <&key_3>; |
| key_0:key_0 { |
| keyname = "mac"; |
| offset = <0>; |
| size = <6>; |
| }; |
| key_1:key_1 { |
| keyname = "mac_bt"; |
| offset = <6>; |
| size = <6>; |
| }; |
| key_2:key_2 { |
| keyname = "mac_wifi"; |
| offset = <12>; |
| size = <6>; |
| }; |
| key_3:key_3 { |
| keyname = "usid"; |
| offset = <18>; |
| size = <16>; |
| }; |
| }; |
| |
| cpu_ver_name { |
| compatible = "amlogic, cpu-major-id-txl"; |
| status = "okay"; |
| }; |
| |
| ddr_bandwidth { |
| compatible = "amlogic, ddr-bandwidth"; |
| status = "okay"; |
| reg = <0x0 0xc8838000 0x0 0x100 |
| 0x0 0xc8837000 0x0 0x100>; |
| interrupts = <0 52 1>; |
| interrupt-names = "ddr_bandwidth"; |
| }; |
| dmc_monitor { |
| compatible = "amlogic, dmc_monitor"; |
| status = "okay"; |
| reg_base = <0xda838400>; |
| interrupts = <0 51 1>; |
| }; |
| |
| vdac { |
| compatible = "amlogic, vdac-txl"; |
| status = "okay"; |
| }; |
| |
| defendkey: defendkey { |
| compatible = "amlogic, defendkey"; |
| reg = <0x0 0xc8834500 0x0 0x4>; /*RNG_USR_DATA*/ |
| mem_size = <0x0 0x100000>; |
| status = "okay"; |
| }; |
| }; /* end of / */ |
| |
| &gpu{ |
| /*gpu max freq is 750M*/ |
| tbl = <&clk285_cfg &clk400_cfg &clk500_cfg &clk666_cfg &clk750_cfg>; |
| }; |
| |
| &pinctrl_aobus { |
| |
| pwm_ao_a_ao3_pins: pwm_ao_a_ao3 { |
| mux { |
| groups = "pwm_ao_a_ao3"; |
| function = "pwm_ao_a"; |
| }; |
| }; |
| |
| pwm_ao_a_ao7_pins: pwm_ao_a_ao7 { |
| mux { |
| groups = "pwm_ao_a_ao7"; |
| function = "pwm_ao_a"; |
| }; |
| }; |
| |
| pwm_ao_b_ao8_pins: pwm_ao_b_ao8 { |
| mux { |
| groups = "pwm_ao_b_ao8"; |
| function = "pwm_ao_b"; |
| }; |
| }; |
| |
| pwm_ao_b_ao9_pins: pwm_ao_b_ao9 { |
| mux { |
| groups = "pwm_ao_b_ao9"; |
| function = "pwm_ao_b"; |
| }; |
| }; |
| |
| remote_pins:remote_pin { |
| mux { |
| groups = "remote_in"; |
| function = "ir_in"; |
| }; |
| |
| }; |
| |
| sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins { |
| mux { |
| groups = "GPIOAO_0", |
| "GPIOAO_1"; |
| function = "gpio_aobus"; |
| }; |
| }; |
| |
| sd_to_ao_uart_pins:sd_to_ao_uart_pins { |
| mux { |
| groups = "uart_tx_ao_a", |
| "uart_rx_ao_a"; |
| function = "uart_ao_a"; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| |
| i2c_AO_pins:i2c_AO { |
| mux { |
| groups = "i2c_sck_ao", |
| "i2c_sda_ao"; |
| function = "i2c_ao"; |
| }; |
| }; |
| |
| ao_uart_pins:ao_uart { |
| mux { |
| groups = "uart_tx_ao_a", |
| "uart_rx_ao_a"; |
| function = "uart_ao_a"; |
| }; |
| }; |
| |
| ao_b_uart_pins:ao_b_uart { |
| mux { |
| groups = "uart_tx_ao_b_ao4", |
| "uart_rx_ao_b_ao5"; |
| function = "uart_ao_b"; |
| }; |
| }; |
| |
| hdmitx_aocec: ao_cec { |
| mux { |
| groups = "ao_cec"; |
| function = "ao_cec"; |
| }; |
| }; |
| |
| hdmitx_aocecb: ao_cecb { |
| mux { |
| groups = "ee_cec"; |
| function = "ee_cec"; |
| }; |
| }; |
| |
| jtag_apao_pins:jtag_apao_pin { |
| mux { |
| groups = "GPIOAO_3", |
| "GPIOAO_4", |
| "GPIOAO_5", |
| "GPIOAO_7"; |
| function = "gpio_aobus"; |
| }; |
| }; |
| |
| irblaster_pins:irblaster_pin { |
| mux { |
| groups = "remote_out_ao2"; |
| function = "ir_out"; |
| }; |
| }; |
| |
| irblaster_pins1:irblaster_pin1 { |
| mux { |
| groups = "remote_out_ao6"; |
| function = "ir_out"; |
| }; |
| }; |
| }; |
| |
| &pinctrl_periphs { |
| |
| pwm_a_z5_pins: pwm_a_z5 { |
| mux { |
| groups = "pwm_a_z"; |
| function = "pwm_a"; |
| }; |
| }; |
| |
| pwm_a_dv2_pins: pwm_a_dv2 { |
| mux { |
| groups = "pwm_a_dv"; |
| function = "pwm_a"; |
| }; |
| }; |
| |
| pwm_b_z6_pins: pwm_b_z6 { |
| mux { |
| groups = "pwm_b_z"; |
| function = "pwm_b"; |
| }; |
| }; |
| |
| pwm_b_dv3_pins: pwm_b_dv3 { |
| mux { |
| groups = "pwm_b_dv"; |
| function = "pwm_b"; |
| }; |
| }; |
| |
| pwm_c_z7_pins: pwm_c_z7 { |
| mux { |
| groups = "pwm_c"; |
| function = "pwm_c"; |
| }; |
| }; |
| |
| pwm_d_z4_pins: pwm_d_z4 { |
| mux { |
| groups = "pwm_d_z4"; |
| function = "pwm_d"; |
| }; |
| }; |
| |
| pwm_d_z19_pins: pwm_d_z19 { |
| mux { |
| groups = "pwm_d_z19"; |
| function = "pwm_d"; |
| }; |
| }; |
| |
| pwm_e_h4_pins: pwm_e_h4 { |
| mux { |
| groups = "pwm_e_h4"; |
| function = "pwm_e"; |
| }; |
| }; |
| |
| pwm_e_h8_pins: pwm_e_h8 { |
| mux { |
| groups = "pwm_e_h8"; |
| function = "pwm_e"; |
| }; |
| }; |
| |
| pwm_f_h9_pins: pwm_f_h9 { |
| mux { |
| groups = "pwm_f_h"; |
| function = "pwm_f"; |
| }; |
| }; |
| |
| pwm_f_clk_pins: pwm_f_clk { |
| mux { |
| groups = "pwm_f_clk"; |
| function = "pwm_f"; |
| }; |
| }; |
| |
| pwm_vs_dv2_pins: pwm_vs_dv2 { |
| mux { |
| groups = "pwm_vs_dv2"; |
| function = "pwm_vs"; |
| }; |
| }; |
| |
| pwm_vs_dv3_pins: pwm_vs_dv3 { |
| mux { |
| groups = "pwm_vs_dv3"; |
| function = "pwm_vs"; |
| }; |
| }; |
| |
| pwm_vs_z4_pins: pwm_vs_z4 { |
| mux { |
| groups = "pwm_vs_z4"; |
| function = "pwm_vs"; |
| }; |
| }; |
| |
| pwm_vs_z6_pins: pwm_vs_z6 { |
| mux { |
| groups = "pwm_vs_z6"; |
| function = "pwm_vs"; |
| }; |
| }; |
| |
| pwm_vs_z7_pins: pwm_vs_z7 { |
| mux { |
| groups = "pwm_vs_z7"; |
| function = "pwm_vs"; |
| }; |
| }; |
| |
| pwm_vs_z19_pins: pwm_vs_z19 { |
| mux { |
| groups = "pwm_vs_z19"; |
| function = "pwm_vs"; |
| }; |
| }; |
| |
| ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins { |
| mux { |
| groups = "sdcard_d2", |
| "sdcard_d3"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| sd_1bit_pins:sd_1bit_pins { |
| mux { |
| groups = "sdcard_d0", |
| "sdcard_cmd", |
| "sdcard_clk"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| ao_to_sd_uart_pins:ao_to_sd_uart_pins { |
| mux { |
| groups = "uart_tx_ao_a_c4", |
| "uart_rx_ao_a_c5"; |
| function = "uart_ao_a_ee"; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| |
| emmc_clk_cmd_pins:emmc_clk_cmd_pins { |
| mux { |
| groups = "emmc_cmd", |
| "emmc_clk"; |
| function = "emmc"; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| |
| emmc_conf_pull_up:emmc_conf_pull_up { |
| mux { |
| groups = "emmc_nand_d07", |
| "emmc_clk", |
| "emmc_cmd"; |
| function = "emmc"; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| emmc_conf_pull_done:emmc_conf_pull_done { |
| mux { |
| groups = "emmc_ds"; |
| function = "emmc"; |
| input-enable; |
| bias-pull-down; |
| }; |
| }; |
| |
| spifc_cs_pin:spifc_cs_pin { |
| mux { |
| groups = "nor_cs"; |
| function = "nor"; |
| bias-pull-up; |
| }; |
| }; |
| |
| spifc_pulldown: spifc_pulldown { |
| mux { |
| groups = "nor_d", |
| "nor_q", |
| "nor_c"; |
| function = "nor"; |
| bias-pull-down; |
| }; |
| }; |
| |
| spifc_pullup: spifc_pullup { |
| mux { |
| groups = "nor_cs"; |
| function = "nor"; |
| bias-pull-up; |
| }; |
| }; |
| |
| spifc_all_pins: spifc_all_pins { |
| mux { |
| groups = "nor_d", |
| "nor_q", |
| "nor_c"; |
| function = "nor"; |
| input-enable; |
| bias-pull-down; |
| }; |
| }; |
| |
| sd_clk_cmd_pins:sd_clk_cmd_pins{ |
| mux { |
| groups = "sdcard_cmd", |
| "sdcard_clk"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| sd_all_pins:sd_all_pins{ |
| mux { |
| groups = "sdcard_d0", |
| "sdcard_d1", |
| "sdcard_d2", |
| "sdcard_d3", |
| "sdcard_cmd", |
| "sdcard_clk"; |
| function = "sdcard"; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| hdmirx_a_mux:hdmirx_a_mux { |
| mux { |
| groups = "hdmirx_hpd_a", "hdmirx_det_a", |
| "hdmirx_sda_a", "hdmirx_sck_a"; |
| function = "hdmirx_a"; |
| }; |
| }; |
| |
| hdmirx_b_mux:hdmirx_b_mux { |
| mux { |
| groups = "hdmirx_hpd_b", "hdmirx_det_b", |
| "hdmirx_sda_b", "hdmirx_sck_b"; |
| function = "hdmirx_b"; |
| }; |
| }; |
| |
| hdmirx_c_mux:hdmirx_c_mux { |
| mux { |
| groups = "hdmirx_hpd_c", "hdmirx_det_c", |
| "hdmirx_sda_c", "hdmirx_sck_c"; |
| function = "hdmirx_c"; |
| }; |
| }; |
| |
| hdmirx_d_mux:hdmirx_d_mux { |
| mux { |
| groups = "hdmirx_hpd_d", "hdmirx_det_d", |
| "hdmirx_sda_d", "hdmirx_sck_d"; |
| function = "hdmirx_d"; |
| }; |
| }; |
| |
| i2c0_z_pins:i2c0_z { |
| mux { |
| groups = "i2c0_sda", |
| "i2c0_sck"; |
| function = "i2c0"; |
| }; |
| }; |
| |
| i2c1_dv_pins:i2c1_z { |
| mux { |
| groups = "i2c1_sda", |
| "i2c1_sck"; |
| function = "i2c1"; |
| }; |
| }; |
| |
| i2c2_h_pins:i2c2_h { |
| mux { |
| groups = "i2c2_sda", |
| "i2c2_sck"; |
| function = "i2c2"; |
| }; |
| }; |
| |
| i2c3_z_pins:i2c3_z { |
| mux { |
| groups = "i2c3_sda", |
| "i2c3_sck"; |
| function = "i2c3"; |
| }; |
| }; |
| |
| a_uart_pins:a_uart { |
| mux { |
| groups = "uart_tx_a", |
| "uart_rx_a", |
| "uart_cts_a", |
| "uart_rts_a"; |
| function = "uart_a"; |
| }; |
| }; |
| |
| b_uart_pins:b_uart { |
| mux { |
| groups = "uart_tx_b", |
| "uart_rx_b"; |
| function = "uart_b"; |
| }; |
| }; |
| |
| c_uart_pins:c_uart { |
| mux { |
| groups = "uart_tx_c", |
| "uart_rx_c"; |
| function = "uart_c"; |
| }; |
| }; |
| |
| lcd_vbyone_pins: lcd_vbyone_pin { |
| mux { |
| groups = "vx1_lockn","vx1_htpdn"; |
| function = "vbyone"; |
| }; |
| }; |
| |
| atvdemod_agc_pins: atvdemod_agc_pins { |
| mux { |
| groups = "atv_if_agc"; |
| function = "atv"; |
| }; |
| }; |
| |
| dtvdemod_agc_pins: dtvdemod_agc_pins { |
| mux { |
| groups = "dtv_if_agc"; |
| function = "dtv"; |
| }; |
| }; |
| |
| spicc_pins: spicc { |
| mux { |
| groups = "spi_miso_a", |
| "spi_mosi_a", |
| "spi_clk_a"; |
| function = "spi_a"; |
| }; |
| }; |
| |
| jtag_apee_pins:jtag_apee_pin { |
| mux { |
| groups = "CARD_0", |
| "CARD_1", |
| "CARD_2", |
| "CARD_3"; |
| function = "gpio_periphs"; |
| }; |
| }; |
| }; |