| /* |
| * arch/arm64/boot/dts/amlogic/puddy-common.dtsi |
| * |
| * Copyright (C) 2019 Amlogic, Inc. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, but WITHOUT |
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| * more details. |
| * |
| */ |
| |
| / { |
| model = "Amlogic"; |
| compatible = "amlogic, g12b"; |
| interrupt-parent = <&gic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| aliases { |
| serial0 = &uart_AO; |
| serial1 = &uart_A; |
| serial2 = &uart_B; |
| serial3 = &uart_C; |
| serial4 = &uart_AO_B; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| i2c4 = &i2c_AO; |
| tsensor0 = &p_tsensor; |
| tsensor1 = &d_tsensor; |
| }; |
| |
| memory@00000000 { |
| device_type = "memory"; |
| linux,usable-memory = <0x0 0x100000 0x0 0x7ff00000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| /* global autoconfigured region for contiguous allocations */ |
| ramoops@0x20000000 { |
| compatible = "ramoops"; |
| reg = <0x0 0x20000000 0x0 0x00100000>; |
| record-size = <0x8000>; |
| console-size = <0x8000>; |
| ftrace-size = <0x0>; |
| pmsg-size = <0x8000>; |
| }; |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x2400000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x05000000 0x0 0x2400000>; |
| clear-map; |
| }; |
| |
| secos_reserved:linux,secos { |
| status = "disable"; |
| compatible = "amlogic, aml_secos_memory"; |
| reg = <0x0 0x05300000 0x0 0x2000000>; |
| no-map; |
| }; |
| logo_reserved:linux,meson-fb { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x800000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x76800000 0x0 0x800000>; |
| }; |
| ion_cma_reserved:linux,ion-dev { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x8000000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| //di_reserved:linux,di { |
| //compatible = "amlogic, di-mem"; |
| /* buffer_size = 3621952(yuv422 8bit) */ |
| /* 4179008(yuv422 10bit full pack mode) */ |
| /** 10x3621952=34.6M(0x23) support 8bit **/ |
| /** 10x4736064=45.2M(0x2e) support 12bit **/ |
| /** 10x4179008=40M(0x28) support 10bit **/ |
| //size = <0x0 0x2800000>; |
| //no-map; |
| //}; |
| /*di CMA pool */ |
| //di_cma_reserved:linux,di_cma { |
| // compatible = "shared-dma-pool"; |
| // reusable; |
| /* buffer_size = 3621952(yuv422 8bit) |
| * | 4736064(yuv422 10bit) |
| * | 4074560(yuv422 10bit full pack mode) |
| * 10x3621952=34.6M(0x23) support 8bit |
| * 10x4736064=45.2M(0x2e) support 12bit |
| * 10x4074560=40M(0x28) support 10bit |
| */ |
| // size = <0x0 0x02800000>; |
| // alignment = <0x0 0x400000>; |
| //}; |
| /* POST PROCESS MANAGER */ |
| ppmgr_reserved:linux,ppmgr { |
| compatible = "shared-dma-pool"; |
| size = <0x0 0x0>; |
| }; |
| |
| codec_mm_cma:linux,codec_mm_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x10800000>; |
| alignment = <0x0 0x400000>; |
| linux,contiguous-region; |
| clear-map; |
| }; |
| /* codec shared reserved */ |
| codec_mm_reserved:linux,codec_mm_reserved { |
| compatible = "amlogic, codec-mm-reserved"; |
| size = <0x0 0x0>; |
| alignment = <0x0 0x100000>; |
| //no-map; |
| }; |
| /* YUV decoder V4L2 CMA */ |
| codec_yuvdecoder_cma:linux,yuvdecoder_cma { |
| compatible = "shared-dma-pool"; |
| size = <0x0 0xc00000>; |
| linux,contiguous-region; |
| }; |
| /* vdin0 CMA pool */ |
| //vdin0_cma_reserved:linux,vdin0_cma { |
| // compatible = "shared-dma-pool"; |
| // reusable; |
| /* 1920x1080x2x4 =16+4 M */ |
| // size = <0x0 0x04000000>; |
| // alignment = <0x0 0x400000>; |
| //}; |
| /* vdin1 CMA pool */ |
| //vdin1_cma_reserved:linux,vdin1_cma { |
| // compatible = "shared-dma-pool"; |
| // reusable; |
| /* 1920x1080x2x4 =16 M */ |
| // size = <0x0 0x04000000>; |
| // alignment = <0x0 0x400000>; |
| //}; |
| isp_cma_reserved:linux,isp_cma{ |
| compatible = "shared-dma-pool"; |
| reusable; |
| status = "okay"; |
| size = <0x0 0x8C00000>; |
| alignment = <0x0 0x40000>; |
| //no-map; |
| }; |
| adapt_cma_reserved:linux,adapt_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| status = "okay"; |
| size = <0x0 0x01000000>; |
| alignment = <0x0 0x400000>; |
| }; |
| gdc_cma_reserved:linux,gdc_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| status = "okay"; |
| size = <0x0 0x04000000>; |
| alignment = <0x0 0x400000>; |
| }; |
| }; |
| |
| galcore { |
| compatible = "amlogic, galcore"; |
| dev_name = "galcore"; |
| status = "okay"; |
| interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "galcore"; |
| reg = <0x0 0xff100000 0x0 0x800>; |
| }; |
| |
| gpio_key { |
| compatible = "amlogic, gpio_keypad"; |
| status = "okay"; |
| scan_period = <20>; |
| key_num = <2>; |
| key_name = "vol_up", "vol_down"; |
| key_code = <115 114>; |
| key-gpios = <&gpio GPIOC_5 GPIO_ACTIVE_HIGH |
| &gpio GPIOC_7 GPIO_ACTIVE_HIGH>; |
| detect_mode = <0>;/*0:polling mode, 1:irq mode*/ |
| }; |
| |
| cvbsout { |
| compatible = "amlogic, cvbsout-g12a"; |
| dev_name = "cvbsout"; |
| status = "disabled"; |
| clocks = <&clkc CLKID_VCLK2_ENCI |
| &clkc CLKID_VCLK2_VENCI0 |
| &clkc CLKID_VCLK2_VENCI1 |
| &clkc CLKID_DAC_CLK>; |
| clock-names = "venci_top_gate", |
| "venci_0_gate", |
| "venci_1_gate", |
| "vdac_clk_gate"; |
| |
| /* performance: reg_address, reg_value */ |
| /* s905x */ |
| performance = <0x1bf0 0x9 |
| 0x1b56 0x343 |
| 0x1b12 0x8080 |
| 0x1b05 0xfd |
| 0x1c59 0xf752 |
| 0xffff 0x0>; /* ending flag */ |
| }; |
| |
| bt-dev{ |
| compatible = "amlogic, bt-dev"; |
| dev_name = "bt-dev"; |
| status = "okay"; |
| gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; |
| gpio_hostwake = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| wifi{ |
| compatible = "amlogic, aml_wifi"; |
| dev_name = "aml_wifi"; |
| status = "okay"; |
| interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; |
| irq_trigger_type = "GPIO_IRQ_LOW"; |
| power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>; |
| dhd_static_buf; //if use bcm wifi, config dhd_static_buf |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_e_pins>; |
| pwm_config = <&wifi_pwm_conf>; |
| }; |
| |
| wifi_pwm_conf:wifi_pwm_conf{ |
| pwm_channel1_conf { |
| pwms = <&pwm_ef MESON_PWM_0 30040 0>; |
| duty-cycle = <15020>; |
| times = <10>; |
| }; |
| pwm_channel2_conf { |
| pwms = <&pwm_ef MESON_PWM_2 30030 0>; |
| duty-cycle = <15015>; |
| times = <12>; |
| }; |
| }; |
| |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| memory-region = <&codec_mm_cma &codec_mm_reserved>; |
| dev_name = "codec_mm"; |
| status = "okay"; |
| }; |
| |
| amvenc_avc { |
| compatible = "amlogic, amvenc_avc"; |
| dev_name = "amvenc_avc"; |
| status = "okay"; |
| interrupts = <0 45 1>; |
| interrupt-names = "mailbox_2"; |
| }; |
| |
| ppmgr { |
| compatible = "amlogic, ppmgr"; |
| memory-region = <&ppmgr_reserved>; |
| dev_name = "ppmgr"; |
| status = "okay"; |
| }; |
| |
| //deinterlace { |
| // compatible = "amlogic, deinterlace"; |
| // status = "disabled"; |
| /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
| // flag_cma = <1>; |
| //memory-region = <&di_reserved>; |
| // memory-region = <&di_cma_reserved>; |
| // interrupts = <0 46 1 |
| // 0 40 1>; |
| // interrupt-names = "pre_irq", "post_irq"; |
| // clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, |
| // <&clkc CLKID_VPU_CLKB_COMP>; |
| // clock-names = "vpu_clkb_tmp_composite", |
| // "vpu_clkb_composite"; |
| // clock-range = <334 667>; |
| /* buffer-size = <3621952>;(yuv422 8bit) */ |
| // buffer-size = <4074560>;/*yuv422 fullpack*/ |
| /* reserve-iomap = "true"; */ |
| /* if enable nr10bit, set nr10bit-support to 1 */ |
| // post-wr-support = <1>; |
| // nr10bit-support = <1>; |
| // nrds-enable = <1>; |
| // pps-enable = <1>; |
| //}; |
| |
| ionvideo { |
| compatible = "amlogic, ionvideo"; |
| dev_name = "ionvideo"; |
| status = "okay"; |
| }; |
| |
| rng { |
| compatible = "amlogic,meson-rng"; |
| status = "okay"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| reg = <0x0 0xff630218 0x0 0x4>; |
| }; |
| |
| amlvecm { |
| compatible = "amlogic, vecm"; |
| dev_name = "aml_vecm"; |
| status = "okay"; |
| gamma_en = <0>;/*1:enabel ;0:disable*/ |
| wb_en = <0>;/*1:enabel ;0:disable*/ |
| cm_en = <0>;/*1:enabel ;0:disable*/ |
| vlock_en = <0>; |
| vlock_mode = <0x4>; |
| vlock_pll_m_limit = <1>; |
| vlock_line_limit = <3>; |
| }; |
| |
| amvdec_yuv { |
| compatible = "amlogic, amvdec_yuv"; |
| memory-region = <&codec_yuvdecoder_cma>; |
| status = "okay"; |
| }; |
| |
| amdolby_vision { |
| compatible = "amlogic, dolby_vision_g12a"; |
| dev_name = "aml_amdolby_vision_driver"; |
| status = "disabled"; |
| tv_mode = <0>;/*1:enabel ;0:disable*/ |
| }; |
| |
| /* Audio Related start */ |
| pdm_codec:dummy{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, pdm_dummy_codec"; |
| status = "okay"; |
| }; |
| dummy_codec:dummy{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_dummy_codec"; |
| status = "okay"; |
| }; |
| amlogic_codec:t9015{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_codec_T9015"; |
| reg = <0x0 0xFF632000 0x0 0x2000>; |
| is_auge_used = <1>; /* meson or auge chipset used */ |
| tdmout_index = <1>; |
| status = "okay"; |
| }; |
| audio_effect:eqdrc{ |
| /*eq_enable = <1>;*/ |
| /*drc_enable = <1>;*/ |
| /* |
| * 0:tdmout_a |
| * 1:tdmout_b |
| * 2:tdmout_c |
| * 3:spdifout |
| * 4:spdifout_b |
| */ |
| eqdrc_module = <1>; |
| /* max 0xf, each bit for one lane, usually one lane */ |
| lane_mask = <0x1>; |
| /* max 0xff, each bit for one channel */ |
| channel_mask = <0x3>; |
| }; |
| auge_sound { |
| compatible = "amlogic, g12a-sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| |
| //aml-audio-card,loopback = <&aml_loopback>; |
| //aml-audio-card,aux-devs = <&amlogic_codec>; |
| /*avout mute gpio*/ |
| //avout_mute-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; |
| /*for audio effect ,eqdrc */ |
| aml-audio-card,effect = <&audio_effect>; |
| |
| aml-audio-card,dai-link@0 { |
| format = "dsp_a"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| //bitclock-master = <&tdmacodec>; |
| //frame-master = <&tdmacodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pcm"; |
| tdmacpu: cpu { |
| sound-dai = <&aml_tdma>; |
| dai-tdm-slot-tx-mask = <1>; |
| dai-tdm-slot-rx-mask = <1>; |
| dai-tdm-slot-num = <1>; |
| dai-tdm-slot-width = <16>; |
| system-clock-frequency = <24576000>; |
| }; |
| tdmacodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@2 { |
| format = "i2s"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| bitclock-master = <&aml_tdmc>; |
| frame-master = <&aml_tdmc>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&aml_tdmc>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmccodec: codec { |
| prefix-names = "max98373"; |
| sound-dai = <&max98373>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@3 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pdm"; |
| cpu { |
| sound-dai = <&aml_pdm>; |
| }; |
| codec { |
| sound-dai = <&pdm_codec>; |
| }; |
| }; |
| |
| //aml-audio-card,dai-link@4 { |
| // mclk-fs = <128>; |
| // /* suffix-name, sync with android audio hal |
| // * what's the dai link used for |
| // */ |
| // suffix-name = "alsaPORT-spdif"; |
| // cpu { |
| // sound-dai = <&aml_spdif>; |
| // system-clock-frequency = <6144000>; |
| // }; |
| // codec { |
| // sound-dai = <&dummy_codec>; |
| // }; |
| //}; |
| //aml-audio-card,dai-link@5 { |
| // mclk-fs = <128>; |
| // /* suffix-name, sync with android audio hal |
| // * what's the dai link used for |
| // */ |
| // suffix-name = "alsaPORT-hdmi"; |
| // cpu { |
| // sound-dai = <&aml_spdif_b>; |
| // system-clock-frequency = <6144000>; |
| // }; |
| // codec { |
| // sound-dai = <&dummy_codec>; |
| // }; |
| //}; |
| /* |
| * dai link for i2s to hdmix, |
| * Notice to select a tdm lane not used by hw |
| */ |
| //aml-audio-card,dai-link@6 { |
| // format = "i2s"; |
| // mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| // bitclock-master = <&aml_i2s2hdmi>; |
| // frame-master = <&aml_i2s2hdmi>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| // suffix-name = "alsaPORT-i2s2hdmi"; |
| // cpu { |
| // sound-dai = <&aml_i2s2hdmi>; |
| // dai-tdm-slot-tx-mask = <1 1>; |
| // dai-tdm-slot-num = <2>; |
| // dai-tdm-slot-width = <32>; |
| // system-clock-frequency = <12288000>; |
| // }; |
| // codec { |
| // sound-dai = <&dummy_codec>; |
| // }; |
| //}; |
| }; |
| audiolocker: locker { |
| compatible = "amlogic, audiolocker"; |
| clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT |
| &clkaudio CLKID_AUDIO_LOCKER_IN |
| &clkaudio CLKID_AUDIO_MCLK_D |
| &clkaudio CLKID_AUDIO_MCLK_E |
| &clkc CLKID_MPLL1 |
| &clkc CLKID_MPLL2>; |
| clock-names = "lock_out", "lock_in", "out_src", |
| "in_src", "out_calc", "in_ref"; |
| interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq"; |
| frequency = <49000000>; /* pll */ |
| dividor = <49>; /* locker's parent */ |
| status = "disabled"; |
| }; |
| /* Audio Related end */ |
| |
| cpufreq-meson { |
| compatible = "amlogic, cpufreq-meson"; |
| status = "okay"; |
| }; |
| |
| /* |
| * last opp-hz |
| * 0xffffffff:adjust cpufreq according to efuse info |
| * others:do not adjust |
| */ |
| cpu_opp_table0: cpu_opp_table0 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <731000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1398000000>; |
| opp-microvolt = <761000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1512000000>; |
| opp-microvolt = <791000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <831000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <861000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <1896000000>; |
| opp-microvolt = <1011000>; |
| }; |
| }; |
| |
| cpu_opp_table1: cpu_opp_table1 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <751000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <751000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <751000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <751000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <771000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <771000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1398000000>; |
| opp-microvolt = <791000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1512000000>; |
| opp-microvolt = <821000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <861000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <891000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <0xffffffff>; |
| opp-microvolt = <1011000>; |
| }; |
| }; |
| |
| sensor: sensor { |
| compatible = "soc, sensor"; |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&clk12_24_ao_pins>; |
| clocks = <&clkc CLKID_24M>; |
| clock-names = "g12a_24m"; |
| reset = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; |
| vana-enable = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>; |
| vdig-enable = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| amber_led { |
| compatible = "pwm-leds"; |
| status = "okay"; |
| amber_led { |
| label = "amber_led_pwm"; |
| pwms = <&pwm_AO_ab MESON_PWM_0 500000 0>; |
| max-brightness = <4095>; |
| }; |
| }; |
| |
| green_led { |
| compatible = "pwm-leds"; |
| status = "okay"; |
| green_led { |
| label = "green_led_pwm"; |
| pwms = <&pwm_ef MESON_PWM_1 500000 0>; |
| max-brightness = <4095>; |
| }; |
| }; |
| |
| thermistor-ch1 { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <47000>; |
| pulldown-ohm = <0>; |
| io-channels = <&saradc SARADC_CH1>; |
| }; |
| |
| thermistor-ch2 { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <47000>; |
| pulldown-ohm = <0>; |
| io-channels = <&saradc SARADC_CH2>; |
| }; |
| |
| thermistor-ch3 { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <47000>; |
| pulldown-ohm = <0>; |
| io-channels = <&saradc SARADC_CH3>; |
| }; |
| }; /* end of / */ |
| |
| &pwm_AO_ab { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_ao_a_pins>; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c0_master_pins2>; |
| clock-frequency = <400000>; |
| ftxx@38 { |
| compatible = "focaltech,fts"; |
| status = "okay"; |
| reg = <0x38>; |
| focaltech,irq-gpio = <&gpio GPIOZ_15 0x00>; |
| focaltech,reset-gpio = <&gpio GPIOZ_9 0x00>; |
| focaltech,display-coords = <0 0 799 1279>; |
| focaltech,max-touch-number = <5>; |
| }; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&i2c3_master_pins2>; |
| clock-frequency = <100000>; /* default 100k */ |
| |
| sensor-i2c@36 { |
| compatible = "arm, i2c-sensor"; |
| reg = <0x36>; |
| reg-names = "i2c-sensor"; |
| slave-addr = <0x6c>; |
| reg-type = <2>; |
| reg-data-type = <1>; |
| link-device = <&phycsi>; |
| }; |
| |
| |
| bl: backlight@2c { |
| compatible = "ti,lp8556"; |
| reg = <0x2c>; |
| bl-name = "lcd-bl"; |
| // only read eeprom on initial power-up, brightness register |
| // control only, backlight enabled |
| dev-ctrl = /bits/ 8 <0x85>; |
| // Enable undervoltage protection at 2.5 V, "disable" |
| // backlight (i2c only), disable set resistors |
| rom_a2h { |
| rom-addr = /bits/ 8 <0xa2>; |
| rom-val = /bits/ 8 <0x20>; |
| }; |
| // 6-phase, 6 drivers |
| // 9.6kHz PWM rate |
| rom_a5h { |
| rom-addr = /bits/ 8 <0xa5>; |
| rom-val = /bits/ 8 <0x04>; |
| }; |
| // EN_DRV3, EN_DRV2, boost inductor current limit = 1.6 A |
| rom_a7h { |
| rom-addr = /bits/ 8 <0xa7>; |
| rom-val = /bits/ 8 <0xf4>; |
| }; |
| // VBOOST_MAX = 25 V, JUMP_EN = 0 |
| rom_a9h { |
| rom-addr = /bits/ 8 <0xa9>; |
| rom-val = /bits/ 8 <0x60>; |
| }; |
| // STEP_UP = 105 mV, STEP_DN = 105 mV, LED_FAULT_TH = 3 V, |
| // LED_COMP_HYST = DRIVER_HEADROOM + 750 mV |
| rom_aeh { |
| rom-addr = /bits/ 8 <0xae>; |
| rom-val = /bits/ 8 <0x09>; |
| }; |
| }; |
| |
| temp_mlb: tmp112@49 { |
| compatible = "national,lm75"; |
| reg = <0x49>; |
| }; |
| |
| temp_humidity: shtc1@70 { |
| compatible = "sensirion,shtc1"; |
| status = "okay"; |
| reg = <0x70>; |
| }; |
| |
| max98373: max98373@31 { |
| compatible = "maxim,max98373"; |
| #sound-dai-cells = <0>; |
| status = "okay"; |
| reg = <0x31>; |
| maxim,reset-gpio = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>; |
| // maxim,imon-slot-no = <1>; |
| // maxim,vmon-slot-no = <0>; |
| maxim,interleave-mode = <0>; |
| }; |
| }; |
| |
| &i2c_AO { |
| status = "okay"; |
| pinctrl-names="default"; |
| pinctrl-0=<&ao_i2c_master_pins1>; |
| |
| //Accelerometer |
| accel: bma456@18 { |
| compatible = "bma4xy_acc"; |
| reg = <0x18>; |
| status = "okay"; |
| interrupt_gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| rgbc: tcs3472@39 { |
| compatible = "tcs3472"; |
| reg = <0x39>; |
| status = "okay"; |
| //interrupt_gpio = <&gpio GPIOZ_14 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| temp_lmic: tmp112@48 { |
| compatible = "national,lm75"; |
| reg = <0x48>; |
| }; |
| temp_wifi: tmp112@49 { |
| compatible = "national,lm75"; |
| reg = <0x49>; |
| }; |
| temp_audio: tmp112@4A { |
| compatible = "national,lm75"; |
| reg = <0x4A>; |
| }; |
| temp_soc: tmp112@4B { |
| compatible = "national,lm75"; |
| reg = <0x4B>; |
| }; |
| }; |
| |
| &isp { |
| status = "okay"; |
| memory-region = <&isp_cma_reserved>; |
| }; |
| |
| &adapter { |
| status = "okay"; |
| memory-region = <&adapt_cma_reserved>; |
| }; |
| |
| &secmon { |
| reserve_mem_size = <0x02300000>; |
| }; |
| |
| &gdc { |
| status = "okay"; |
| memory-region = <&gdc_cma_reserved>; |
| }; |
| |
| &phycsi { |
| status = "okay"; |
| aphy-ctrl3-cfg = <0xc002>; /*A: 0x02, B: 0xc002*/ |
| dphy0-ctrl0-cfg = <0x123ff>; /*A: 0x123, B: 0x123ff*/ |
| dphy0-ctrl1-cfg = <0x1ff01>; /*A: 0x123, B: 0x1ff01*/ |
| }; |
| |
| &meson_fb { |
| status = "disabled"; |
| display_size_default = <1920 1080 1920 2160 32>; |
| mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>; |
| logo_addr = "0x7f800000"; |
| mem_alloc = <1>; |
| pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
| }; |
| |
| &pwm_ab { |
| status = "okay"; |
| }; |
| |
| &pwm_ef { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_f_pins2>; |
| }; |
| |
| &pwm_AO_cd { |
| status = "okay"; |
| }; |
| |
| &audiobus { |
| aml_tdma: tdma { |
| compatible = "amlogic, g12a-snd-tdma"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <0 1>; |
| dai-tdm-lane-oe-slot-mask-out = <1 0>; |
| dai-tdm-clk-sel = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
| &clkc CLKID_MPLL0>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmout_a &tdmin_a>; |
| }; |
| |
| aml_tdmc: tdmc { |
| compatible = "amlogic, g12a-snd-tdmc"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <0 1 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
| dai-tdm-clk-sel = <2>; |
| dai-tdm-mclk-sel = <0 2>; /* mclk select */ |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
| &clkc CLKID_MPLL2>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmb_mclk &tdmout_c &tdmin_c>; |
| }; |
| |
| /* copy a useless tdm to output for hdmi, no pinmux */ |
| //aml_i2s2hdmi: i2s2hdmi { |
| // compatible = "amlogic, g12a-snd-tdmc"; |
| // #sound-dai-cells = <0>; |
| // dai-tdm-lane-slot-mask-out = <1 1 1 1>; |
| // dai-tdm-clk-sel = <2>; |
| // clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
| // &clkc CLKID_MPLL2>; |
| // clock-names = "mclk", "clk_srcpll"; |
| |
| // i2s2hdmi = <1>; |
| |
| // status = "okay"; |
| //}; |
| //aml_spdif: spdif { |
| // compatible = "amlogic, g12a-snd-spdif-a"; |
| // #sound-dai-cells = <0>; |
| // clocks = <&clkc CLKID_MPLL0 |
| // &clkc CLKID_FCLK_DIV4 |
| // &clkaudio CLKID_AUDIO_SPDIFIN |
| // &clkaudio CLKID_AUDIO_SPDIFOUT |
| // &clkaudio CLKID_AUDIO_SPDIFIN_CTRL |
| // &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>; |
| // clock-names = "sysclk", "fixed_clk", "gate_spdifin", |
| // "gate_spdifout", "clk_spdifin", "clk_spdifout"; |
| // interrupts = |
| // <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; |
| |
| // interrupt-names = "irq_spdifin"; |
| // pinctrl-names = "spdif_pins"; |
| // pinctrl-0 = <&spdifout &spdifin>; |
| // status = "disabled"; |
| //}; |
| //aml_spdif_b: spdif_b { |
| // compatible = "amlogic, g12a-snd-spdif-b"; |
| // #sound-dai-cells = <0>; |
| // clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ |
| // &clkaudio CLKID_AUDIO_SPDIFOUTB |
| // &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>; |
| // clock-names = "sysclk", |
| // "gate_spdifout", "clk_spdifout"; |
| // //pinctrl-names = "spdif_pins"; |
| // //pinctrl-0 = <&spdifout>; |
| // status = "disabled"; |
| //}; |
| aml_pdm: pdm { |
| compatible = "amlogic, g12a-snd-pdm"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_PDM |
| &clkc CLKID_FCLK_DIV3 |
| &clkc CLKID_MPLL1 |
| &clkaudio CLKID_AUDIO_PDMIN0 |
| &clkaudio CLKID_AUDIO_PDMIN1>; |
| clock-names = "gate", |
| "sysclk_srcpll", |
| "dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk"; |
| pinctrl-names = "pdm_pins"; |
| pinctrl-0 = <&pdmin>; |
| filter_mode = <1>; /* mode 0~4, defalut:1 */ |
| status = "okay"; |
| }; |
| aml_loopback: loopback { |
| compatible = "amlogic, snd-loopback"; |
| /* |
| * 0: out rate = in data rate; |
| * 1: out rate = loopback data rate; |
| */ |
| lb_mode = <0>; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <8>; |
| datain_chmask = <0x3f>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_tdminA |
| * 4: PAD_tdminB |
| * 5: PAD_tdminC |
| */ |
| datalb_src = <2>; |
| datalb_chnum = <8>; |
| datalb_chmask = <0x3>; |
| |
| status = "disabled"; |
| }; |
| |
| audioresample: resample { |
| compatible = "amlogic, g12a-resample"; |
| clocks = <&clkc CLKID_MPLL3 |
| &clkaudio CLKID_AUDIO_MCLK_F |
| &clkaudio CLKID_AUDIO_RESAMPLE_CTRL>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| /*same with toddr_src |
| * TDMIN_A, 0 |
| * TDMIN_B, 1 |
| * TDMIN_C, 2 |
| * SPDIFIN, 3 |
| * PDMIN, 4 |
| * NONE, |
| * TDMIN_LB, 6 |
| * LOOPBACK, 7 |
| */ |
| resample_module = <4>; |
| status = "disabled"; |
| }; |
| aml_pwrdet: pwrdet { |
| compatible = "amlogic, g12a-power-detect"; |
| |
| interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "pwrdet_irq"; |
| |
| /* pwrdet source sel |
| * 7: loopback; |
| * 6: tdmin_lb; |
| * 5: reserved; |
| * 4: pdmin; |
| * 3: spdifin; |
| * 2: tdmin_c; |
| * 1: tdmin_b; |
| * 0: tdmin_a; |
| */ |
| pwrdet_src = <4>; |
| |
| hi_th = <0x70000>; |
| lo_th = <0x16000>; |
| |
| status = "disabled"; |
| }; |
| }; /* end of audiobus */ |
| |
| &pinctrl_aobus { |
| clk12_24_ao_pins:clk12_24_ao_pins { |
| mux { |
| groups = "clk12_24_ao"; |
| function = "clk12_24_ao"; |
| drive-strength = <3>; |
| }; |
| }; |
| }; |
| |
| &pinctrl_periphs { |
| tdmout_a: tdmout_a { |
| mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */ |
| groups = "tdma_sclk", |
| "tdma_fs", |
| "tdma_dout0"; |
| function = "tdma_out"; |
| }; |
| }; |
| |
| tdmin_a: tdmin_a { |
| mux { /* GPIOX_8 */ |
| groups = "tdma_din1"; |
| function = "tdma_in"; |
| }; |
| }; |
| |
| tdmout_c:tdmout_c { |
| mux { /* GPIOZ_2, GPIOZ_6, GPIOZ_7*/ |
| groups = "tdmc_sclk_z", |
| "tdmc_fs_z", |
| "tdmc_dout0_z"; |
| function = "tdmc_out"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmin_c:tdmin_c { |
| mux { /* GPIOZ_3*/ |
| groups = "tdmc_din1_z"; |
| function = "tdmc_in"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| //spdifin: spdifin { |
| // mux {/* GPIOH_5 */ |
| // groups = "spdif_in_h"; |
| // function = "spdif_in"; |
| // }; |
| //}; |
| |
| /* GPIOH_4 */ |
| /* |
| * spdifout: spdifout { |
| * mux { |
| * groups = "spdif_out_h"; |
| * function = "spdif_out"; |
| * }; |
| *}; |
| */ |
| |
| pdmin: pdmin { |
| mux { /* gpioa_6, gpioa_7, gpioa_8, gpioa_9*/ |
| groups = "pdm_din1_a", //gpioa_9 |
| "pdm_din0_a", //gpioa_8 |
| // "pdm_din2_a", //gpioa_6 |
| /*"pdm_din3_a",*/ //gpioa_5 |
| "pdm_dclk_a"; //gpioa_7 |
| function = "pdm"; |
| }; |
| }; |
| |
| }; /* end of pinctrl_periphs */ |
| |
| &pinctrl_aobus { |
| tdmb_mclk: tdmb_mclk { |
| mux { |
| groups = "mclk0_ao"; |
| function = "mclk0_ao"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| // tdmout_b: tdmout_b { |
| // mux { /* GPIOAO_6, GPIOAO_7, GPIOAO_8*/ |
| // groups = "tdmb_sclk_ao", |
| // "tdmb_fs_ao", |
| // "tdmb_dout2_ao"; |
| // function = "tdmb_out_ao"; |
| // drive-strength = <2>; |
| // }; |
| // }; |
| |
| spdifout: spdifout { |
| mux { /* gpiao_10 */ |
| groups = "spdif_out_ao"; |
| function = "spdif_out_ao"; |
| }; |
| }; |
| }; /* end of pinctrl_aobus */ |
| /* Audio Related End */ |
| |
| &spicc0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc0_pins_c>; |
| cs-gpios = <&gpio GPIOC_2 0>; |
| num_chipselect = <1>; |
| spidev@0x0 { |
| compatible = "nordic,nrf52840"; |
| status = "okay"; |
| reg = <0>; |
| spi-max-frequency = <100000>; |
| }; |
| }; |
| |
| &aobus{ |
| |
| }; |
| |
| &irblaster { |
| status = "disabled"; |
| }; |
| |
| &audio_data { |
| status = "okay"; |
| }; |
| |
| /*if you want to use vdin just modify status to "ok"*/ |
| //&vdin0 { |
| // memory-region = <&vdin0_cma_reserved>; |
| // status = "disabled"; |
| /*vdin write mem color depth support: |
| *bit0:support 8bit |
| *bit1:support 9bit |
| *bit2:support 10bit |
| *bit3:support 12bit |
| *bit4:support yuv422 10bit full pack mode (from txl new add) |
| */ |
| // tv_bit_mode = <0x15>; |
| //}; |
| //&vdin1 { |
| // memory-region = <&vdin1_cma_reserved>; |
| // status = "disabled"; |
| /*vdin write mem color depth support: |
| // *bit0:support 8bit |
| // *bit1:support 9bit |
| // *bit2:support 10bit |
| // *bit3:support 12bit |
| // */ |
| // tv_bit_mode = <1>; |
| //}; |
| |
| &sd_emmc_c { |
| status = "okay"; |
| emmc { |
| caps = "MMC_CAP_8_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED", |
| "MMC_CAP_NONREMOVABLE", |
| /* "MMC_CAP_1_8V_DDR", */ |
| "MMC_CAP_HW_RESET", |
| "MMC_CAP_ERASE", |
| "MMC_CAP_CMD23"; |
| caps2 = "MMC_CAP2_HS200"; |
| /* "MMC_CAP2_HS400";*/ |
| f_min = <400000>; |
| f_max = <166666666>; |
| }; |
| }; |
| |
| &sd_emmc_b { |
| status = "disabled"; |
| sd { |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED"; |
| f_min = <400000>; |
| f_max = <50000000>; |
| }; |
| }; |
| |
| &sd_emmc_a { |
| status = "okay"; |
| sdio { |
| caps = "MMC_CAP_4_BIT_DATA", |
| "MMC_CAP_MMC_HIGHSPEED", |
| "MMC_CAP_SD_HIGHSPEED", |
| "MMC_CAP_NONREMOVABLE", |
| "MMC_CAP_UHS_SDR12", |
| "MMC_CAP_UHS_SDR25", |
| "MMC_CAP_UHS_SDR50", |
| "MMC_CAP_UHS_SDR104", |
| "MMC_PM_KEEP_POWER", |
| "MMC_CAP_SDIO_IRQ"; |
| f_min = <400000>; |
| f_max = <200000000>; |
| }; |
| }; |
| |
| &dwc3 { |
| status = "okay"; |
| }; |
| |
| &usb2_phy_v2 { |
| status = "okay"; |
| portnum = <2>; |
| }; |
| |
| &usb3_phy_v2 { |
| status = "okay"; |
| portnum = <0>; |
| otg = <1>; |
| //gpio-vbus-power = "GPIOH_6"; |
| gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &dwc2_a { |
| status = "okay"; |
| /* 1: host only, 2: device only, 3: OTG */ |
| controller-type = <3>; |
| }; |
| ðmac { |
| status = "disabled"; |
| pinctrl-names = "internal_eth_pins"; |
| pinctrl-0 = <&internal_eth_pins>; |
| mc_val = <0x4be04>; |
| |
| internal_phy=<1>; |
| }; |
| |
| &uart_A { |
| status = "okay"; |
| }; |
| |
| &pcie_A { |
| reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| }; |
| |
| &gpu { |
| tbl = <&dvfs285_cfg |
| &dvfs500_cfg |
| &dvfs666_cfg |
| &dvfs800_cfg |
| &dvfs800_cfg>; |
| }; |
| &amhdmitx { |
| status= "disabled"; |
| }; |
| |
| &aocec { |
| status = "disabled"; |
| }; |
| |
| &drm_vpu { |
| status = "okay"; |
| logo_addr = "0x7f800000"; |
| }; |
| |
| &drm_lcd { |
| status = "okay"; |
| }; |
