include/uapi/drm/drm_fourcc.h - manifest_repos/kernel - Git at Google

 /*
  * Copyright 2011 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
  * to deal in the Software without restriction, including without limitation
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
  *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
  * Software.
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
  */

 #ifndef DRM_FOURCC_H
 #define DRM_FOURCC_H

 #include "drm.h"

 #if defined(__cplusplus)
 extern "C" {
 #endif

 #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
 				 ((__u32)(c) << 16) | ((__u32)(d) << 24))

 #define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */

 /* color index */
 #define DRM_FORMAT_C8		fourcc_code('C', '8', ' ', ' ') /* [7:0] C */

 /* 8 bpp Red */
 #define DRM_FORMAT_R8		fourcc_code('R', '8', ' ', ' ') /* [7:0] R */

 /* 16 bpp RG */
 #define DRM_FORMAT_RG88		fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
 #define DRM_FORMAT_GR88		fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */

 /* 8 bpp RGB */
 #define DRM_FORMAT_RGB332	fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
 #define DRM_FORMAT_BGR233	fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */

 /* 16 bpp RGB */
 #define DRM_FORMAT_XRGB4444	fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian */
 #define DRM_FORMAT_XBGR4444	fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian */
 #define DRM_FORMAT_RGBX4444	fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian */
 #define DRM_FORMAT_BGRX4444	fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian */

 #define DRM_FORMAT_ARGB4444	fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian */
 #define DRM_FORMAT_ABGR4444	fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian */
 #define DRM_FORMAT_RGBA4444	fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian */
 #define DRM_FORMAT_BGRA4444	fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian */

 #define DRM_FORMAT_XRGB1555	fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian */
 #define DRM_FORMAT_XBGR1555	fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian */
 #define DRM_FORMAT_RGBX5551	fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian */
 #define DRM_FORMAT_BGRX5551	fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian */

 #define DRM_FORMAT_ARGB1555	fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian */
 #define DRM_FORMAT_ABGR1555	fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian */
 #define DRM_FORMAT_RGBA5551	fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian */
 #define DRM_FORMAT_BGRA5551	fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian */

 #define DRM_FORMAT_RGB565	fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
 #define DRM_FORMAT_BGR565	fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */

 /* 24 bpp RGB */
 #define DRM_FORMAT_RGB888	fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
 #define DRM_FORMAT_BGR888	fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */

 /* 32 bpp RGB */
 #define DRM_FORMAT_XRGB8888	fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */
 #define DRM_FORMAT_XBGR8888	fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */
 #define DRM_FORMAT_RGBX8888	fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */
 #define DRM_FORMAT_BGRX8888	fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian */

 #define DRM_FORMAT_ARGB8888	fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian */
 #define DRM_FORMAT_ABGR8888	fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian */
 #define DRM_FORMAT_RGBA8888	fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian */
 #define DRM_FORMAT_BGRA8888	fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian */

 #define DRM_FORMAT_XRGB2101010	fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
 #define DRM_FORMAT_XBGR2101010	fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
 #define DRM_FORMAT_RGBX1010102	fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
 #define DRM_FORMAT_BGRX1010102	fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */

 #define DRM_FORMAT_ARGB2101010	fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
 #define DRM_FORMAT_ABGR2101010	fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
 #define DRM_FORMAT_RGBA1010102	fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
 #define DRM_FORMAT_BGRA1010102	fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */

 /* packed YCbCr */
 #define DRM_FORMAT_YUYV		fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
 #define DRM_FORMAT_YVYU		fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
 #define DRM_FORMAT_UYVY		fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
 #define DRM_FORMAT_VYUY		fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */

 #define DRM_FORMAT_AYUV		fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */

 /*
  * 2 plane YCbCr
  * index 0 = Y plane, [7:0] Y
  * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
  * or
  * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
  */
 #define DRM_FORMAT_NV12		fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */
 #define DRM_FORMAT_NV21		fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */
 #define DRM_FORMAT_NV16		fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */
 #define DRM_FORMAT_NV61		fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
 #define DRM_FORMAT_NV24		fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
 #define DRM_FORMAT_NV42		fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */

 /*
  * 3 plane YCbCr
  * index 0: Y plane, [7:0] Y
  * index 1: Cb plane, [7:0] Cb
  * index 2: Cr plane, [7:0] Cr
  * or
  * index 1: Cr plane, [7:0] Cr
  * index 2: Cb plane, [7:0] Cb
  */
 #define DRM_FORMAT_YUV410	fourcc_code('Y', 'U', 'V', '9') /* 4x4 subsampled Cb (1) and Cr (2) planes */
 #define DRM_FORMAT_YVU410	fourcc_code('Y', 'V', 'U', '9') /* 4x4 subsampled Cr (1) and Cb (2) planes */
 #define DRM_FORMAT_YUV411	fourcc_code('Y', 'U', '1', '1') /* 4x1 subsampled Cb (1) and Cr (2) planes */
 #define DRM_FORMAT_YVU411	fourcc_code('Y', 'V', '1', '1') /* 4x1 subsampled Cr (1) and Cb (2) planes */
 #define DRM_FORMAT_YUV420	fourcc_code('Y', 'U', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */
 #define DRM_FORMAT_YVU420	fourcc_code('Y', 'V', '1', '2') /* 2x2 subsampled Cr (1) and Cb (2) planes */
 #define DRM_FORMAT_YUV422	fourcc_code('Y', 'U', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes */
 #define DRM_FORMAT_YVU422	fourcc_code('Y', 'V', '1', '6') /* 2x1 subsampled Cr (1) and Cb (2) planes */
 #define DRM_FORMAT_YUV444	fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
 #define DRM_FORMAT_YVU444	fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */


 /*
  * Format Modifiers:
  *
  * Format modifiers describe, typically, a re-ordering or modification
  * of the data in a plane of an FB.  This can be used to express tiled/
  * swizzled formats, or compression, or a combination of the two.
  *
  * The upper 8 bits of the format modifier are a vendor-id as assigned
  * below.  The lower 56 bits are assigned as vendor sees fit.
  */

 /* Vendor Ids: */
 #define DRM_FORMAT_MOD_NONE           0
 #define DRM_FORMAT_MOD_VENDOR_NONE    0
 #define DRM_FORMAT_MOD_VENDOR_INTEL   0x01
 #define DRM_FORMAT_MOD_VENDOR_AMD     0x02
 #define DRM_FORMAT_MOD_VENDOR_NV      0x03
 #define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
 #define DRM_FORMAT_MOD_VENDOR_QCOM    0x05
 #define DRM_FORMAT_MOD_VENDOR_ARM     0x08
 /* add more to the end as needed */

 #define DRM_FORMAT_RESERVED	      ((1ULL << 56) - 1)

 #define fourcc_mod_code(vendor, val) \
 	((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))

 /*
  * Format Modifier tokens:
  *
  * When adding a new token please document the layout with a code comment,
  * similar to the fourcc codes above. drm_fourcc.h is considered the
  * authoritative source for all of these.
  */

 /*
  * Invalid Modifier
  *
  * This modifier can be used as a sentinel to terminate the format modifiers
  * list, or to initialize a variable with an invalid modifier. It might also be
  * used to report an error back to userspace for certain APIs.
  */
 #define DRM_FORMAT_MOD_INVALID	fourcc_mod_code(NONE, DRM_FORMAT_RESERVED)

 /*
  * Linear Layout
  *
  * Just plain linear layout. Note that this is different from no specifying any
  * modifier (e.g. not setting DRM_MODE_FB_MODIFIERS in the DRM_ADDFB2 ioctl),
  * which tells the driver to also take driver-internal information into account
  * and so might actually result in a tiled framebuffer.
  */
 #define DRM_FORMAT_MOD_LINEAR	fourcc_mod_code(NONE, 0)

 /* Intel framebuffer modifiers */

 /*
  * Intel X-tiling layout
  *
  * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
  * in row-major layout. Within the tile bytes are laid out row-major, with
  * a platform-dependent stride. On top of that the memory can apply
  * platform-depending swizzling of some higher address bits into bit6.
  *
  * This format is highly platforms specific and not useful for cross-driver
  * sharing. It exists since on a given platform it does uniquely identify the
  * layout in a simple way for i915-specific userspace.
  */
 #define I915_FORMAT_MOD_X_TILED	fourcc_mod_code(INTEL, 1)

 /*
  * Intel Y-tiling layout
  *
  * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
  * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
  * chunks column-major, with a platform-dependent height. On top of that the
  * memory can apply platform-depending swizzling of some higher address bits
  * into bit6.
  *
  * This format is highly platforms specific and not useful for cross-driver
  * sharing. It exists since on a given platform it does uniquely identify the
  * layout in a simple way for i915-specific userspace.
  */
 #define I915_FORMAT_MOD_Y_TILED	fourcc_mod_code(INTEL, 2)

 /*
  * Intel Yf-tiling layout
  *
  * This is a tiled layout using 4Kb tiles in row-major layout.
  * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
  * are arranged in four groups (two wide, two high) with column-major layout.
  * Each group therefore consits out of four 256 byte units, which are also laid
  * out as 2x2 column-major.
  * 256 byte units are made out of four 64 byte blocks of pixels, producing
  * either a square block or a 2:1 unit.
  * 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
  * in pixel depends on the pixel depth.
  */
 #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)

 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
  *
  * Macroblocks are laid in a Z-shape, and each pixel data is following the
  * standard NV12 style.
  * As for NV12, an image is the result of two frame buffers: one for Y,
  * one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
  * Alignment requirements are (for each buffer):
  * - multiple of 128 pixels for the width
  * - multiple of  32 pixels for the height
  *
  * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
  */
 #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE	fourcc_mod_code(SAMSUNG, 1)

 /*
  * Arm Framebuffer Compression (AFBC) modifiers
  *
  * AFBC is a proprietary lossless image compression protocol and format.
  * It provides fine-grained random access and minimizes the amount of data
  * transferred between IP blocks.
  *
  * AFBC has several features which may be supported and/or used, which are
  * represented using bits in the modifier. Not all combinations are valid,
  * and different devices or use-cases may support different combinations.
  */

 /*
  * The top 4 bits (out of the 56 bits alloted for specifying vendor specific
  * modifiers) denote the category for modifiers. Currently we have only two
  * categories of modifiers ie AFBC and MISC. We can have a maximum of sixteen
  * different categories.
  */
 #define DRM_FORMAT_MOD_ARM_CODE(__type, __val) \
 	fourcc_mod_code(ARM, (((__u64)(__type) << 52) | ((__val) & 0x000fffffffffffffULL)))

 #define DRM_FORMAT_MOD_ARM_TYPE_AFBC 0x00
 #define DRM_FORMAT_MOD_ARM_TYPE_MISC 0x01

 #define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \
 	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AFBC, __afbc_mode)

 /*
  * AFBC superblock size
  *
  * Indicates the superblock size(s) used for the AFBC buffer. The buffer
  * size (in pixels) must be aligned to a multiple of the superblock size.
  * Four lowest significant bits(LSBs) are reserved for block size.
  *
  * Where one superblock size is specified, it applies to all planes of the
  * buffer (e.g. 16x16, 32x8). When multiple superblock sizes are specified,
  * the first applies to the Luma plane and the second applies to the Chroma
  * plane(s). e.g. (32x8_64x4 means 32x8 Luma, with 64x4 Chroma).
  * Multiple superblock sizes are only valid for multi-plane YCbCr formats.
  */
 #define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK      0xf
 #define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16     (1ULL)
 #define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8      (2ULL)
 #define AFBC_FORMAT_MOD_BLOCK_SIZE_64x4      (3ULL)
 #define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4 (4ULL)

 /*
  * AFBC lossless colorspace transform
  *
  * Indicates that the buffer makes use of the AFBC lossless colorspace
  * transform.
  */
 #define AFBC_FORMAT_MOD_YTR     (1ULL <<  4)

 /*
  * AFBC block-split
  *
  * Indicates that the payload of each superblock is split. The second
  * half of the payload is positioned at a predefined offset from the start
  * of the superblock payload.
  */
 #define AFBC_FORMAT_MOD_SPLIT   (1ULL <<  5)

 /*
  * AFBC sparse layout
  *
  * This flag indicates that the payload of each superblock must be stored at a
  * predefined position relative to the other superblocks in the same AFBC
  * buffer. This order is the same order used by the header buffer. In this mode
  * each superblock is given the same amount of space as an uncompressed
  * superblock of the particular format would require, rounding up to the next
  * multiple of 128 bytes in size.
  */
 #define AFBC_FORMAT_MOD_SPARSE  (1ULL <<  6)

 /*
  * AFBC copy-block restrict
  *
  * Buffers with this flag must obey the copy-block restriction. The restriction
  * is such that there are no copy-blocks referring across the border of 8x8
  * blocks. For the subsampled data the 8x8 limitation is also subsampled.
  */
 #define AFBC_FORMAT_MOD_CBR     (1ULL <<  7)

 /*
  * AFBC tiled layout
  *
  * The tiled layout groups superblocks in 8x8 or 4x4 tiles, where all
  * superblocks inside a tile are stored together in memory. 8x8 tiles are used
  * for pixel formats up to and including 32 bpp while 4x4 tiles are used for
  * larger bpp formats. The order between the tiles is scan line.
  * When the tiled layout is used, the buffer size (in pixels) must be aligned
  * to the tile size.
  */
 #define AFBC_FORMAT_MOD_TILED   (1ULL <<  8)

 /*
  * AFBC solid color blocks
  *
  * Indicates that the buffer makes use of solid-color blocks, whereby bandwidth
  * can be reduced if a whole superblock is a single color.
  */
 #define AFBC_FORMAT_MOD_SC      (1ULL <<  9)

 /*
  * AFBC double-buffer
  *
  * Indicates that the buffer is allocated in a layout safe for front-buffer
  * rendering.
  */
 #define AFBC_FORMAT_MOD_DB      (1ULL << 10)

 /*
  * AFBC buffer content hints
  *
  * Indicates that the buffer includes per-superblock content hints.
  */
 #define AFBC_FORMAT_MOD_BCH     (1ULL << 11)

 /*
  * Arm 16x16 Block U-Interleaved modifier
  *
  * This is used by Arm Mali Utgard and Midgard GPUs. It divides the image
  * into 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
  * in the block are reordered.
  */
 #define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \
 	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL)

 #if defined(__cplusplus)
 }
 #endif

 #endif /* DRM_FOURCC_H */
	/*
	* Copyright 2011 Intel Corporation
	*
	* Permission is hereby granted, free of charge, to any person obtaining a
	* copy of this software and associated documentation files (the "Software"),
	* to deal in the Software without restriction, including without limitation
	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	* and/or sell copies of the Software, and to permit persons to whom the
	* Software is furnished to do so, subject to the following conditions:
	*
	* The above copyright notice and this permission notice (including the next
	* paragraph) shall be included in all copies or substantial portions of the
	* Software.
	*
	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	* OTHER DEALINGS IN THE SOFTWARE.
	*/

	#ifndef DRM_FOURCC_H
	#define DRM_FOURCC_H

	#include "drm.h"

	#if defined(__cplusplus)
	extern "C" {
	#endif

	#define fourcc_code(a, b, c, d) ((__u32)(a) \| ((__u32)(b) << 8) \| \
	((__u32)(c) << 16) \| ((__u32)(d) << 24))

	#define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */

	/* color index */
	#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */

	/* 8 bpp Red */
	#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */

	/* 16 bpp RG */
	#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
	#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */

	/* 8 bpp RGB */
	#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
	#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */

	/* 16 bpp RGB */
	#define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian */
	#define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian */
	#define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian */
	#define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian */

	#define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian */
	#define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian */
	#define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian */
	#define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian */

	#define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian */
	#define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian */
	#define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian */
	#define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian */

	#define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian */
	#define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian */
	#define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian */
	#define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian */

	#define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
	#define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */

	/* 24 bpp RGB */
	#define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
	#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */

	/* 32 bpp RGB */
	#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */
	#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */
	#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */
	#define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian */

	#define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian */
	#define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian */
	#define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian */
	#define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian */

	#define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
	#define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
	#define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
	#define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */

	#define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
	#define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
	#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
	#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */

	/* packed YCbCr */
	#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
	#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
	#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
	#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */

	#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */

	/*
	* 2 plane YCbCr
	* index 0 = Y plane, [7:0] Y
	* index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
	* or
	* index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
	*/
	#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */
	#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */
	#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */
	#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
	#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
	#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */

	/*
	* 3 plane YCbCr
	* index 0: Y plane, [7:0] Y
	* index 1: Cb plane, [7:0] Cb
	* index 2: Cr plane, [7:0] Cr
	* or
	* index 1: Cr plane, [7:0] Cr
	* index 2: Cb plane, [7:0] Cb
	*/
	#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') /* 4x4 subsampled Cb (1) and Cr (2) planes */
	#define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') /* 4x4 subsampled Cr (1) and Cb (2) planes */
	#define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') /* 4x1 subsampled Cb (1) and Cr (2) planes */
	#define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') /* 4x1 subsampled Cr (1) and Cb (2) planes */
	#define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */
	#define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') /* 2x2 subsampled Cr (1) and Cb (2) planes */
	#define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes */
	#define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') /* 2x1 subsampled Cr (1) and Cb (2) planes */
	#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
	#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */


	/*
	* Format Modifiers:
	*
	* Format modifiers describe, typically, a re-ordering or modification
	* of the data in a plane of an FB. This can be used to express tiled/
	* swizzled formats, or compression, or a combination of the two.
	*
	* The upper 8 bits of the format modifier are a vendor-id as assigned
	* below. The lower 56 bits are assigned as vendor sees fit.
	*/

	/* Vendor Ids: */
	#define DRM_FORMAT_MOD_NONE 0
	#define DRM_FORMAT_MOD_VENDOR_NONE 0
	#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
	#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
	#define DRM_FORMAT_MOD_VENDOR_NV 0x03
	#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
	#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
	#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
	/* add more to the end as needed */

	#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)

	#define fourcc_mod_code(vendor, val) \
	((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) \| (val & 0x00ffffffffffffffULL))

	/*
	* Format Modifier tokens:
	*
	* When adding a new token please document the layout with a code comment,
	* similar to the fourcc codes above. drm_fourcc.h is considered the
	* authoritative source for all of these.
	*/

	/*
	* Invalid Modifier
	*
	* This modifier can be used as a sentinel to terminate the format modifiers
	* list, or to initialize a variable with an invalid modifier. It might also be
	* used to report an error back to userspace for certain APIs.
	*/
	#define DRM_FORMAT_MOD_INVALID fourcc_mod_code(NONE, DRM_FORMAT_RESERVED)

	/*
	* Linear Layout
	*
	* Just plain linear layout. Note that this is different from no specifying any
	* modifier (e.g. not setting DRM_MODE_FB_MODIFIERS in the DRM_ADDFB2 ioctl),
	* which tells the driver to also take driver-internal information into account
	* and so might actually result in a tiled framebuffer.
	*/
	#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)

	/* Intel framebuffer modifiers */

	/*
	* Intel X-tiling layout
	*
	* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
	* in row-major layout. Within the tile bytes are laid out row-major, with
	* a platform-dependent stride. On top of that the memory can apply
	* platform-depending swizzling of some higher address bits into bit6.
	*
	* This format is highly platforms specific and not useful for cross-driver
	* sharing. It exists since on a given platform it does uniquely identify the
	* layout in a simple way for i915-specific userspace.
	*/
	#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)

	/*
	* Intel Y-tiling layout
	*
	* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
	* in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
	* chunks column-major, with a platform-dependent height. On top of that the
	* memory can apply platform-depending swizzling of some higher address bits
	* into bit6.
	*
	* This format is highly platforms specific and not useful for cross-driver
	* sharing. It exists since on a given platform it does uniquely identify the
	* layout in a simple way for i915-specific userspace.
	*/
	#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)

	/*
	* Intel Yf-tiling layout
	*
	* This is a tiled layout using 4Kb tiles in row-major layout.
	* Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
	* are arranged in four groups (two wide, two high) with column-major layout.
	* Each group therefore consits out of four 256 byte units, which are also laid
	* out as 2x2 column-major.
	* 256 byte units are made out of four 64 byte blocks of pixels, producing
	* either a square block or a 2:1 unit.
	* 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
	* in pixel depends on the pixel depth.
	*/
	#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)

	/*
	* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
	*
	* Macroblocks are laid in a Z-shape, and each pixel data is following the
	* standard NV12 style.
	* As for NV12, an image is the result of two frame buffers: one for Y,
	* one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
	* Alignment requirements are (for each buffer):
	* - multiple of 128 pixels for the width
	* - multiple of 32 pixels for the height
	*
	* For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
	*/
	#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)

	/*
	* Arm Framebuffer Compression (AFBC) modifiers
	*
	* AFBC is a proprietary lossless image compression protocol and format.
	* It provides fine-grained random access and minimizes the amount of data
	* transferred between IP blocks.
	*
	* AFBC has several features which may be supported and/or used, which are
	* represented using bits in the modifier. Not all combinations are valid,
	* and different devices or use-cases may support different combinations.
	*/

	/*
	* The top 4 bits (out of the 56 bits alloted for specifying vendor specific
	* modifiers) denote the category for modifiers. Currently we have only two
	* categories of modifiers ie AFBC and MISC. We can have a maximum of sixteen
	* different categories.
	*/
	#define DRM_FORMAT_MOD_ARM_CODE(__type, __val) \
	fourcc_mod_code(ARM, (((__u64)(__type) << 52) \| ((__val) & 0x000fffffffffffffULL)))

	#define DRM_FORMAT_MOD_ARM_TYPE_AFBC 0x00
	#define DRM_FORMAT_MOD_ARM_TYPE_MISC 0x01

	#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \
	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AFBC, __afbc_mode)

	/*
	* AFBC superblock size
	*
	* Indicates the superblock size(s) used for the AFBC buffer. The buffer
	* size (in pixels) must be aligned to a multiple of the superblock size.
	* Four lowest significant bits(LSBs) are reserved for block size.
	*
	* Where one superblock size is specified, it applies to all planes of the
	* buffer (e.g. 16x16, 32x8). When multiple superblock sizes are specified,
	* the first applies to the Luma plane and the second applies to the Chroma
	* plane(s). e.g. (32x8_64x4 means 32x8 Luma, with 64x4 Chroma).
	* Multiple superblock sizes are only valid for multi-plane YCbCr formats.
	*/
	#define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf
	#define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL)
	#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL)
	#define AFBC_FORMAT_MOD_BLOCK_SIZE_64x4 (3ULL)
	#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4 (4ULL)

	/*
	* AFBC lossless colorspace transform
	*
	* Indicates that the buffer makes use of the AFBC lossless colorspace
	* transform.
	*/
	#define AFBC_FORMAT_MOD_YTR (1ULL << 4)

	/*
	* AFBC block-split
	*
	* Indicates that the payload of each superblock is split. The second
	* half of the payload is positioned at a predefined offset from the start
	* of the superblock payload.
	*/
	#define AFBC_FORMAT_MOD_SPLIT (1ULL << 5)

	/*
	* AFBC sparse layout
	*
	* This flag indicates that the payload of each superblock must be stored at a
	* predefined position relative to the other superblocks in the same AFBC
	* buffer. This order is the same order used by the header buffer. In this mode
	* each superblock is given the same amount of space as an uncompressed
	* superblock of the particular format would require, rounding up to the next
	* multiple of 128 bytes in size.
	*/
	#define AFBC_FORMAT_MOD_SPARSE (1ULL << 6)

	/*
	* AFBC copy-block restrict
	*
	* Buffers with this flag must obey the copy-block restriction. The restriction
	* is such that there are no copy-blocks referring across the border of 8x8
	* blocks. For the subsampled data the 8x8 limitation is also subsampled.
	*/
	#define AFBC_FORMAT_MOD_CBR (1ULL << 7)

	/*
	* AFBC tiled layout
	*
	* The tiled layout groups superblocks in 8x8 or 4x4 tiles, where all
	* superblocks inside a tile are stored together in memory. 8x8 tiles are used
	* for pixel formats up to and including 32 bpp while 4x4 tiles are used for
	* larger bpp formats. The order between the tiles is scan line.
	* When the tiled layout is used, the buffer size (in pixels) must be aligned
	* to the tile size.
	*/
	#define AFBC_FORMAT_MOD_TILED (1ULL << 8)

	/*
	* AFBC solid color blocks
	*
	* Indicates that the buffer makes use of solid-color blocks, whereby bandwidth
	* can be reduced if a whole superblock is a single color.
	*/
	#define AFBC_FORMAT_MOD_SC (1ULL << 9)

	/*
	* AFBC double-buffer
	*
	* Indicates that the buffer is allocated in a layout safe for front-buffer
	* rendering.
	*/
	#define AFBC_FORMAT_MOD_DB (1ULL << 10)

	/*
	* AFBC buffer content hints
	*
	* Indicates that the buffer includes per-superblock content hints.
	*/
	#define AFBC_FORMAT_MOD_BCH (1ULL << 11)

	/*
	* Arm 16x16 Block U-Interleaved modifier
	*
	* This is used by Arm Mali Utgard and Midgard GPUs. It divides the image
	* into 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
	* in the block are reordered.
	*/
	#define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \
	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL)

	#if defined(__cplusplus)
	}
	#endif

	#endif /* DRM_FOURCC_H */