| /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ | |
| /* | |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. | |
| */ | |
| #define PDID_P1_DSPA 0 | |
| #define PDID_P1_DSPB 1 | |
| #define PDID_P1_M4A 2 | |
| #define PDID_P1_M4B 3 | |
| #define PDID_P1_ISP_A 4 | |
| #define PDID_P1_ISP_B 5 | |
| #define PDID_P1_ISP_C 6 | |
| #define PDID_P1_ISP_D 7 | |
| #define PDID_P1_MIPI_ISP_TOP 8 | |
| #define PDID_P1_USB_COMB 9 | |
| #define PDID_P1_PCIE 10 | |
| #define PDID_P1_ETH 11 | |
| #define PDID_P1_SDIO 12 | |
| #define PDID_P1_NAND_EMMC 13 | |
| #define PDID_P1_NNA_A 14 | |
| #define PDID_P1_NNA_B 15 | |
| #define PDID_P1_NNA_C 16 | |
| #define PDID_P1_NNA_D 17 | |
| #define PDID_P1_NNA_E 18 | |
| #define PDID_P1_NNA_F 19 | |
| #define PDID_P1_NNA_TOP 20 | |
| #define PDID_P1_GE2D 21 | |
| #define PDID_P1_DEWA 22 | |
| #define PDID_P1_DEWB 23 | |
| #define PDID_P1_DEWC 24 | |
| #define PDID_P1_FDLE 25 | |
| #define PDID_P1_DMC0 26 | |
| #define PDID_P1_DMC1 27 | |
| #define PDID_P1_NOC_DMC_TOP 28 | |
| #define PDID_P1_SMMU 29 | |
| #define PDID_P1_DDR0 30 | |
| #define PDID_P1_DDR1 31 |