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nest-open-source / manifest_repos / kernel / 9398cc34ac0688d293c2dff535a4025e4140b0b1 / . / drivers / amlogic / media / common / ge2d / blend.c
blob: 0bc154f98a5f7d921d4612e6a71f917db2cd70eb [file] [log] [blame]
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]2/*
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]4 */
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]5
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]6/* Linux Headers */
7#include <linux/types.h>
8
9/* Amlogic Headers */
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]10#include <linux/amlogic/media/ge2d/ge2d.h>
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]11#include "ge2d_reg.h"
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]12
13void blend(struct ge2d_context_s *wq,
14 int src_x, int src_y, int src_w, int src_h,
15 int src2_x, int src2_y, int src2_w, int src2_h,
16 int dst_x, int dst_y, int dst_w, int dst_h,
17 int op)
18{
19 struct ge2d_cmd_s *ge2d_cmd_cfg = ge2d_wq_get_cmd(wq);
20
21 ge2d_cmd_cfg->src1_x_start = src_x;
22 ge2d_cmd_cfg->src1_x_end = src_x + src_w - 1;
23 ge2d_cmd_cfg->src1_y_start = src_y;
24 ge2d_cmd_cfg->src1_y_end = src_y + src_h - 1;
25
26 ge2d_cmd_cfg->src2_x_start = src2_x;
27 ge2d_cmd_cfg->src2_x_end = src2_x + src2_w - 1;
28 ge2d_cmd_cfg->src2_y_start = src2_y;
29 ge2d_cmd_cfg->src2_y_end = src2_y + src2_h - 1;
30
31 ge2d_cmd_cfg->dst_x_start = dst_x;
32 ge2d_cmd_cfg->dst_x_end = dst_x + dst_w - 1;
33 ge2d_cmd_cfg->dst_y_start = dst_y;
34 ge2d_cmd_cfg->dst_y_end = dst_y + dst_h - 1;
35
36 /* if ((dst_w != src_w) || (dst_h != src_h)) { */
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]37 ge2d_cmd_cfg->sc_hsc_en = 1;
38 ge2d_cmd_cfg->sc_vsc_en = 1;
39 ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
40 ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
41 ge2d_cmd_cfg->hsc_div_en = 1;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]42#ifdef CONFIG_GE2D_ADV_NUM
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]43 ge2d_cmd_cfg->hsc_adv_num =
44 ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]45#else
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]46 ge2d_cmd_cfg->hsc_adv_num = 0;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]47#endif
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]48
49 ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
50 ge2d_cmd_cfg->color_src_blend_factor = (op >> 20) & 0xf;
51 ge2d_cmd_cfg->color_dst_blend_factor = (op >> 16) & 0xf;
52 ge2d_cmd_cfg->alpha_src_blend_factor = (op >> 4) & 0xf;
53 ge2d_cmd_cfg->alpha_dst_blend_factor = (op >> 0) & 0xf;
54
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]55 if (ge2d_meson_dev.chip_type != MESON_CPU_MAJOR_ID_AXG) {
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]56 if (ge2d_cmd_cfg->color_blend_mode >= BLENDOP_LOGIC) {
57 ge2d_cmd_cfg->color_logic_op =
58 ge2d_cmd_cfg->color_blend_mode - BLENDOP_LOGIC;
59 ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
60 }
61 }
62 ge2d_cmd_cfg->alpha_blend_mode = (op >> 8) & 0xff;
63 if (ge2d_cmd_cfg->alpha_blend_mode >= BLENDOP_LOGIC) {
64 ge2d_cmd_cfg->alpha_logic_op =
65 ge2d_cmd_cfg->alpha_blend_mode - BLENDOP_LOGIC;
66 ge2d_cmd_cfg->alpha_blend_mode = OPERATION_LOGIC;
67 }
68
69 ge2d_cmd_cfg->wait_done_flag = 1;
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]70 ge2d_cmd_cfg->cmd_op = IS_BLEND;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]71
72 ge2d_wq_add_work(wq);
73}
74EXPORT_SYMBOL(blend);
75
76void blend_noblk(struct ge2d_context_s *wq,
77 int src_x, int src_y, int src_w, int src_h,
78 int src2_x, int src2_y, int src2_w, int src2_h,
79 int dst_x, int dst_y, int dst_w, int dst_h,
80 int op)
81{
82 struct ge2d_cmd_s *ge2d_cmd_cfg = ge2d_wq_get_cmd(wq);
83
84 ge2d_cmd_cfg->src1_x_start = src_x;
85 ge2d_cmd_cfg->src1_x_end = src_x + src_w - 1;
86 ge2d_cmd_cfg->src1_y_start = src_y;
87 ge2d_cmd_cfg->src1_y_end = src_y + src_h - 1;
88
89 ge2d_cmd_cfg->src2_x_start = src2_x;
90 ge2d_cmd_cfg->src2_x_end = src2_x + src2_w - 1;
91 ge2d_cmd_cfg->src2_y_start = src2_y;
92 ge2d_cmd_cfg->src2_y_end = src2_y + src2_h - 1;
93
94 ge2d_cmd_cfg->dst_x_start = dst_x;
95 ge2d_cmd_cfg->dst_x_end = dst_x + dst_w - 1;
96 ge2d_cmd_cfg->dst_y_start = dst_y;
97 ge2d_cmd_cfg->dst_y_end = dst_y + dst_h - 1;
98
99 /* if ((dst_w != src_w) || (dst_h != src_h)) { */
100 if (1) {
101 ge2d_cmd_cfg->sc_hsc_en = 1;
102 ge2d_cmd_cfg->sc_vsc_en = 1;
103 ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
104 ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
105 ge2d_cmd_cfg->hsc_div_en = 1;
106#ifdef CONFIG_GE2D_ADV_NUM
107 ge2d_cmd_cfg->hsc_adv_num =
108 ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
109#else
110 ge2d_cmd_cfg->hsc_adv_num = 0;
111#endif
112 } else {
113 ge2d_cmd_cfg->sc_hsc_en = 0;
114 ge2d_cmd_cfg->sc_vsc_en = 0;
115 ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
116 ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
117 ge2d_cmd_cfg->hsc_div_en = 0;
118 ge2d_cmd_cfg->hsc_adv_num = 0;
119 }
120
121 ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
122 ge2d_cmd_cfg->color_src_blend_factor = (op >> 20) & 0xf;
123 ge2d_cmd_cfg->color_dst_blend_factor = (op >> 16) & 0xf;
124 ge2d_cmd_cfg->alpha_src_blend_factor = (op >> 4) & 0xf;
125 ge2d_cmd_cfg->alpha_dst_blend_factor = (op >> 0) & 0xf;
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]126 if (ge2d_meson_dev.chip_type != MESON_CPU_MAJOR_ID_AXG) {
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]127 if (ge2d_cmd_cfg->color_blend_mode >= BLENDOP_LOGIC) {
128 ge2d_cmd_cfg->color_logic_op =
129 ge2d_cmd_cfg->color_blend_mode - BLENDOP_LOGIC;
130 ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
131 }
132 }
133 ge2d_cmd_cfg->alpha_blend_mode = (op >> 8) & 0xff;
134 if (ge2d_cmd_cfg->alpha_blend_mode >= BLENDOP_LOGIC) {
135 ge2d_cmd_cfg->alpha_logic_op =
136 ge2d_cmd_cfg->alpha_blend_mode - BLENDOP_LOGIC;
137 ge2d_cmd_cfg->alpha_blend_mode = OPERATION_LOGIC;
138 }
139
140 ge2d_cmd_cfg->wait_done_flag = 0;
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]141 ge2d_cmd_cfg->cmd_op = IS_BLEND;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]142
143 ge2d_wq_add_work(wq);
144}
145EXPORT_SYMBOL(blend_noblk);
146void blend_noalpha(struct ge2d_context_s *wq,
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]147 int src_x, int src_y, int src_w, int src_h,
148 int src2_x, int src2_y, int src2_w, int src2_h,
149 int dst_x, int dst_y, int dst_w, int dst_h,
150 int op)
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]151{
152 struct ge2d_cmd_s *ge2d_cmd_cfg = ge2d_wq_get_cmd(wq);
153
154 ge2d_cmd_cfg->src1_x_start = src_x;
155 ge2d_cmd_cfg->src1_x_end = src_x + src_w - 1;
156 ge2d_cmd_cfg->src1_y_start = src_y;
157 ge2d_cmd_cfg->src1_y_end = src_y + src_h - 1;
158
159 ge2d_cmd_cfg->src2_x_start = src2_x;
160 ge2d_cmd_cfg->src2_x_end = src2_x + src2_w - 1;
161 ge2d_cmd_cfg->src2_y_start = src2_y;
162 ge2d_cmd_cfg->src2_y_end = src2_y + src2_h - 1;
163
164 ge2d_cmd_cfg->dst_x_start = dst_x;
165 ge2d_cmd_cfg->dst_x_end = dst_x + dst_w - 1;
166 ge2d_cmd_cfg->dst_y_start = dst_y;
167 ge2d_cmd_cfg->dst_y_end = dst_y + dst_h - 1;
168
169 /* if ((dst_w != src_w) || (dst_h != src_h)) { */
170 if (1) {
171 ge2d_cmd_cfg->sc_hsc_en = 1;
172 ge2d_cmd_cfg->sc_vsc_en = 1;
173 ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
174 ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
175 ge2d_cmd_cfg->hsc_div_en = 1;
176#ifdef CONFIG_GE2D_ADV_NUM
177 ge2d_cmd_cfg->hsc_adv_num =
178 ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
179#else
180 ge2d_cmd_cfg->hsc_adv_num = 0;
181#endif
182 } else {
183 ge2d_cmd_cfg->sc_hsc_en = 0;
184 ge2d_cmd_cfg->sc_vsc_en = 0;
185 ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
186 ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
187 ge2d_cmd_cfg->hsc_div_en = 0;
188 ge2d_cmd_cfg->hsc_adv_num = 0;
189 }
190
191 ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
192 ge2d_cmd_cfg->color_src_blend_factor = (op >> 20) & 0xf;
193 ge2d_cmd_cfg->color_dst_blend_factor = (op >> 16) & 0xf;
194 ge2d_cmd_cfg->alpha_src_blend_factor = (op >> 4) & 0xf;
195 ge2d_cmd_cfg->alpha_dst_blend_factor = (op >> 0) & 0xf;
196
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]197 if (ge2d_meson_dev.chip_type != MESON_CPU_MAJOR_ID_AXG) {
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]198 if (ge2d_cmd_cfg->color_blend_mode >= BLENDOP_LOGIC) {
199 ge2d_cmd_cfg->color_logic_op =
200 ge2d_cmd_cfg->color_blend_mode - BLENDOP_LOGIC;
201 ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
202 }
203 }
204 ge2d_cmd_cfg->alpha_blend_mode = OPERATION_LOGIC;
205 ge2d_cmd_cfg->alpha_logic_op = LOGIC_OPERATION_SET;
206
207 ge2d_cmd_cfg->wait_done_flag = 1;
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]208 ge2d_cmd_cfg->cmd_op = IS_BLEND;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]209
210 ge2d_wq_add_work(wq);
211}
212EXPORT_SYMBOL(blend_noalpha);
213
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]214void blend_noalpha_noblk(struct ge2d_context_s *wq,
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]215 int src_x, int src_y, int src_w, int src_h,
216 int src2_x, int src2_y, int src2_w, int src2_h,
217 int dst_x, int dst_y, int dst_w, int dst_h,
218 int op)
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]219{
220 struct ge2d_cmd_s *ge2d_cmd_cfg = ge2d_wq_get_cmd(wq);
221
222 ge2d_cmd_cfg->src1_x_start = src_x;
223 ge2d_cmd_cfg->src1_x_end = src_x + src_w - 1;
224 ge2d_cmd_cfg->src1_y_start = src_y;
225 ge2d_cmd_cfg->src1_y_end = src_y + src_h - 1;
226
227 ge2d_cmd_cfg->src2_x_start = src2_x;
228 ge2d_cmd_cfg->src2_x_end = src2_x + src2_w - 1;
229 ge2d_cmd_cfg->src2_y_start = src2_y;
230 ge2d_cmd_cfg->src2_y_end = src2_y + src2_h - 1;
231
232 ge2d_cmd_cfg->dst_x_start = dst_x;
233 ge2d_cmd_cfg->dst_x_end = dst_x + dst_w - 1;
234 ge2d_cmd_cfg->dst_y_start = dst_y;
235 ge2d_cmd_cfg->dst_y_end = dst_y + dst_h - 1;
236
237 /* if ((dst_w != src_w) || (dst_h != src_h)) { */
238 if (1) {
239 ge2d_cmd_cfg->sc_hsc_en = 1;
240 ge2d_cmd_cfg->sc_vsc_en = 1;
241 ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
242 ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
243 ge2d_cmd_cfg->hsc_div_en = 1;
244#ifdef CONFIG_GE2D_ADV_NUM
245 ge2d_cmd_cfg->hsc_adv_num =
246 ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
247#else
248 ge2d_cmd_cfg->hsc_adv_num = 0;
249#endif
250 } else {
251 ge2d_cmd_cfg->sc_hsc_en = 0;
252 ge2d_cmd_cfg->sc_vsc_en = 0;
253 ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
254 ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
255 ge2d_cmd_cfg->hsc_div_en = 0;
256 ge2d_cmd_cfg->hsc_adv_num = 0;
257 }
258
259 ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
260 ge2d_cmd_cfg->color_src_blend_factor = (op >> 20) & 0xf;
261 ge2d_cmd_cfg->color_dst_blend_factor = (op >> 16) & 0xf;
262 ge2d_cmd_cfg->alpha_src_blend_factor = (op >> 4) & 0xf;
263 ge2d_cmd_cfg->alpha_dst_blend_factor = (op >> 0) & 0xf;
264
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]265 if (ge2d_meson_dev.chip_type != MESON_CPU_MAJOR_ID_AXG) {
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]266 if (ge2d_cmd_cfg->color_blend_mode >= BLENDOP_LOGIC) {
267 ge2d_cmd_cfg->color_logic_op =
268 ge2d_cmd_cfg->color_blend_mode - BLENDOP_LOGIC;
269 ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
270 }
271 }
272 ge2d_cmd_cfg->alpha_blend_mode = OPERATION_LOGIC;
273 ge2d_cmd_cfg->alpha_logic_op = LOGIC_OPERATION_SET;
274
275 ge2d_cmd_cfg->wait_done_flag = 0;
Googler38bda472022-08-19 10:07:08 -0700[diff] [blame]276 ge2d_cmd_cfg->cmd_op = IS_BLEND;
Googler4f18c0c2022-09-20 17:23:36 +0800[diff] [blame]277
278 ge2d_wq_add_work(wq);
279}
280EXPORT_SYMBOL(blend_noalpha_noblk);