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nest-open-source / manifest_repos / kernel / 9398cc34ac0688d293c2dff535a4025e4140b0b1 / . / drivers / pinctrl / sunxi / pinctrl-sun50i-a100-r.c
blob: 18088f6f44b2384c07f8510079b26b3ac51dbecd [file] [log] [blame]
Googler9398cc32022-12-02 17:21:52 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
4 *
5 * Based on:
6 * huangshuosheng <huangshuosheng@allwinnertech.com>
7 */
8
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/of_device.h>
12#include <linux/pinctrl/pinctrl.h>
13#include <linux/platform_device.h>
14
15#include "pinctrl-sunxi.h"
16
17static const struct sunxi_desc_pin a100_r_pins[] = {
18 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
19 SUNXI_FUNCTION(0x0, "gpio_in"),
20 SUNXI_FUNCTION(0x1, "gpio_out"),
21 SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */
22 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
23 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
24 SUNXI_FUNCTION(0x0, "gpio_in"),
25 SUNXI_FUNCTION(0x1, "gpio_out"),
26 SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */
27 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
28 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
29 SUNXI_FUNCTION(0x0, "gpio_in"),
30 SUNXI_FUNCTION(0x1, "gpio_out"),
31 SUNXI_FUNCTION(0x2, "s_uart0"), /* TX */
32 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
33 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
34 SUNXI_FUNCTION(0x0, "gpio_in"),
35 SUNXI_FUNCTION(0x1, "gpio_out"),
36 SUNXI_FUNCTION(0x2, "s_uart0"), /* RX */
37 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
38 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
39 SUNXI_FUNCTION(0x0, "gpio_in"),
40 SUNXI_FUNCTION(0x1, "gpio_out"),
41 SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */
42 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out"),
46 SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */
47 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
49 SUNXI_FUNCTION(0x0, "gpio_in"),
50 SUNXI_FUNCTION(0x1, "gpio_out"),
51 SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */
52 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */
57 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
59 SUNXI_FUNCTION(0x0, "gpio_in"),
60 SUNXI_FUNCTION(0x1, "gpio_out"),
61 SUNXI_FUNCTION(0x2, "s_i2c1"), /* SCK */
62 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
64 SUNXI_FUNCTION(0x0, "gpio_in"),
65 SUNXI_FUNCTION(0x1, "gpio_out"),
66 SUNXI_FUNCTION(0x2, "s_i2c1"), /* SDA */
67 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
68 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
69 SUNXI_FUNCTION(0x0, "gpio_in"),
70 SUNXI_FUNCTION(0x1, "gpio_out"),
71 SUNXI_FUNCTION(0x2, "s_pwm"),
72 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
73 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
74 SUNXI_FUNCTION(0x0, "gpio_in"),
75 SUNXI_FUNCTION(0x1, "gpio_out"),
76 SUNXI_FUNCTION(0x3, "s_cir"), /* IN */
77 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
78};
79
80static const struct sunxi_pinctrl_desc a100_r_pinctrl_data = {
81 .pins = a100_r_pins,
82 .npins = ARRAY_SIZE(a100_r_pins),
83 .pin_base = PL_BASE,
84 .irq_banks = 1,
85};
86
87static int a100_r_pinctrl_probe(struct platform_device *pdev)
88{
89 return sunxi_pinctrl_init(pdev, &a100_r_pinctrl_data);
90}
91
92static const struct of_device_id a100_r_pinctrl_match[] = {
93 { .compatible = "allwinner,sun50i-a100-r-pinctrl", },
94 {}
95};
96MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
97
98static struct platform_driver a100_r_pinctrl_driver = {
99 .probe = a100_r_pinctrl_probe,
100 .driver = {
101 .name = "sun50i-a100-r-pinctrl",
102 .of_match_table = a100_r_pinctrl_match,
103 },
104};
105module_platform_driver(a100_r_pinctrl_driver);