Googler | 9398cc3 | 2022-12-02 17:21:52 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| 2 | /* |
| 3 | * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | #ifndef __T3_AUDIO_CLK_H__ |
| 7 | #define __T3_AUDIO_CLK_H__ |
| 8 | |
| 9 | /* |
| 10 | * CLKID audio index values |
| 11 | */ |
| 12 | |
| 13 | #define CLKID_AUDIO_GATE_DDR_ARB 0 |
| 14 | #define CLKID_AUDIO_GATE_PDM 1 |
| 15 | #define CLKID_AUDIO_GATE_TDMINA 2 |
| 16 | #define CLKID_AUDIO_GATE_TDMINB 3 |
| 17 | #define CLKID_AUDIO_GATE_TDMINC 4 |
| 18 | #define CLKID_AUDIO_GATE_TDMINLB 5 |
| 19 | #define CLKID_AUDIO_GATE_TDMOUTA 6 |
| 20 | #define CLKID_AUDIO_GATE_TDMOUTB 7 |
| 21 | #define CLKID_AUDIO_GATE_TDMOUTC 8 |
| 22 | #define CLKID_AUDIO_GATE_FRDDRA 9 |
| 23 | #define CLKID_AUDIO_GATE_FRDDRB 10 |
| 24 | #define CLKID_AUDIO_GATE_FRDDRC 11 |
| 25 | #define CLKID_AUDIO_GATE_TODDRA 12 |
| 26 | #define CLKID_AUDIO_GATE_TODDRB 13 |
| 27 | #define CLKID_AUDIO_GATE_TODDRC 14 |
| 28 | #define CLKID_AUDIO_GATE_LOOPBACKA 15 |
| 29 | #define CLKID_AUDIO_GATE_SPDIFIN 16 |
| 30 | #define CLKID_AUDIO_GATE_SPDIFOUT_A 17 |
| 31 | #define CLKID_AUDIO_GATE_RESAMPLEA 18 |
| 32 | #define CLKID_AUDIO_GATE_RESERVED0 19 |
| 33 | #define CLKID_AUDIO_GATE_RESERVED1 20 |
| 34 | #define CLKID_AUDIO_GATE_SPDIFOUT_B 21 |
| 35 | #define CLKID_AUDIO_GATE_EQDRC 22 |
| 36 | #define CLKID_AUDIO_GATE_RESERVED2 23 |
| 37 | #define CLKID_AUDIO_GATE_RESERVED3 24 |
| 38 | #define CLKID_AUDIO_GATE_RESERVED4 25 |
| 39 | #define CLKID_AUDIO_GATE_RESAMPLEB 26 |
| 40 | #define CLKID_AUDIO_GATE_TOVAD 27 |
| 41 | #define CLKID_AUDIO_GATE_AUDIOLOCKER 28 |
| 42 | #define CLKID_AUDIO_GATE_SPDIFIN_LB 29 |
| 43 | #define CLKID_AUDIO_GATE_FRATV 30 |
| 44 | #define CLKID_AUDIO_GATE_FRHDMIRX 31 |
| 45 | |
| 46 | /* Gate En1 */ |
| 47 | #define CLKID_AUDIO_GATE_FRDDRD 32 |
| 48 | #define CLKID_AUDIO_GATE_TODDRD 33 |
| 49 | #define CLKID_AUDIO_GATE_LOOPBACKB 34 |
| 50 | #define CLKID_AUDIO_GATE_FRDDRE 35 |
| 51 | #define CLKID_AUDIO_GATE_TODDRE 36 |
| 52 | #define CLKID_AUDIO_GATE_EARCTX 37 |
| 53 | #define CLKID_AUDIO_GATE_EARCRX 38 |
| 54 | #define CLKID_AUDIO_GATE_RESAMPLEB_OLD 39 |
| 55 | #define CLKID_AUDIO_GATE_LOCKER 40 |
| 56 | |
| 57 | #define CLKID_AUDIO_GATE_MAX 41 |
| 58 | |
| 59 | #define MCLK_BASE CLKID_AUDIO_GATE_MAX |
| 60 | #define CLKID_AUDIO_MCLK_A (MCLK_BASE + 0) |
| 61 | #define CLKID_AUDIO_MCLK_B (MCLK_BASE + 1) |
| 62 | #define CLKID_AUDIO_MCLK_C (MCLK_BASE + 2) |
| 63 | #define CLKID_AUDIO_MCLK_D (MCLK_BASE + 3) |
| 64 | #define CLKID_AUDIO_MCLK_E (MCLK_BASE + 4) |
| 65 | #define CLKID_AUDIO_MCLK_F (MCLK_BASE + 5) |
| 66 | |
| 67 | #define CLKID_AUDIO_SPDIFIN (MCLK_BASE + 6) |
| 68 | #define CLKID_AUDIO_SPDIFOUT_A (MCLK_BASE + 7) |
| 69 | #define CLKID_AUDIO_RESAMPLE_A (MCLK_BASE + 8) |
| 70 | #define CLKID_AUDIO_LOCKER_OUT (MCLK_BASE + 9) |
| 71 | #define CLKID_AUDIO_LOCKER_IN (MCLK_BASE + 10) |
| 72 | #define CLKID_AUDIO_PDMIN0 (MCLK_BASE + 11) |
| 73 | #define CLKID_AUDIO_PDMIN1 (MCLK_BASE + 12) |
| 74 | #define CLKID_AUDIO_SPDIFOUT_B (MCLK_BASE + 13) |
| 75 | #define CLKID_AUDIO_RESAMPLE_B (MCLK_BASE + 14) |
| 76 | #define CLKID_AUDIO_SPDIFIN_LB (MCLK_BASE + 15) |
| 77 | #define CLKID_AUDIO_EQDRC (MCLK_BASE + 16) |
| 78 | #define CLKID_AUDIO_VAD (MCLK_BASE + 17) |
| 79 | #define CLKID_EARCTX_CMDC (MCLK_BASE + 18) |
| 80 | #define CLKID_EARCTX_DMAC (MCLK_BASE + 19) |
| 81 | #define CLKID_EARCRX_CMDC (MCLK_BASE + 20) |
| 82 | #define CLKID_EARCRX_DMAC (MCLK_BASE + 21) |
| 83 | |
| 84 | #define CLKID_AUDIO_MCLK_PAD0 (MCLK_BASE + 22) |
| 85 | #define CLKID_AUDIO_MCLK_PAD1 (MCLK_BASE + 23) |
| 86 | #define CLKID_AUDIO_MCLK_PAD2 (MCLK_BASE + 24) |
| 87 | |
| 88 | #define NUM_AUDIO_CLKS (MCLK_BASE + 25) |
| 89 | #endif /* __T3_AUDIO_CLK_H__ */ |
| 90 | |