Googler | b48fa91 | 2023-03-17 12:40:29 +0530 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2018,2020 The Linux Foundation. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | #include <linux/kernel.h> |
| 7 | #include <linux/err.h> |
| 8 | #include <linux/platform_device.h> |
| 9 | #include <linux/clk-provider.h> |
| 10 | #include <linux/regmap.h> |
| 11 | #include <linux/module.h> |
| 12 | |
| 13 | #include <dt-bindings/clock/qcom,apss-ipq.h> |
| 14 | |
| 15 | #include "common.h" |
| 16 | #include "clk-regmap.h" |
| 17 | #include "clk-branch.h" |
| 18 | #include "clk-alpha-pll.h" |
| 19 | #include "clk-rcg.h" |
| 20 | |
| 21 | enum { |
| 22 | P_XO, |
| 23 | P_APSS_PLL_EARLY, |
| 24 | }; |
| 25 | |
| 26 | static const struct clk_parent_data parents_apcs_alias0_clk_src[] = { |
| 27 | { .fw_name = "xo" }, |
| 28 | { .fw_name = "pll" }, |
| 29 | }; |
| 30 | |
| 31 | static const struct parent_map parents_apcs_alias0_clk_src_map[] = { |
| 32 | { P_XO, 0 }, |
| 33 | { P_APSS_PLL_EARLY, 5 }, |
| 34 | }; |
| 35 | |
| 36 | static const struct freq_tbl ftbl_apcs_alias0_clk_src[] = { |
| 37 | { .src = P_APSS_PLL_EARLY, .pre_div = 1 }, |
| 38 | { } |
| 39 | }; |
| 40 | |
| 41 | static struct clk_rcg2 apcs_alias0_clk_src = { |
| 42 | .cmd_rcgr = 0x0050, |
| 43 | .freq_tbl = ftbl_apcs_alias0_clk_src, |
| 44 | .hid_width = 5, |
| 45 | .parent_map = parents_apcs_alias0_clk_src_map, |
| 46 | .clkr.hw.init = &(struct clk_init_data){ |
| 47 | .name = "apcs_alias0_clk_src", |
| 48 | .parent_data = parents_apcs_alias0_clk_src, |
| 49 | .num_parents = 2, |
| 50 | .ops = &clk_rcg2_ops, |
| 51 | .flags = CLK_SET_RATE_PARENT, |
| 52 | }, |
| 53 | }; |
| 54 | |
| 55 | static struct clk_branch apcs_alias0_core_clk = { |
| 56 | .halt_reg = 0x0058, |
| 57 | .clkr = { |
| 58 | .enable_reg = 0x0058, |
| 59 | .enable_mask = BIT(0), |
| 60 | .hw.init = &(struct clk_init_data){ |
| 61 | .name = "apcs_alias0_core_clk", |
| 62 | .parent_hws = (const struct clk_hw *[]){ |
| 63 | &apcs_alias0_clk_src.clkr.hw }, |
| 64 | .num_parents = 1, |
| 65 | .flags = CLK_SET_RATE_PARENT, |
| 66 | .ops = &clk_branch2_ops, |
| 67 | }, |
| 68 | }, |
| 69 | }; |
| 70 | |
| 71 | static const struct regmap_config apss_ipq6018_regmap_config = { |
| 72 | .reg_bits = 32, |
| 73 | .reg_stride = 4, |
| 74 | .val_bits = 32, |
| 75 | .max_register = 0x1000, |
| 76 | .fast_io = true, |
| 77 | }; |
| 78 | |
| 79 | static struct clk_regmap *apss_ipq6018_clks[] = { |
| 80 | [APCS_ALIAS0_CLK_SRC] = &apcs_alias0_clk_src.clkr, |
| 81 | [APCS_ALIAS0_CORE_CLK] = &apcs_alias0_core_clk.clkr, |
| 82 | }; |
| 83 | |
| 84 | static const struct qcom_cc_desc apss_ipq6018_desc = { |
| 85 | .config = &apss_ipq6018_regmap_config, |
| 86 | .clks = apss_ipq6018_clks, |
| 87 | .num_clks = ARRAY_SIZE(apss_ipq6018_clks), |
| 88 | }; |
| 89 | |
| 90 | static int apss_ipq6018_probe(struct platform_device *pdev) |
| 91 | { |
| 92 | struct regmap *regmap; |
| 93 | |
| 94 | regmap = dev_get_regmap(pdev->dev.parent, NULL); |
| 95 | if (IS_ERR(regmap)) |
| 96 | return PTR_ERR(regmap); |
| 97 | |
| 98 | return qcom_cc_really_probe(pdev, &apss_ipq6018_desc, regmap); |
| 99 | } |
| 100 | |
| 101 | static struct platform_driver apss_ipq6018_driver = { |
| 102 | .probe = apss_ipq6018_probe, |
| 103 | .driver = { |
| 104 | .name = "qcom,apss-ipq6018-clk", |
| 105 | }, |
| 106 | }; |
| 107 | |
| 108 | module_platform_driver(apss_ipq6018_driver); |
| 109 | |
| 110 | MODULE_DESCRIPTION("IPQ6018 APSS CLK Driver"); |
| 111 | MODULE_LICENSE("GPL v2"); |
| 112 | |