| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Copyright (c) 2020 MediaTek Inc. |
| * Author: Owen Chen <owen.chen@mediatek.com> |
| */ |
| |
| #ifndef _DT_BINDINGS_POWER_MT6853_POWER_H |
| #define _DT_BINDINGS_POWER_MT6853_POWER_H |
| |
| #define MT6853_POWER_DOMAIN_MD 0 |
| #define MT6853_POWER_DOMAIN_CONN 1 |
| #define MT6853_POWER_DOMAIN_MFG0 2 |
| #define MT6853_POWER_DOMAIN_MFG1 3 |
| #define MT6853_POWER_DOMAIN_MFG2 4 |
| #define MT6853_POWER_DOMAIN_MFG3 5 |
| #define MT6853_POWER_DOMAIN_MFG5 6 |
| #define MT6853_POWER_DOMAIN_ISP 7 |
| #define MT6853_POWER_DOMAIN_ISP2 8 |
| #define MT6853_POWER_DOMAIN_IPE 9 |
| #define MT6853_POWER_DOMAIN_VDEC 10 |
| #define MT6853_POWER_DOMAIN_VENC 11 |
| #define MT6853_POWER_DOMAIN_DISP 12 |
| #define MT6853_POWER_DOMAIN_AUDIO 13 |
| #define MT6853_POWER_DOMAIN_ADSP_DORMANT 14 |
| #define MT6853_POWER_DOMAIN_CAM 15 |
| #define MT6853_POWER_DOMAIN_CAM_RAWA 16 |
| #define MT6853_POWER_DOMAIN_CAM_RAWB 17 |
| #define MT6853_POWER_DOMAIN_APU 18 |
| #define MT6853_POWER_DOMAIN_NR 19 |
| |
| #endif /* _DT_BINDINGS_POWER_MT6853_POWER_H */ |
