| # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note |
| # |
| # (C) COPYRIGHT 2013-2021 ARM Limited. All rights reserved. |
| # |
| # This program is free software and is provided to you under the terms of the |
| # GNU General Public License version 2 as published by the Free Software |
| # Foundation, and any use by you of this program is subject to the terms |
| # of such GNU license. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| # |
| # You should have received a copy of the GNU General Public License |
| # along with this program; if not, you can access it online at |
| # http://www.gnu.org/licenses/gpl-2.0.html. |
| # |
| # |
| |
| * ARM Mali Midgard / Bifrost devices |
| |
| |
| Required properties: |
| |
| - compatible : Should be mali<chip>, replacing digits with x from the back, |
| until malit<Major>xx, and it must end with one of: "arm,malit6xx" or |
| "arm,mali-midgard" or "arm,mali-bifrost" |
| - reg : Physical base address of the device and length of the register area. |
| - interrupts : Contains the three IRQ lines required by T-6xx devices |
| - interrupt-names : Contains the names of IRQ resources in the order they were |
| provided in the interrupts property. Must contain: "JOB, "MMU", "GPU". |
| |
| Optional: |
| |
| - clocks : One or more pairs of phandle to clock and clock specifier |
| for the Mali device. The order is important: the first clock |
| shall correspond to the "clk_mali" source, while the second clock |
| (that is optional) shall correspond to the "shadercores" source. |
| - clock-names : Shall be set to: "clk_mali", "shadercores". |
| - mali-supply : Phandle to the top level regulator for the Mali device. |
| Refer to |
| Documentation/devicetree/bindings/regulator/regulator.txt for details. |
| - shadercores-supply : Phandle to shader cores regulator for the Mali device. |
| This is optional. |
| - operating-points-v2 : Refer to Documentation/devicetree/bindings/power/mali-opp.txt |
| for details. |
| - quirks_gpu : Used to write to the JM_CONFIG or CSF_CONFIG register. |
| Should be used with care. Options passed here are used to override |
| certain default behavior. Note: This will override 'idvs-group-size' |
| field in devicetree and module param 'corestack_driver_control', |
| therefore if 'quirks_gpu' is used then 'idvs-group-size' and |
| 'corestack_driver_control' value should be incorporated into 'quirks_gpu'. |
| - quirks_sc : Used to write to the SHADER_CONFIG register. |
| Should be used with care. Options passed here are used to override |
| certain default behavior. |
| - quirks_tiler : Used to write to the TILER_CONFIG register. |
| Should be used with care. Options passed here are used to |
| disable or override certain default behavior. |
| - quirks_mmu : Used to write to the L2_CONFIG register. |
| Should be used with care. Options passed here are used to |
| disable or override certain default behavior. |
| - power_model : Sets the power model parameters. Defined power models include: |
| "mali-simple-power-model", "mali-g51-power-model", "mali-g52-power-model", |
| "mali-g52_r1-power-model", "mali-g71-power-model", "mali-g72-power-model", |
| "mali-g76-power-model", "mali-g77-power-model", "mali-tnax-power-model", |
| "mali-tbex-power-model" and "mali-tbax-power-model". |
| - mali-simple-power-model: this model derives the GPU power usage based |
| on the GPU voltage scaled by the system temperature. Note: it was |
| designed for the Juno platform, and may not be suitable for others. |
| - compatible: Should be "arm,mali-simple-power-model" |
| - dynamic-coefficient: Coefficient, in pW/(Hz V^2), which is |
| multiplied by v^2*f to calculate the dynamic power consumption. |
| - static-coefficient: Coefficient, in uW/V^3, which is |
| multiplied by v^3 to calculate the static power consumption. |
| - ts: An array containing coefficients for the temperature |
| scaling factor. This is used to scale the static power by a |
| factor of tsf/1000000, |
| where tsf = ts[3]*T^3 + ts[2]*T^2 + ts[1]*T + ts[0], |
| and T = temperature in degrees. |
| - thermal-zone: A string identifying the thermal zone used for |
| the GPU |
| - temp-poll-interval-ms: the interval at which the system |
| temperature is polled |
| - mali-g*-power-model(s): unless being stated otherwise, these models derive |
| the GPU power usage based on performance counters, so they are more |
| accurate. |
| - compatible: Should be, as examples, "arm,mali-g51-power-model" / |
| "arm,mali-g72-power-model". |
| - scale: the dynamic power calculated by the power model is |
| multiplied by a factor of 'scale'. This value should be |
| chosen to match a particular implementation. |
| - min_sample_cycles: Fall back to the simple power model if the |
| number of GPU cycles for a given counter dump is less than |
| 'min_sample_cycles'. The default value of this should suffice. |
| * Note: when IPA is used, two separate power models (simple and counter-based) |
| are used at different points so care should be taken to configure |
| both power models in the device tree (specifically dynamic-coefficient, |
| static-coefficient and scale) to best match the platform. |
| - power_policy : Sets the GPU power policy at probe time. Available options are |
| "coarse_demand" and "always_on". If not set, then "coarse_demand" is used. |
| - system-coherency : Sets the coherency protocol to be used for coherent |
| accesses made from the GPU. |
| If not set then no coherency is used. |
| - 0 : ACE-Lite |
| - 1 : ACE |
| - 31 : No coherency |
| - ipa-model : Sets the IPA model to be used for power management. GPU probe will fail if the |
| model is not found in the registered models list. If no model is specified here, |
| a gpu-id based model is picked if available, otherwise the default model is used. |
| - mali-simple-power-model: Default model used on mali |
| - idvs-group-size : Override the IDVS group size value. Tasks are sent to |
| cores in groups of N + 1, so i.e. 0xF means 16 tasks. |
| Valid values are between 0 to 0x3F (including). |
| - l2-size : Override L2 cache size on GPU that supports it |
| - l2-hash : Override L2 hash function on GPU that supports it |
| - l2-hash-values : Override L2 hash function using provided hash values, on GPUs that supports it. |
| It is mutually exclusive with 'l2-hash'. Only one or the other must be |
| used in a supported GPU. |
| - arbiter_if : Phandle to the arbif platform device, used to provide KBASE with an interface |
| to the Arbiter. This is required when using arbitration; setting to a non-NULL |
| value will enable arbitration. |
| If arbitration is in use, then there should be no external GPU control. |
| When arbiter_if is in use then the following must not be: |
| - power_model (no IPA allowed with arbitration) |
| - #cooling-cells |
| - operating-points-v2 (no dvfs in kbase with arbitration) |
| - system-coherency with a value of 1 (no full coherency with arbitration) |
| - int_id_override: list of <ID Setting[7:0]> tuples defining the IDs needed to be |
| set and the setting coresponding to the SYSC_ALLOC register. |
| |
| |
| Example for a Mali GPU with 1 clock and no regulators: |
| |
| gpu@0xfc010000 { |
| compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard"; |
| reg = <0xfc010000 0x4000>; |
| interrupts = <0 36 4>, <0 37 4>, <0 38 4>; |
| interrupt-names = "JOB", "MMU", "GPU"; |
| |
| clocks = <&pclk_mali>; |
| clock-names = "clk_mali"; |
| mali-supply = <&vdd_mali>; |
| operating-points-v2 = <&gpu_opp_table>; |
| power_model@0 { |
| compatible = "arm,mali-simple-power-model"; |
| static-coefficient = <2427750>; |
| dynamic-coefficient = <4687>; |
| ts = <20000 2000 (-20) 2>; |
| thermal-zone = "gpu"; |
| }; |
| power_model@1 { |
| compatible = "arm,mali-g71-power-model"; |
| scale = <5>; |
| }; |
| |
| idvs-group-size = <0x7>; |
| l2-size = /bits/ 8 <0x10>; |
| l2-hash = /bits/ 8 <0x04>; /* or l2-hash-values = <0x12345678 0x8765 0xAB>; */ |
| }; |
| |
| gpu_opp_table: opp_table0 { |
| compatible = "operating-points-v2"; |
| |
| opp@533000000 { |
| opp-hz = /bits/ 64 <533000000>; |
| opp-microvolt = <1250000>; |
| }; |
| opp@450000000 { |
| opp-hz = /bits/ 64 <450000000>; |
| opp-microvolt = <1150000>; |
| }; |
| opp@400000000 { |
| opp-hz = /bits/ 64 <400000000>; |
| opp-microvolt = <1125000>; |
| }; |
| opp@350000000 { |
| opp-hz = /bits/ 64 <350000000>; |
| opp-microvolt = <1075000>; |
| }; |
| opp@266000000 { |
| opp-hz = /bits/ 64 <266000000>; |
| opp-microvolt = <1025000>; |
| }; |
| opp@160000000 { |
| opp-hz = /bits/ 64 <160000000>; |
| opp-microvolt = <925000>; |
| }; |
| opp@100000000 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <912500>; |
| }; |
| }; |
| |
| Example for a Mali GPU with 2 clocks and 2 regulators: |
| |
| gpu: gpu@6e000000 { |
| compatible = "arm,mali-midgard"; |
| reg = <0x0 0x6e000000 0x0 0x200000>; |
| interrupts = <0 168 4>, <0 168 4>, <0 168 4>; |
| interrupt-names = "JOB", "MMU", "GPU"; |
| clocks = <&clk_mali 0>, <&clk_mali 1>; |
| clock-names = "clk_mali", "shadercores"; |
| mali-supply = <&supply0_3v3>; |
| shadercores-supply = <&supply1_3v3>; |
| system-coherency = <31>; |
| operating-points-v2 = <&gpu_opp_table>; |
| }; |
| |
| gpu_opp_table: opp_table0 { |
| compatible = "operating-points-v2", "operating-points-v2-mali"; |
| |
| opp@0 { |
| opp-hz = /bits/ 64 <50000000>; |
| opp-hz-real = /bits/ 64 <50000000>, /bits/ 64 <45000000>; |
| opp-microvolt = <820000>, <800000>; |
| opp-core-mask = /bits/ 64 <0xf>; |
| }; |
| opp@1 { |
| opp-hz = /bits/ 64 <40000000>; |
| opp-hz-real = /bits/ 64 <40000000>, /bits/ 64 <35000000>; |
| opp-microvolt = <720000>, <700000>; |
| opp-core-mask = /bits/ 64 <0x7>; |
| }; |
| opp@2 { |
| opp-hz = /bits/ 64 <30000000>; |
| opp-hz-real = /bits/ 64 <30000000>, /bits/ 64 <25000000>; |
| opp-microvolt = <620000>, <700000>; |
| opp-core-mask = /bits/ 64 <0x3>; |
| }; |
| }; |
| |
| Example for a Mali GPU supporting PBHA configuration via DTB (default): |
| |
| gpu@0xfc010000 { |
| ... |
| pbha { |
| int_id_override = <2 0x32>, <9 0x05>, <16 0x32>; |
| }; |
| ... |
| }; |