| /dts-v1/; |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| model = "Qualcomm MSM8960 CDP"; |
| compatible = "qcom,msm8960-cdp", "qcom,msm8960"; |
| interrupt-parent = <&intc>; |
| |
| intc: interrupt-controller@2000000 { |
| compatible = "qcom,msm-qgic2"; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| reg = < 0x02000000 0x1000 >, |
| < 0x02002000 0x1000 >; |
| }; |
| |
| timer@200a004 { |
| compatible = "qcom,msm-gpt", "qcom,msm-timer"; |
| interrupts = <1 2 0x301>; |
| reg = <0x0200a004 0x10>; |
| clock-frequency = <32768>; |
| cpu-offset = <0x80000>; |
| }; |
| |
| timer@200a024 { |
| compatible = "qcom,msm-dgt", "qcom,msm-timer"; |
| interrupts = <1 1 0x301>; |
| reg = <0x0200a024 0x10>, |
| <0x0200a034 0x4>; |
| clock-frequency = <6750000>; |
| cpu-offset = <0x80000>; |
| }; |
| |
| serial@19c400000 { |
| compatible = "qcom,msm-hsuart", "qcom,msm-uart"; |
| reg = <0x16440000 0x1000>, |
| <0x16400000 0x1000>; |
| interrupts = <0 154 0x0>; |
| }; |
| }; |
