| /* |
| * Copyright (c) 2018, The Linux Foundation. All rights reserved. |
| * Permission to use, copy, modify, and/or distribute this software for |
| * any purpose with or without fee is hereby granted, provided that the |
| * above copyright notice and this permission notice appear in all copies. |
| * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT |
| * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| */ |
| |
| |
| /** |
| * @defgroup |
| * @{ |
| */ |
| |
| #include "sw.h" |
| #include "hsl_api.h" |
| #include "hsl.h" |
| #include "hsl_phy.h" |
| #include "ssdk_plat.h" |
| #include "qca808x_ptp_reg.h" |
| #include "qca808x_ptp_api.h" |
| #include "qca808x_phy.h" |
| |
| |
| sw_error_t |
| qca808x_phy_ptp_reg_read(a_uint32_t dev_id, a_uint32_t phy_id, a_uint32_t reg, a_uint32_t * val) |
| { |
| *val = qca808x_phy_reg_read(dev_id, phy_id, reg); |
| return SW_OK; |
| } |
| |
| sw_error_t |
| qca808x_phy_ptp_reg_write(a_uint32_t dev_id, a_uint32_t phy_id, a_uint32_t reg, a_uint32_t val) |
| { |
| return qca808x_phy_reg_write(dev_id, phy_id, reg, (a_uint16_t)val); |
| } |
| |
| sw_error_t |
| qca808x_phy_ptp_mmd_read(a_uint32_t dev_id, a_uint32_t phy_id, a_uint16_t mmd_num, |
| a_uint32_t reg, a_uint32_t * val) |
| { |
| *val = qca808x_phy_mmd_read(dev_id, phy_id, mmd_num, (a_uint16_t)reg); |
| return SW_OK; |
| } |
| |
| sw_error_t |
| qca808x_phy_ptp_mmd_write(a_uint32_t dev_id, a_uint32_t phy_id, a_uint16_t mmd_num, |
| a_uint32_t reg, a_uint32_t val) |
| { |
| return qca808x_phy_mmd_write(dev_id, phy_id, mmd_num, (a_uint16_t)reg, (a_uint16_t)val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_imr_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, union ptp_imr_reg_u *value) |
| { |
| return qca808x_phy_ptp_reg_read( |
| dev_id, |
| phy_id, PTP_IMR_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_imr_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, union ptp_imr_reg_u *value) |
| { |
| return qca808x_phy_ptp_reg_write( |
| dev_id, |
| phy_id, PTP_IMR_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_isr_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, union ptp_isr_reg_u *value) |
| { |
| return qca808x_phy_ptp_reg_read( |
| dev_id, |
| phy_id, PTP_ISR_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_isr_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, union ptp_isr_reg_u *value) |
| { |
| return qca808x_phy_ptp_reg_write( |
| dev_id, |
| phy_id, PTP_ISR_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_hw_enable_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_hw_enable_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_HW_ENABLE_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_hw_enable_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_hw_enable_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_HW_ENABLE_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_main_conf_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_MAIN_CONF_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_main_conf_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_MAIN_CONF_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_1_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_1_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_2_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_2_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_3_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_3_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_4_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_4_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid0_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID0_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_clk_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_clk_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD7_NUM, PTP_RTC_CLK_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_clk_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_clk_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD7_NUM, PTP_RTC_CLK_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_1_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_1_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_2_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_2_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_3_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_3_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_4_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_4_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_5_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_5_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_5_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_5_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_6_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_6_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts0_6_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts0_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS0_6_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_seqid_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_seqid_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_SEQID_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_seqid_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_seqid_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_SEQID_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid1_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid1_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid2_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid2_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid3_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid3_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid4_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_portid4_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_portid4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_PORTID4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts1_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts1_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts2_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts2_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts3_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts3_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts4_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts4_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts5_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS5_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts5_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS5_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts6_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS6_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_ts6_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_ts6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_TS6_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr1_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr1_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr2_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr2_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr3_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_orig_corr3_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_orig_corr3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_ORIG_CORR3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig0_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig0_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig1_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig1_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig2_reg_get(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig2_reg_set(a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_in_trig3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_in_trig3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_IN_TRIG3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_latency_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_latency_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_LATENCY_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_tx_latency_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_tx_latency_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TX_LATENCY_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_inc0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_inc0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_INC0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_inc0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_inc0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_INC0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_inc1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_inc1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_INC1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_inc1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_inc1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_INC1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc5_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC5_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc5_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC5_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc6_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC6_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc6_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC6_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs_valid_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs_valid_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS_VALID_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtcoffs_valid_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtcoffs_valid_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTCOFFS_VALID_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_misc_config_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_misc_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_MISC_CONFIG_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_misc_config_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_misc_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_MISC_CONFIG_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ext_imr_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ext_imr_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EXT_IMR_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ext_imr_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ext_imr_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EXT_IMR_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ext_isr_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ext_isr_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EXT_ISR_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ext_isr_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ext_isr_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EXT_ISR_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_ext_conf_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_ext_conf_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_EXT_CONF_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_ext_conf_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_ext_conf_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_EXT_CONF_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rtc_preloaded4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rtc_preloaded4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RTC_PRELOADED4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_gm_conf0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_gm_conf0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_GM_CONF0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_gm_conf0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_gm_conf0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_GM_CONF0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_gm_conf1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_gm_conf1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_GM_CONF1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_gm_conf1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_gm_conf1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_GM_CONF1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_ts4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_ts4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_TS4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_hwpll_inc0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_hwpll_inc0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_HWPLL_INC0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_hwpll_inc0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_hwpll_inc0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_HWPLL_INC0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_hwpll_inc1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_hwpll_inc1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_HWPLL_INC1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_hwpll_inc1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_hwpll_inc1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_HWPLL_INC1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_latency_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_latency_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_LATENCY_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_ppsin_latency_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_ppsin_latency_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_PPSIN_LATENCY_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_config_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_CONFIG_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_config_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_CONFIG_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_status_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_STATUS_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_status_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_STATUS_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_config_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_CONFIG_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_config_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_CONFIG_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_status_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_STATUS_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_status_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_STATUS_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger0_timestamp4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger0_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER0_TIMESTAMP4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_trigger1_timestamp4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_trigger1_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_TRIGGER1_TIMESTAMP4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_config_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_CONFIG_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_config_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_CONFIG_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_status_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_STATUS_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_status_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_STATUS_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_config_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_CONFIG_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_config_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_config_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_CONFIG_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_status_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_STATUS_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_status_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_status_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_STATUS_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event0_timestamp4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event0_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT0_TIMESTAMP4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_event1_timestamp4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_event1_timestamp4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_EVENT1_TIMESTAMP4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid1_4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid1_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID1_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_5_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_5_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_5_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_5_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_6_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_6_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts1_6_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts1_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS1_6_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid2_4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid2_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID2_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_5_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_5_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_5_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_5_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_6_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_6_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts2_6_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts2_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS2_6_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_seqid3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_SEQID3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid3_4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_portid3_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_PORTID3_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_0_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_0_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_0_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_0_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_0_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_1_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_1_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_1_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_1_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_1_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_2_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_2_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_2_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_2_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_2_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_3_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_3_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_3_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_3_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_3_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_4_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_4_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_4_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_4_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_4_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_5_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_5_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_5_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_5_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_5_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_6_reg_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_read( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_6_REG_ADDRESS, |
| &value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_ts3_6_reg_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| union ptp_rx_ts3_6_reg_u *value) |
| { |
| return qca808x_phy_ptp_mmd_write( |
| dev_id, |
| phy_id, QCA808X_PHY_MMD3_NUM, PTP_RX_TS3_6_REG_ADDRESS, |
| value->val); |
| } |
| |
| sw_error_t |
| qca808x_ptp_imr_reg_mask_bmp_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_imr_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_imr_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.mask_bmp; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_imr_reg_mask_bmp_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_imr_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_imr_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.mask_bmp = value; |
| ret = qca808x_ptp_imr_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_isr_reg_status_bmp_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_isr_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_isr_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.status_bmp; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_isr_reg_status_bmp_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_isr_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_isr_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.status_bmp = value; |
| ret = qca808x_ptp_isr_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_hw_enable_reg_ptp_hw_enable_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_hw_enable_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_hw_enable_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ptp_hw_enable; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_hw_enable_reg_ptp_hw_enable_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_hw_enable_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_hw_enable_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ptp_hw_enable = value; |
| ret = qca808x_ptp_hw_enable_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ts_attach_mode_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ts_attach_mode; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ts_attach_mode_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ts_attach_mode = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ptp_clk_sel_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ptp_clk_sel; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ptp_clk_sel_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ptp_clk_sel = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_disable_1588_phy_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.disable_1588_phy; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_disable_1588_phy_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.disable_1588_phy = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_attach_crc_recal_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.attach_crc_recal; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_attach_crc_recal_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.attach_crc_recal = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ipv4_force_checksum_zero_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ipv4_force_checksum_zero; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ipv4_force_checksum_zero_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ipv4_force_checksum_zero = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ipv6_embed_force_checksum_zero_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ipv6_embed_force_checksum_zero; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ipv6_embed_force_checksum_zero_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ipv6_embed_force_checksum_zero = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ptp_bypass_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ptp_bypass; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ptp_bypass_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ptp_bypass = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_wol_en_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.wol_en; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_wol_en_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.wol_en = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ptp_clock_mode_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.ptp_clock_mode; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_main_conf_reg_ptp_clock_mode_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_main_conf_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_main_conf_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.ptp_clock_mode = value; |
| ret = qca808x_ptp_main_conf_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid0_reg_rx_seqid_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_rx_seqid0_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_rx_seqid0_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.rx_seqid; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_seqid0_reg_rx_seqid_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_rx_seqid0_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_rx_seqid0_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.rx_seqid = value; |
| ret = qca808x_ptp_rx_seqid0_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_0_reg_rx_portid_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_rx_portid0_0_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_rx_portid0_0_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.rx_portid; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_0_reg_rx_portid_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_rx_portid0_0_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_rx_portid0_0_reg_get(dev_id, phy_id, ®_val); |
| if (SW_OK != ret) |
| return ret; |
| reg_val.bf.rx_portid = value; |
| ret = qca808x_ptp_rx_portid0_0_reg_set(dev_id, phy_id, ®_val); |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_1_reg_rx_portid_get( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t *value) |
| { |
| union ptp_rx_portid0_1_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_rx_portid0_1_reg_get(dev_id, phy_id, ®_val); |
| *value = reg_val.bf.rx_portid; |
| return ret; |
| } |
| |
| sw_error_t |
| qca808x_ptp_rx_portid0_1_reg_rx_portid_set( |
| a_uint32_t dev_id, a_uint32_t phy_id, |
| a_uint32_t value) |
| { |
| union ptp_rx_portid0_1_reg_u reg_val; |
| sw_error_t ret = SW_OK; |
| |
| ret = qca808x_ptp_rx_portid0_1_reg_get(dev_id, phy_id, ®_val); |
| if |