| /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| /* |
| * arch/arm/cpu/armv8/tm2/firmware/scp_task/gpio.h |
| * |
| * Copyright (C) 2020 Amlogic, Inc. All rights reserved. |
| * |
| */ |
| |
| #ifndef _MESON_TL1_GPIO_H |
| #define _MESON_TL1_GPIO_H |
| |
| #define EE_OFFSET 15 |
| #define GPIOAO(x) (x) |
| #define GPIOEE(x) (EE_OFFSET + x) |
| |
| /* First GPIO chip */ |
| #define GPIOAO_0 0 |
| #define GPIOAO_1 1 |
| #define GPIOAO_2 2 |
| #define GPIOAO_3 3 |
| #define GPIOAO_4 4 |
| #define GPIOAO_5 5 |
| #define GPIOAO_6 6 |
| #define GPIOAO_7 7 |
| #define GPIOAO_8 8 |
| #define GPIOAO_9 9 |
| #define GPIOAO_10 10 |
| #define GPIOAO_11 11 |
| #define GPIOE_0 12 |
| #define GPIOE_1 13 |
| #define GPIOE_2 14 |
| |
| /* Second GPIO chip */ |
| #define GPIOZ_0 0 |
| #define GPIOZ_1 1 |
| #define GPIOZ_2 2 |
| #define GPIOZ_3 3 |
| #define GPIOZ_4 4 |
| #define GPIOZ_5 5 |
| #define GPIOZ_6 6 |
| #define GPIOZ_7 7 |
| #define GPIOZ_8 8 |
| #define GPIOZ_9 9 |
| #define GPIOZ_10 10 |
| |
| #define GPIOH_0 11 |
| #define GPIOH_1 12 |
| #define GPIOH_2 13 |
| #define GPIOH_3 14 |
| #define GPIOH_4 15 |
| #define GPIOH_5 16 |
| #define GPIOH_6 17 |
| #define GPIOH_7 18 |
| #define GPIOH_8 19 |
| #define GPIOH_9 20 |
| #define GPIOH_10 21 |
| #define GPIOH_11 22 |
| #define GPIOH_12 23 |
| #define GPIOH_13 24 |
| #define GPIOH_14 25 |
| #define GPIOH_15 26 |
| #define GPIOH_16 27 |
| #define GPIOH_17 28 |
| #define GPIOH_18 29 |
| #define GPIOH_19 30 |
| #define GPIOH_20 31 |
| #define GPIOH_21 32 |
| #define GPIOH_22 33 |
| |
| #define BOOT_0 34 |
| #define BOOT_1 35 |
| #define BOOT_2 36 |
| #define BOOT_3 37 |
| #define BOOT_4 38 |
| #define BOOT_5 39 |
| #define BOOT_6 40 |
| #define BOOT_7 41 |
| #define BOOT_8 42 |
| #define BOOT_9 43 |
| #define BOOT_10 44 |
| #define BOOT_11 45 |
| #define BOOT_12 46 |
| #define BOOT_13 47 |
| |
| #define GPIOC_0 48 |
| #define GPIOC_1 49 |
| #define GPIOC_2 50 |
| #define GPIOC_3 51 |
| #define GPIOC_4 52 |
| #define GPIOC_5 53 |
| #define GPIOC_6 54 |
| #define GPIOC_7 55 |
| #define GPIOC_8 56 |
| #define GPIOC_9 57 |
| #define GPIOC_10 58 |
| #define GPIOC_11 59 |
| #define GPIOC_12 60 |
| #define GPIOC_13 61 |
| #define GPIOC_14 62 |
| |
| #define GPIOW_0 63 |
| #define GPIOW_1 64 |
| #define GPIOW_2 65 |
| #define GPIOW_3 66 |
| #define GPIOW_4 67 |
| #define GPIOW_5 68 |
| #define GPIOW_6 69 |
| #define GPIOW_7 70 |
| #define GPIOW_8 71 |
| #define GPIOW_9 72 |
| #define GPIOW_10 73 |
| #define GPIOW_11 74 |
| |
| #define GPIODV_0 75 |
| #define GPIODV_1 76 |
| #define GPIODV_2 77 |
| #define GPIODV_3 78 |
| #define GPIODV_4 79 |
| #define GPIODV_5 80 |
| #define GPIODV_6 81 |
| #define GPIODV_7 82 |
| #define GPIODV_8 83 |
| #define GPIODV_9 84 |
| #define GPIODV_10 85 |
| #define GPIODV_11 86 |
| |
| #endif /* _MESON_TL1_GPIO_H */ |
