/* | |
* GPIO definitions for Amlogic TXHD SoCs | |
* | |
* Copyright (C) 2015 Endless Mobile, Inc. | |
* Author: Carlo Caione <carlo@endlessm.com> | |
* | |
* This program is free software; you can redistribute it and/or | |
* modify it under the terms of the GNU General Public License | |
* version 2 as published by the Free Software Foundation. | |
* | |
* You should have received a copy of the GNU General Public License | |
* along with this program. If not, see <http://www.gnu.org/licenses/>. | |
*/ | |
#ifndef _MESONTXHD_GPIO_H | |
#define _MESONTXHD_GPIO_H | |
#define EE_OFFSET 14 | |
/* | |
* NOTICE: The gpio number sequence according to the gpio interrupts. | |
*/ | |
/* AO Bank */ | |
#define GPIOAO_0 0 | |
#define GPIOAO_1 1 | |
#define GPIOAO_2 2 | |
#define GPIOAO_3 3 | |
#define GPIOAO_4 4 | |
#define GPIOAO_5 5 | |
#define GPIOAO_6 6 | |
#define GPIOAO_7 7 | |
#define GPIOAO_8 8 | |
#define GPIOAO_9 9 | |
#define GPIOAO_10 10 | |
#define GPIOAO_11 11 | |
#define GPIOAO_12 12 | |
#define GPIOAO_13 13 | |
/* EE Bank */ | |
#define GPIOZ_0 0 | |
#define GPIOZ_1 1 | |
#define GPIOZ_2 2 | |
#define GPIOZ_3 3 | |
#define GPIOZ_4 4 | |
#define GPIOZ_5 5 | |
#define GPIOZ_6 6 | |
#define GPIOZ_7 7 | |
#define GPIOH_0 8 | |
#define GPIOH_1 9 | |
#define GPIOH_2 10 | |
#define GPIOH_3 11 | |
#define GPIOH_4 12 | |
#define GPIOH_5 13 | |
#define GPIOH_6 14 | |
#define GPIOH_7 15 | |
#define GPIOH_8 16 | |
#define GPIOH_9 17 | |
#define GPIOH_10 18 | |
#define GPIOH_11 19 | |
#define GPIOH_12 20 | |
#define GPIOH_13 21 | |
#define GPIOH_14 22 | |
#define GPIOH_15 23 | |
#define BOOT_0 24 | |
#define BOOT_1 25 | |
#define BOOT_2 26 | |
#define BOOT_3 27 | |
#define BOOT_4 28 | |
#define BOOT_5 29 | |
#define BOOT_6 30 | |
#define BOOT_7 31 | |
#define BOOT_8 32 | |
#define BOOT_9 33 | |
#define BOOT_10 34 | |
#define BOOT_11 35 | |
#define BOOT_12 36 | |
#define GPIOC_0 37 | |
#define GPIOC_1 38 | |
#define GPIOC_2 39 | |
#define GPIOC_3 40 | |
#define GPIOC_4 41 | |
#define GPIOC_5 42 | |
#define GPIOC_6 43 | |
#define GPIOC_7 44 | |
#define GPIOC_8 45 | |
#define GPIOC_9 46 | |
#define GPIOC_10 47 | |
#define GPIODV_0 48 | |
#define GPIODV_1 49 | |
#define GPIODV_2 50 | |
#define GPIODV_3 51 | |
#define GPIODV_4 52 | |
#define GPIODV_5 53 | |
#define GPIODV_6 54 | |
#define GPIODV_7 55 | |
#define GPIODV_8 56 | |
#define GPIODV_9 57 | |
#define GPIOW_0 58 | |
#define GPIOW_1 59 | |
#define GPIOW_2 60 | |
#define GPIOW_3 61 | |
#define GPIOW_4 62 | |
#define GPIOW_5 63 | |
#define GPIOW_6 64 | |
#define GPIOW_7 65 | |
#define GPIOW_8 66 | |
#define GPIOW_9 67 | |
#define GPIOW_10 68 | |
#define GPIOW_11 69 | |
#endif /* _MESONTXHD_GPIO_H */ |